RTEMS 6.1-rc4
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The set of registers that specifies the complete processor state. More...
#include <cpu.h>
Data Fields | |
uint64_t | register_x0 |
uint64_t | register_x1 |
uint64_t | register_x2 |
uint64_t | register_x3 |
uint64_t | register_x4 |
uint64_t | register_x5 |
uint64_t | register_x6 |
uint64_t | register_x7 |
uint64_t | register_x8 |
uint64_t | register_x9 |
uint64_t | register_x10 |
uint64_t | register_x11 |
uint64_t | register_x12 |
uint64_t | register_x13 |
uint64_t | register_x14 |
uint64_t | register_x15 |
uint64_t | register_x16 |
uint64_t | register_x17 |
uint64_t | register_x18 |
uint64_t | register_x19 |
uint64_t | register_x20 |
uint64_t | register_x21 |
uint64_t | register_x22 |
uint64_t | register_x23 |
uint64_t | register_x24 |
uint64_t | register_x25 |
uint64_t | register_x26 |
uint64_t | register_x27 |
uint64_t | register_x28 |
uint64_t | register_fp |
void * | register_lr |
uintptr_t | register_sp |
void * | register_pc |
uint64_t | register_daif |
uint64_t | register_cpsr |
uint64_t | register_syndrome |
uint64_t | register_fault_address |
AArch64_symbolic_exception_name | vector |
uint64_t | reserved_for_stack_alignment |
uint64_t | register_fpsr |
uint64_t | register_fpcr |
uint128_t | register_q0 |
uint128_t | register_q1 |
uint128_t | register_q2 |
uint128_t | register_q3 |
uint128_t | register_q4 |
uint128_t | register_q5 |
uint128_t | register_q6 |
uint128_t | register_q7 |
uint128_t | register_q8 |
uint128_t | register_q9 |
uint128_t | register_q10 |
uint128_t | register_q11 |
uint128_t | register_q12 |
uint128_t | register_q13 |
uint128_t | register_q14 |
uint128_t | register_q15 |
uint128_t | register_q16 |
uint128_t | register_q17 |
uint128_t | register_q18 |
uint128_t | register_q19 |
uint128_t | register_q20 |
uint128_t | register_q21 |
uint128_t | register_q22 |
uint128_t | register_q23 |
uint128_t | register_q24 |
uint128_t | register_q25 |
uint128_t | register_q26 |
uint128_t | register_q27 |
uint128_t | register_q28 |
uint128_t | register_q29 |
uint128_t | register_q30 |
uint128_t | register_q31 |
union { | |
struct { | |
uint32_t register_r0 | |
uint32_t register_r1 | |
uint32_t register_r2 | |
uint32_t register_r3 | |
uint32_t register_r4 | |
uint32_t register_r5 | |
uint32_t register_r6 | |
uint32_t register_r7 | |
uint32_t register_r8 | |
uint32_t register_r9 | |
uint32_t register_r10 | |
uint32_t register_r11 | |
uint32_t register_r12 | |
uint32_t register_sp | |
void * register_lr | |
void * register_pc | |
} | |
uint32_t registers [16] | |
}; | |
const ARM_VFP_context * | vfp_context |
uint32_t | reserved_for_stack_alignment |
struct Context_Control_sse * | fp_ctxt |
uint32_t | edi |
uint32_t | esi |
uint32_t | ebp |
uint32_t | esp0 |
uint32_t | ebx |
uint32_t | edx |
uint32_t | ecx |
uint32_t | eax |
uint32_t | idtIndex |
uint32_t | faultCode |
uint32_t | eip |
uint32_t | cs |
uint32_t | eflags |
uint32_t | vecnum |
uint32_t | sr |
uint32_t | pc |
This member contains the PC value. | |
uint32_t | d0 |
uint32_t | d1 |
uint32_t | d2 |
uint32_t | d3 |
uint32_t | d4 |
uint32_t | d5 |
uint32_t | d6 |
uint32_t | d7 |
uint32_t | a0 |
uint32_t | a1 |
uint32_t | a2 |
uint32_t | a3 |
uint32_t | a4 |
uint32_t | a5 |
uint32_t | a6 |
uint32_t | a7 |
uint32_t | r1 |
uint32_t | r2 |
uint32_t | r3 |
uint32_t | r4 |
uint32_t | r5 |
uint32_t | r6 |
uint32_t | r7 |
uint32_t | r8 |
uint32_t | r9 |
uint32_t | r10 |
uint32_t | r11 |
uint32_t | r12 |
uint32_t | r13 |
uint32_t * | r14 |
uint32_t * | r15 |
uint32_t * | r16 |
uint32_t * | r17 |
uint32_t | r18 |
uint32_t | r19 |
uint32_t | r20 |
uint32_t | r21 |
uint32_t | r22 |
uint32_t | r23 |
uint32_t | r24 |
uint32_t | r25 |
uint32_t | r26 |
uint32_t | r27 |
uint32_t | r28 |
uint32_t | r29 |
uint32_t | r30 |
uint32_t | r31 |
uint32_t | msr |
uint32_t * | ear |
uint32_t | esr |
uint32_t * | btr |
uint32_t | integer_registers [16] |
uint32_t | r14 |
uint32_t | r15 |
uint32_t | r16 |
uint32_t | r17 |
uint32_t | gp |
uint32_t | fp |
uint32_t | sp |
uint32_t | ra |
uint32_t | et |
uint32_t | ea |
uint32_t | status |
uint32_t | ienable |
uint32_t | ipending |
uint32_t | processor_state_register |
double | float_registers [1] |
uint32_t | r [32] |
uint32_t | epcr |
uint32_t | eear |
uintptr_t | EXC_SRR0 |
uintptr_t | EXC_SRR1 |
uint32_t | _EXC_number |
uint32_t | RESERVED_FOR_ALIGNMENT_0 |
uint32_t | EXC_CR |
uint32_t | EXC_XER |
uintptr_t | EXC_CTR |
uintptr_t | EXC_LR |
uintptr_t | RESERVED_FOR_ALIGNMENT_1 |
PPC_GPR_TYPE | GPR0 |
PPC_GPR_TYPE | GPR1 |
PPC_GPR_TYPE | GPR2 |
PPC_GPR_TYPE | GPR3 |
PPC_GPR_TYPE | GPR4 |
PPC_GPR_TYPE | GPR5 |
PPC_GPR_TYPE | GPR6 |
PPC_GPR_TYPE | GPR7 |
PPC_GPR_TYPE | GPR8 |
PPC_GPR_TYPE | GPR9 |
PPC_GPR_TYPE | GPR10 |
PPC_GPR_TYPE | GPR11 |
PPC_GPR_TYPE | GPR12 |
PPC_GPR_TYPE | GPR13 |
PPC_GPR_TYPE | GPR14 |
PPC_GPR_TYPE | GPR15 |
PPC_GPR_TYPE | GPR16 |
PPC_GPR_TYPE | GPR17 |
PPC_GPR_TYPE | GPR18 |
PPC_GPR_TYPE | GPR19 |
PPC_GPR_TYPE | GPR20 |
PPC_GPR_TYPE | GPR21 |
PPC_GPR_TYPE | GPR22 |
PPC_GPR_TYPE | GPR23 |
PPC_GPR_TYPE | GPR24 |
PPC_GPR_TYPE | GPR25 |
PPC_GPR_TYPE | GPR26 |
PPC_GPR_TYPE | GPR27 |
PPC_GPR_TYPE | GPR28 |
PPC_GPR_TYPE | GPR29 |
PPC_GPR_TYPE | GPR30 |
PPC_GPR_TYPE | GPR31 |
uintptr_t | RESERVED_FOR_ALIGNMENT_2 |
CPU_Interrupt_frame | Interrupt_frame |
uintptr_t | mcause |
uintptr_t | sp |
uintptr_t | gp |
uintptr_t | tp |
uintptr_t | s2 |
uintptr_t | s3 |
uintptr_t | s4 |
uintptr_t | s5 |
uintptr_t | s6 |
uintptr_t | s7 |
uintptr_t | s8 |
uintptr_t | s9 |
uintptr_t | s10 |
uintptr_t | s11 |
uint32_t | psr |
This member contains the PSR register value. | |
uint32_t | npc |
This member contains the nPC value. | |
uint32_t | trap |
This member contains the trap number. | |
uint32_t | wim |
This member contains the WIM register value. | |
uint32_t | y |
This member contains the Y register value. | |
uint32_t | global [8] |
This member contains the global 0..7 register values. | |
uint32_t | output [8] |
This member contains the output 0..7 register values. | |
SPARC_Register_window | windows [SPARC_NUMBER_OF_REGISTER_WINDOWS - 1] |
This member contains the additional register windows according to the saved WIM. | |
The set of registers that specifies the complete processor state.
This structure contains the register set of a context which caused an unexpected trap.
The CPU exception frame may be available in fatal error conditions like for example illegal opcodes, instruction fetch errors, or data access errors.
The CPU exception frame may be available in fatal error conditions like for example illegal opcodes, instruction fetch errors, or data access errors.