SPARC Architecture Support. More...

Modules
	SPARC Assembler Support
	SPARC Assembler Support.

	SPARC Context Structures

Data Structures
struct	CPU_Per_CPU_control
	The CPU specific per-CPU control. More...

Macros
#define	SPARC_MINIMUM_STACK_FRAME_SIZE 0x60

#define	ISF_PSR_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x00

#define	ISF_PC_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x04

#define	ISF_NPC_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x08

#define	ISF_G1_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x0c

#define	ISF_G2_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x10

#define	ISF_G3_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x14

#define	ISF_G4_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x18

#define	ISF_G5_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x1c

#define	ISF_G7_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x24

#define	ISF_I0_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x28

#define	ISF_I1_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x2c

#define	ISF_I2_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x30

#define	ISF_I3_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x34

#define	ISF_I4_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x38

#define	ISF_I5_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x3c

#define	ISF_I6_FP_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x40

#define	ISF_I7_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x44

#define	ISF_Y_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x48

#define	ISF_TPC_OFFSET SPARC_MINIMUM_STACK_FRAME_SIZE + 0x4c

#define	CPU_INTERRUPT_FRAME_SIZE SPARC_MINIMUM_STACK_FRAME_SIZE + 0x50

#define	SPARC_FP_CONTEXT_OFFSET_F0_F1 0

#define	SPARC_FP_CONTEXT_OFFSET_F2_F3 8

#define	SPARC_FP_CONTEXT_OFFSET_F4_F5 16

#define	SPARC_FP_CONTEXT_OFFSET_F6_F7 24

#define	SPARC_FP_CONTEXT_OFFSET_F8_F9 32

#define	SPARC_FP_CONTEXT_OFFSET_F10_F11 40

#define	SPARC_FP_CONTEXT_OFFSET_F12_F13 48

#define	SPARC_FP_CONTEXT_OFFSET_F14_F15 56

#define	SPARC_FP_CONTEXT_OFFSET_F16_F17 64

#define	SPARC_FP_CONTEXT_OFFSET_F18_F19 72

#define	SPARC_FP_CONTEXT_OFFSET_F20_F21 80

#define	SPARC_FP_CONTEXT_OFFSET_F22_F23 88

#define	SPARC_FP_CONTEXT_OFFSET_F24_F25 96

#define	SPARC_FP_CONTEXT_OFFSET_F26_F27 104

#define	SPARC_FP_CONTEXT_OFFSET_F28_F29 112

#define	SPARC_FP_CONTEXT_OFFSET_F30_F31 120

#define	SPARC_FP_CONTEXT_OFFSET_FSR 128

#define	CPU_PER_CPU_CONTROL_SIZE 0

#define	_CPU_Get_current_per_CPU_control() _SPARC_Per_CPU_current

#define	_CPU_Get_thread_executing() ( _SPARC_Per_CPU_current->executing )

Functions
register struct Per_CPU_Control *_SPARC_Per_CPU_current	__asm__ ("g6")
	The pointer to the current per-CPU control is available via register g6.

void	_CPU_Context_volatile_clobber (uintptr_t pattern)

void	_CPU_Context_validate (uintptr_t pattern)

RTEMS_INLINE_ROUTINE void	_CPU_Instruction_illegal (void)

RTEMS_INLINE_ROUTINE void	_CPU_Instruction_no_operation (void)

Detailed Description

SPARC Architecture Support.

Macro Definition Documentation

◆ CPU_INTERRUPT_FRAME_SIZE

#define CPU_INTERRUPT_FRAME_SIZE SPARC_MINIMUM_STACK_FRAME_SIZE + 0x50

This defines the size of the ISF area for use in assembly.