SRC Peripheral Access Layer

Modules
	SRC Register Masks

Data Structures
struct	SRC_Type

Macros
#define	SRC_BASE   (0x400F8000u)
#define	SRC   ((SRC_Type *)SRC_BASE)
#define	SRC_BASE_ADDRS   { SRC_BASE }
#define	SRC_BASE_PTRS   { SRC }
#define	SRC_IRQS   { SRC_IRQn }
#define	SRC_SCR_MWDR_MASK   SRC_SCR_MASK_WDOG_RST_MASK
#define	SRC_SCR_MWDR_SHIFT   SRC_SCR_MASK_WDOG_RST_SHIFT
#define	SRC_SCR_MWDR(x)   SRC_SCR_MASK_WDOG_RST(x)
#define	SRC_SRSR_WDOG_MASK   SRC_SRSR_WDOG_RST_B_MASK
#define	SRC_SRSR_WDOG_SHIFT   SRC_SRSR_WDOG_RST_B_SHIFT
#define	SRC_SRSR_WDOG(x)   SRC_SRSR_WDOG_RST_B(x)
#define	SRC_SRSR_JTAG_MASK   SRC_SRSR_JTAG_RST_B_MASK
#define	SRC_SRSR_JTAG_SHIFT   SRC_SRSR_JTAG_RST_B_SHIFT
#define	SRC_SRSR_JTAG(x)   SRC_SRSR_JTAG_RST_B(x)
#define	SRC_SRSR_SJC_MASK   SRC_SRSR_JTAG_SW_RST_MASK
#define	SRC_SRSR_SJC_SHIFT   SRC_SRSR_JTAG_SW_RST_SHIFT
#define	SRC_SRSR_SJC(x)   SRC_SRSR_JTAG_SW_RST(x)
#define	SRC_SRSR_TSR_MASK   SRC_SRSR_TEMPSENSE_RST_B_MASK
#define	SRC_SRSR_TSR_SHIFT   SRC_SRSR_TEMPSENSE_RST_B_SHIFT
#define	SRC_SRSR_TSR(x)   SRC_SRSR_TEMPSENSE_RST_B(x)
#define	SRC_SRSR_W1C_BITS_MASK
#define	SRC_BASE   (0x40C04000u)
#define	SRC   ((SRC_Type *)SRC_BASE)
#define	SRC_BASE_ADDRS   { SRC_BASE }
#define	SRC_BASE_PTRS   { SRC }
#define	SRC_BASE   (0x40C04000u)
#define	SRC   ((SRC_Type *)SRC_BASE)
#define	SRC_BASE_ADDRS   { SRC_BASE }
#define	SRC_BASE_PTRS   { SRC }

Detailed Description

Macro Definition Documentation

SRC [1/3]

#define SRC   ((SRC_Type *)SRC_BASE)

Peripheral SRC base pointer

SRC [2/3]

#define SRC   ((SRC_Type *)SRC_BASE)

Peripheral SRC base pointer

SRC [3/3]

#define SRC   ((SRC_Type *)SRC_BASE)

Peripheral SRC base pointer

SRC_BASE [1/3]

#define SRC_BASE   (0x400F8000u)

Peripheral SRC base address

SRC_BASE [2/3]

#define SRC_BASE   (0x40C04000u)

Peripheral SRC base address

SRC_BASE [3/3]

#define SRC_BASE   (0x40C04000u)

Peripheral SRC base address

SRC_BASE_ADDRS [1/3]

#define SRC_BASE_ADDRS   { SRC_BASE }

Array initializer of SRC peripheral base addresses

SRC_BASE_ADDRS [2/3]

#define SRC_BASE_ADDRS   { SRC_BASE }

Array initializer of SRC peripheral base addresses

SRC_BASE_ADDRS [3/3]

#define SRC_BASE_ADDRS   { SRC_BASE }

Array initializer of SRC peripheral base addresses

SRC_BASE_PTRS [1/3]

#define SRC_BASE_PTRS   { SRC }

Array initializer of SRC peripheral base pointers

SRC_BASE_PTRS [2/3]

#define SRC_BASE_PTRS   { SRC }

Array initializer of SRC peripheral base pointers

SRC_BASE_PTRS [3/3]

#define SRC_BASE_PTRS   { SRC }

Array initializer of SRC peripheral base pointers

SRC_IRQS

#define SRC_IRQS   { SRC_IRQn }

Interrupt vectors for the SRC peripheral type

SRC_SRSR_W1C_BITS_MASK

#define SRC_SRSR_W1C_BITS_MASK

Value:

                                ( SRC_SRSR_WDOG3_RST_B_MASK \
                                | SRC_SRSR_JTAG_SW_RST_MASK \
                                | SRC_SRSR_JTAG_RST_B_MASK \
                                | SRC_SRSR_WDOG_RST_B_MASK \
                                | SRC_SRSR_IPP_USER_RESET_B_MASK \
                                | SRC_SRSR_CSU_RESET_B_MASK \
                                | SRC_SRSR_LOCKUP_SYSRESETREQ_MASK \
                                | SRC_SRSR_IPP_RESET_B_MASK)