RTEMS 6.1-rc4
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NXP LPC32XX Board Support Package. More...
Modules | |
Boot Support | |
Boot support. | |
Clock Support | |
Clock support. | |
DMA Support | |
DMA support. | |
EMC Support | |
EMC Support. | |
Ethernet Support | |
Ethernet support. | |
HSU Support | |
HSU Support. | |
I2C Support | |
I2C Support. | |
I2S Support | |
I2S support. | |
Interrupt Support | |
LCD Support | |
LCD support. | |
MMU Support | |
MMU support. | |
NAND MLC Controller | |
NAND MLC Controller. | |
Register Definitions | |
Register definitions. | |
Timer Support | |
Timer support. | |
Files | |
file | console-config.c |
Console configuration. | |
file | hsu.c |
High speed UART driver (14-clock). | |
file | bsp.h |
Global BSP definitions. | |
file | nand-select.c |
NAND controller selection. | |
file | rtc-config.c |
RTC configuration. | |
file | bspidle.c |
bsp_idle_thread() implementation. | |
file | bspreset.c |
Reset code. | |
file | bspstart.c |
Startup code. | |
file | bspstarthooks.c |
Startup code. | |
file | restart.c |
Restart implementation. | |
file | system-clocks.c |
System clocks. | |
file | timer.c |
Benchmark timer support. | |
Macros | |
#define | BSP_FEATURE_IRQ_EXTENSION |
#define | RTEMS_BSP_NETWORK_DRIVER_ATTACH lpc_eth_attach_detach |
Standard network driver attach and detach function. | |
#define | RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" |
Standard network driver name. | |
#define | LPC32XX_STANDARD_TIMER (&lpc32xx.timer_1) |
#define | BSP_IDLE_TASK_BODY bsp_idle_thread |
#define | BSP_CONSOLE_UART_BASE LPC32XX_BASE_UART_5 |
#define | LPC32XX_DO_STOP_GPDMA |
#define | LPC32XX_DO_STOP_ETHERNET |
#define | LPC32XX_DO_STOP_USB |
#define | LPC32XX_DO_RESTART(addr) |
Enumerations | |
enum | lpc32xx_nand_controller { LPC32XX_NAND_CONTROLLER_NONE , LPC32XX_NAND_CONTROLLER_MLC , LPC32XX_NAND_CONTROLLER_SLC } |
Functions | |
int | lpc_eth_attach_detach (struct rtems_bsdnet_ifconfig *config, int attaching) |
Network driver attach and detach function. | |
void * | lpc32xx_idle (uintptr_t ignored) |
Optimized idle task. | |
bool | lpc32xx_start_pll_setup (uint32_t hclkpll_ctrl, uint32_t hclkdiv_ctrl, bool force) |
uint32_t | lpc32xx_sysclk (void) |
uint32_t | lpc32xx_hclkpll_clk (void) |
uint32_t | lpc32xx_periph_clk (void) |
uint32_t | lpc32xx_hclk (void) |
uint32_t | lpc32xx_arm_clk (void) |
uint32_t | lpc32xx_ddram_clk (void) |
void | lpc32xx_select_nand_controller (lpc32xx_nand_controller nand_controller) |
void | bsp_restart (void *addr) |
void * | bsp_idle_thread (uintptr_t arg) |
Optimized idle task. | |
Variables | |
uint32_t | lpc32xx_magic_zero_begin [] |
Begin of magic zero area. | |
uint32_t | lpc32xx_magic_zero_end [] |
End of magic zero area. | |
uint32_t | lpc32xx_magic_zero_size [] |
Size of magic zero area. | |
NXP LPC32XX Board Support Package.
#define LPC32XX_DO_RESTART | ( | addr | ) |
#define LPC32XX_DO_STOP_ETHERNET |
#define LPC32XX_DO_STOP_GPDMA |
#define LPC32XX_DO_STOP_USB |
void * bsp_idle_thread | ( | uintptr_t | ignored | ) |
Optimized idle task.
This idle task sets the power mode to idle. This causes the processor clock to be stopped, while on-chip peripherals remain active. Any enabled interrupt from a peripheral or an external interrupt source will cause the processor to resume execution.
To enable the idle task use the following in the system configuration:
Optimized idle task.
The MSR[POW] bit is set to put the CPU into the low power mode defined in HID0. HID0 is set during starup in start.S.
This idle task sets the power mode to idle. This causes the processor clock to be stopped, while on-chip peripherals remain active. Any enabled interrupt from a peripheral or an external interrupt source will cause the processor to resume execution.
To enable the idle task use the following in the system configuration:
Optimized idle task.
The MSR[POW] bit is set to put the CPU into the low power mode defined in HID0. HID0 is set during starup in start.S.
void * lpc32xx_idle | ( | uintptr_t | ignored | ) |
Optimized idle task.
This idle task sets the power mode to idle. This causes the processor clock to be stopped, while on-chip peripherals remain active. Any enabled interrupt from a peripheral or an external interrupt source will cause the processor to resume execution.
To enable the idle task use the following in the system configuration:
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extern |
Begin of magic zero area.
A read from this area returns zero. Writes have no effect.
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extern |
End of magic zero area.
A read from this area returns zero. Writes have no effect.
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extern |
Size of magic zero area.
A read from this area returns zero. Writes have no effect.