RTEMS 6.1-rc4
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Macros

Macros

#define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__)   ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
 Reset DMA handle state.
 
#define __HAL_DMA_GET_FS(__HANDLE__)   ((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR & (DMA_SxFCR_FS)) : 0)
 Return the current DMA Stream FIFO filled level.
 
#define __HAL_DMA_ENABLE(__HANDLE__)
 Enable the specified DMA Stream.
 
#define __HAL_DMA_DISABLE(__HANDLE__)
 Disable the specified DMA Stream.
 
#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream transfer complete flag.
 
#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream half transfer complete flag.
 
#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream transfer error flag.
 
#define __HAL_DMA_GET_FE_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream FIFO error flag.
 
#define __HAL_DMA_GET_DME_FLAG_INDEX(__HANDLE__)
 Return the current DMA Stream direct mode error flag.
 
#define __HAL_BDMA_GET_GI_FLAG_INDEX(__HANDLE__)
 Returns the current BDMA Channel Global interrupt flag.
 
#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)
 Get the DMA Stream pending flags.
 
#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__)
 Clear the DMA Stream pending flags.
 
#define DMA_TO_BDMA_IT(__DMA_IT__)
 
#define __HAL_BDMA_CHANNEL_ENABLE_IT(__HANDLE__, __INTERRUPT__)   (((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR |= (DMA_TO_BDMA_IT(__INTERRUPT__)))
 
#define __HAL_DMA_STREAM_ENABLE_IT(__HANDLE__, __INTERRUPT__)
 
#define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__)
 Enable the specified DMA Stream interrupts.
 
#define __HAL_BDMA_CHANNEL_DISABLE_IT(__HANDLE__, __INTERRUPT__)   (((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR &= ~(DMA_TO_BDMA_IT(__INTERRUPT__)))
 
#define __HAL_DMA_STREAM_DISABLE_IT(__HANDLE__, __INTERRUPT__)
 
#define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__)
 Disable the specified DMA Stream interrupts.
 
#define __HAL_BDMA_CHANNEL_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)   ((((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR & (DMA_TO_BDMA_IT(__INTERRUPT__))))
 
#define __HAL_DMA_STREAM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)
 
#define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)
 Check whether the specified DMA Stream interrupt is enabled or not.
 
#define __HAL_DMA_SET_COUNTER(__HANDLE__, __COUNTER__)
 Writes the number of data units to be transferred on the DMA Stream.
 
#define __HAL_DMA_GET_COUNTER(__HANDLE__)
 Returns the number of remaining data units in the current DMAy Streamx transfer.
 

Detailed Description

Macro Definition Documentation

◆ __HAL_BDMA_GET_GI_FLAG_INDEX

#define __HAL_BDMA_GET_GI_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel0))? BDMA_ISR_GIF0 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel1))? BDMA_ISR_GIF1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel2))? BDMA_ISR_GIF2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel3))? BDMA_ISR_GIF3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel4))? BDMA_ISR_GIF4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel5))? BDMA_ISR_GIF5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel6))? BDMA_ISR_GIF6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel7))? BDMA_ISR_GIF7 :\
(uint32_t)0x00000000)
#define BDMA_ISR_GIF2
Definition: stm32h723xx.h:6663
#define BDMA_ISR_GIF6
Definition: stm32h723xx.h:6711
#define BDMA_ISR_GIF0
Definition: stm32h723xx.h:6639
#define BDMA_ISR_GIF4
Definition: stm32h723xx.h:6687
#define BDMA_ISR_GIF7
Definition: stm32h723xx.h:6723
#define BDMA_ISR_GIF1
Definition: stm32h723xx.h:6651
#define BDMA_ISR_GIF5
Definition: stm32h723xx.h:6699
#define BDMA_ISR_GIF3
Definition: stm32h723xx.h:6675

Returns the current BDMA Channel Global interrupt flag.

Parameters
__HANDLE__DMA handle
Return values
Thespecified transfer error flag index.

◆ __HAL_DMA_CLEAR_FLAG

#define __HAL_DMA_CLEAR_FLAG (   __HANDLE__,
  __FLAG__ 
)
Value:
(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream7)? (BDMA->IFCR = (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LIFCR = (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))
#define DMA1
Definition: MIMXRT1166_cm4.h:32640

Clear the DMA Stream pending flags.

Parameters
__HANDLE__DMA handle
__FLAG__specifies the flag to clear. This parameter can be any combination of the following values:
  • DMA_FLAG_TCIFx: Transfer complete flag.
  • DMA_FLAG_HTIFx: Half transfer complete flag.
  • DMA_FLAG_TEIFx: Transfer error flag.
  • DMA_FLAG_DMEIFx: Direct mode error flag.
  • DMA_FLAG_FEIFx: FIFO error flag. Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Stream flag.
Return values
None

◆ __HAL_DMA_DISABLE

#define __HAL_DMA_DISABLE (   __HANDLE__)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR &= ~DMA_SxCR_EN) : \
(((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR &= ~BDMA_CCR_EN))
Definition: stm32h723xx.h:619
DMA Controller.
Definition: stm32h723xx.h:601

Disable the specified DMA Stream.

Parameters
__HANDLE__DMA handle
Return values
None

◆ __HAL_DMA_DISABLE_IT

#define __HAL_DMA_DISABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))?\
(__HAL_DMA_STREAM_DISABLE_IT((__HANDLE__), (__INTERRUPT__))) :\
(__HAL_BDMA_CHANNEL_DISABLE_IT((__HANDLE__), (__INTERRUPT__))))

Disable the specified DMA Stream interrupts.

Parameters
__HANDLE__DMA handle
__INTERRUPT__specifies the DMA interrupt sources to be enabled or disabled. This parameter can be one of the following values:
  • DMA_IT_TC: Transfer complete interrupt mask.
  • DMA_IT_HT: Half transfer complete interrupt mask.
  • DMA_IT_TE: Transfer error interrupt mask.
  • DMA_IT_FE: FIFO error interrupt mask.
  • DMA_IT_DME: Direct mode error interrupt.
Return values
None

◆ __HAL_DMA_ENABLE

#define __HAL_DMA_ENABLE (   __HANDLE__)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR |= DMA_SxCR_EN) : \
(((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CCR |= BDMA_CCR_EN))
#define BDMA_CCR_EN
Definition: stm32h723xx.h:6835
#define DMA_SxCR_EN
Definition: stm32h723xx.h:8845

Enable the specified DMA Stream.

Parameters
__HANDLE__DMA handle
Return values
None

◆ __HAL_DMA_ENABLE_IT

#define __HAL_DMA_ENABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))?\
(__HAL_DMA_STREAM_ENABLE_IT((__HANDLE__), (__INTERRUPT__))) :\
(__HAL_BDMA_CHANNEL_ENABLE_IT((__HANDLE__), (__INTERRUPT__))))

Enable the specified DMA Stream interrupts.

Parameters
__HANDLE__DMA handle
__INTERRUPT__specifies the DMA interrupt sources to be enabled or disabled. This parameter can be one of the following values:
  • DMA_IT_TC: Transfer complete interrupt mask.
  • DMA_IT_HT: Half transfer complete interrupt mask.
  • DMA_IT_TE: Transfer error interrupt mask.
  • DMA_IT_FE: FIFO error interrupt mask.
  • DMA_IT_DME: Direct mode error interrupt.
Return values
None

◆ __HAL_DMA_GET_COUNTER

#define __HAL_DMA_GET_COUNTER (   __HANDLE__)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->NDTR) :\
(((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CNDTR))

Returns the number of remaining data units in the current DMAy Streamx transfer.

Parameters
__HANDLE__DMA handle
Return values
Thenumber of remaining data units in the current DMA Stream transfer.

◆ __HAL_DMA_GET_DME_FLAG_INDEX

#define __HAL_DMA_GET_DME_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_DMEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_DMEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_DMEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_DMEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_DMEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_DMEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_DMEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_DMEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_DMEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_DMEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_DMEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_DMEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_DMEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_DMEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_DMEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_DMEIF3_7 :\
(uint32_t)0x00000000)

Return the current DMA Stream direct mode error flag.

Parameters
__HANDLE__DMA handle
Return values
Thespecified direct mode error flag index.

◆ __HAL_DMA_GET_FE_FLAG_INDEX

#define __HAL_DMA_GET_FE_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_FEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_FEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_FEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_FEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_FEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_FEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_FEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_FEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_FEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_FEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_FEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_FEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_FEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_FEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_FEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_FEIF3_7 :\
(uint32_t)0x00000000)

Return the current DMA Stream FIFO error flag.

Parameters
__HANDLE__DMA handle
Return values
Thespecified FIFO error flag index.

◆ __HAL_DMA_GET_FLAG

#define __HAL_DMA_GET_FLAG (   __HANDLE__,
  __FLAG__ 
)
Value:
(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream7)? (BDMA->ISR & (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HISR & (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LISR & (__FLAG__)) :\
((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HISR & (__FLAG__)) : (DMA1->LISR & (__FLAG__)))

Get the DMA Stream pending flags.

Parameters
__HANDLE__DMA handle
__FLAG__Get the specified flag. This parameter can be any combination of the following values:
  • DMA_FLAG_TCIFx: Transfer complete flag.
  • DMA_FLAG_HTIFx: Half transfer complete flag.
  • DMA_FLAG_TEIFx: Transfer error flag.
  • DMA_FLAG_DMEIFx: Direct mode error flag.
  • DMA_FLAG_FEIFx: FIFO error flag. Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Stream flag.
Return values
Thestate of FLAG (SET or RESET).

◆ __HAL_DMA_GET_FS

#define __HAL_DMA_GET_FS (   __HANDLE__)    ((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR & (DMA_SxFCR_FS)) : 0)

Return the current DMA Stream FIFO filled level.

Parameters
__HANDLE__DMA handle
Return values
TheFIFO filling state.
  • DMA_FIFOStatus_Less1QuarterFull: when FIFO is less than 1 quarter-full and not empty.
  • DMA_FIFOStatus_1QuarterFull: if more than 1 quarter-full.
  • DMA_FIFOStatus_HalfFull: if more than 1 half-full.
  • DMA_FIFOStatus_3QuartersFull: if more than 3 quarters-full.
  • DMA_FIFOStatus_Empty: when FIFO is empty
  • DMA_FIFOStatus_Full: when FIFO is full

◆ __HAL_DMA_GET_HT_FLAG_INDEX

#define __HAL_DMA_GET_HT_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_HTIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_HTIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_HTIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_HTIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_HTIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_HTIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_HTIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_HTIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_HTIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_HTIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_HTIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_HTIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_HTIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_HTIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_HTIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_HTIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel0))? BDMA_FLAG_HT0 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel1))? BDMA_FLAG_HT1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel2))? BDMA_FLAG_HT2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel3))? BDMA_FLAG_HT3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel4))? BDMA_FLAG_HT4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel5))? BDMA_FLAG_HT5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel6))? BDMA_FLAG_HT6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel7))? BDMA_FLAG_HT7 :\
(uint32_t)0x00000000)

Return the current DMA Stream half transfer complete flag.

Parameters
__HANDLE__DMA handle
Return values
Thespecified half transfer complete flag index.

◆ __HAL_DMA_GET_IT_SOURCE

#define __HAL_DMA_GET_IT_SOURCE (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? \
(__HAL_DMA_STREAM_GET_IT_SOURCE((__HANDLE__), (__INTERRUPT__))) :\
(__HAL_BDMA_CHANNEL_GET_IT_SOURCE((__HANDLE__), (__INTERRUPT__))))

Check whether the specified DMA Stream interrupt is enabled or not.

Parameters
__HANDLE__DMA handle
__INTERRUPT__specifies the DMA interrupt source to check. This parameter can be one of the following values:
  • DMA_IT_TC: Transfer complete interrupt mask.
  • DMA_IT_HT: Half transfer complete interrupt mask.
  • DMA_IT_TE: Transfer error interrupt mask.
  • DMA_IT_FE: FIFO error interrupt mask.
  • DMA_IT_DME: Direct mode error interrupt.
Return values
Thestate of DMA_IT.

◆ __HAL_DMA_GET_TC_FLAG_INDEX

#define __HAL_DMA_GET_TC_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_TCIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_TCIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_TCIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_TCIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_TCIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_TCIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_TCIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TCIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_TCIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_TCIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_TCIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_TCIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_TCIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_TCIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_TCIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_TCIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel0))? BDMA_FLAG_TC0 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel1))? BDMA_FLAG_TC1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel2))? BDMA_FLAG_TC2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel3))? BDMA_FLAG_TC3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel4))? BDMA_FLAG_TC4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel5))? BDMA_FLAG_TC5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel6))? BDMA_FLAG_TC6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel7))? BDMA_FLAG_TC7 :\
(uint32_t)0x00000000)

Return the current DMA Stream transfer complete flag.

Parameters
__HANDLE__DMA handle
Return values
Thespecified transfer complete flag index.

◆ __HAL_DMA_GET_TE_FLAG_INDEX

#define __HAL_DMA_GET_TE_FLAG_INDEX (   __HANDLE__)
Value:
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_TEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_TEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_TEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_TEIF0_4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_TEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_TEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_TEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TEIF1_5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_TEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_TEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_TEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_TEIF2_6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream3))? DMA_FLAG_TEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream3))? DMA_FLAG_TEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream7))? DMA_FLAG_TEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream7))? DMA_FLAG_TEIF3_7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel0))? BDMA_FLAG_TE0 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel1))? BDMA_FLAG_TE1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel2))? BDMA_FLAG_TE2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel3))? BDMA_FLAG_TE3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel4))? BDMA_FLAG_TE4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel5))? BDMA_FLAG_TE5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel6))? BDMA_FLAG_TE6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)BDMA_Channel7))? BDMA_FLAG_TE7 :\
(uint32_t)0x00000000)

Return the current DMA Stream transfer error flag.

Parameters
__HANDLE__DMA handle
Return values
Thespecified transfer error flag index.

◆ __HAL_DMA_RESET_HANDLE_STATE

#define __HAL_DMA_RESET_HANDLE_STATE (   __HANDLE__)    ((__HANDLE__)->State = HAL_DMA_STATE_RESET)

Reset DMA handle state.

Parameters
__HANDLE__specifies the DMA handle.
Return values
None

◆ __HAL_DMA_SET_COUNTER

#define __HAL_DMA_SET_COUNTER (   __HANDLE__,
  __COUNTER__ 
)
Value:
((IS_DMA_STREAM_INSTANCE((__HANDLE__)->Instance))? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->NDTR = (uint16_t)(__COUNTER__)) :\
(((BDMA_Channel_TypeDef *)(__HANDLE__)->Instance)->CNDTR = (uint16_t)(__COUNTER__)))

Writes the number of data units to be transferred on the DMA Stream.

Parameters
__HANDLE__DMA handle
__COUNTER__Number of data units to be transferred (from 0 to 65535) Number of data items depends only on the Peripheral data format.
Note
If Peripheral data format is Bytes: number of data units is equal to total number of bytes to be transferred.
If Peripheral data format is Half-Word: number of data units is equal to total number of bytes to be transferred / 2.
If Peripheral data format is Word: number of data units is equal to total number of bytes to be transferred / 4.
Return values
Thenumber of remaining data units in the current DMAy Streamx transfer.

◆ __HAL_DMA_STREAM_DISABLE_IT

#define __HAL_DMA_STREAM_DISABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
(((__INTERRUPT__) != DMA_IT_FE)? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR &= ~(__INTERRUPT__)) : (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR &= ~(__INTERRUPT__)))

◆ __HAL_DMA_STREAM_ENABLE_IT

#define __HAL_DMA_STREAM_ENABLE_IT (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
(((__INTERRUPT__) != DMA_IT_FE)? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR |= (__INTERRUPT__)) : (((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR |= (__INTERRUPT__)))

◆ __HAL_DMA_STREAM_GET_IT_SOURCE

#define __HAL_DMA_STREAM_GET_IT_SOURCE (   __HANDLE__,
  __INTERRUPT__ 
)
Value:
(((__INTERRUPT__) != DMA_IT_FE)? \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->CR & (__INTERRUPT__)) : \
(((DMA_Stream_TypeDef *)(__HANDLE__)->Instance)->FCR & (__INTERRUPT__)))

◆ DMA_TO_BDMA_IT

#define DMA_TO_BDMA_IT (   __DMA_IT__)
Value:
((((__DMA_IT__) & (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)) == (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)) ? (BDMA_CCR_TCIE | BDMA_CCR_HTIE |BDMA_CCR_TEIE) :\
(((__DMA_IT__) & (DMA_IT_TC | DMA_IT_HT)) == (DMA_IT_TC | DMA_IT_HT)) ? (BDMA_CCR_TCIE | BDMA_CCR_HTIE) :\
(((__DMA_IT__) & (DMA_IT_HT | DMA_IT_TE)) == (DMA_IT_HT | DMA_IT_TE)) ? (BDMA_CCR_HTIE |BDMA_CCR_TEIE) :\
(((__DMA_IT__) & (DMA_IT_TC | DMA_IT_TE)) == (DMA_IT_TC | DMA_IT_TE)) ? (BDMA_CCR_TCIE |BDMA_CCR_TEIE) :\
((__DMA_IT__) == DMA_IT_TC) ? BDMA_CCR_TCIE :\
((__DMA_IT__) == DMA_IT_HT) ? BDMA_CCR_HTIE :\
((__DMA_IT__) == DMA_IT_TE) ? BDMA_CCR_TEIE :\
(uint32_t)0x00000000)
#define BDMA_CCR_TCIE
Definition: stm32h723xx.h:6838
#define BDMA_CCR_HTIE
Definition: stm32h723xx.h:6841
#define BDMA_CCR_TEIE
Definition: stm32h723xx.h:6844