19 #ifndef _RTEMS_PERCPU_H 20 #define _RTEMS_PERCPU_H 22 #include <rtems/score/cpuimpl.h> 25 #include <rtems/asm.h> 39 #if defined(RTEMS_SMP) 40 #if defined(RTEMS_PROFILING) 41 #define PER_CPU_CONTROL_SIZE_APPROX \ 42 ( 512 + CPU_PER_CPU_CONTROL_SIZE + CPU_INTERRUPT_FRAME_SIZE ) 43 #elif defined(RTEMS_DEBUG) || CPU_SIZEOF_POINTER > 4 44 #define PER_CPU_CONTROL_SIZE_APPROX \ 45 ( 256 + CPU_PER_CPU_CONTROL_SIZE + CPU_INTERRUPT_FRAME_SIZE ) 47 #define PER_CPU_CONTROL_SIZE_APPROX \ 48 ( 180 + CPU_PER_CPU_CONTROL_SIZE + CPU_INTERRUPT_FRAME_SIZE ) 57 #if PER_CPU_CONTROL_SIZE_APPROX > 1024 58 #define PER_CPU_CONTROL_SIZE_LOG2 11 59 #elif PER_CPU_CONTROL_SIZE_APPROX > 512 60 #define PER_CPU_CONTROL_SIZE_LOG2 10 61 #elif PER_CPU_CONTROL_SIZE_APPROX > 256 62 #define PER_CPU_CONTROL_SIZE_LOG2 9 63 #elif PER_CPU_CONTROL_SIZE_APPROX > 128 64 #define PER_CPU_CONTROL_SIZE_LOG2 8 66 #define PER_CPU_CONTROL_SIZE_LOG2 7 69 #define PER_CPU_CONTROL_SIZE ( 1 << PER_CPU_CONTROL_SIZE_LOG2 ) 93 #if defined( RTEMS_SMP ) 137 PER_CPU_STATE_INITIAL,
153 PER_CPU_STATE_READY_TO_START_MULTITASKING,
163 PER_CPU_STATE_REQUEST_START_MULTITASKING,
173 PER_CPU_STATE_SHUTDOWN
176 typedef void ( *Per_CPU_Job_handler )(
void *arg );
188 Per_CPU_Job_handler handler;
194 } Per_CPU_Job_context;
201 #define PER_CPU_JOB_DONE 1 209 typedef struct Per_CPU_Job {
214 struct Per_CPU_Job *next;
228 const Per_CPU_Job_context *
context;
237 #if defined( RTEMS_PROFILING ) 243 CPU_Counter_ticks thread_dispatch_disabled_instant;
249 CPU_Counter_ticks max_thread_dispatch_disabled_time;
258 CPU_Counter_ticks max_interrupt_time;
264 CPU_Counter_ticks max_interrupt_delay;
272 uint64_t thread_dispatch_disabled_count;
283 uint64_t total_thread_dispatch_disabled_time;
291 uint64_t interrupt_count;
301 uint64_t total_interrupt_time;
348 #if CPU_PER_CPU_CONTROL_SIZE > 0 407 bool reserved_for_executing_alignment[ 3 ];
438 #if defined(RTEMS_SMP) 477 #if defined( RTEMS_SMP ) 572 struct Per_CPU_Job *head;
582 struct Per_CPU_Job **tail;
603 #if defined( RTEMS_SMP ) 606 char unused_space_for_cache_line_alignment
622 #define _Per_CPU_Acquire( cpu, lock_context ) \ 623 _ISR_lock_Acquire( &( cpu )->Lock, lock_context ) 625 #define _Per_CPU_Release( cpu, lock_context ) \ 626 _ISR_lock_Release( &( cpu )->Lock, lock_context ) 635 #if defined( _CPU_Get_current_per_CPU_control ) 636 #define _Per_CPU_Get_snapshot() _CPU_Get_current_per_CPU_control() 638 #define _Per_CPU_Get_snapshot() \ 639 ( &_Per_CPU_Information[ _SMP_Get_current_processor() ].per_cpu ) 642 #if defined( RTEMS_SMP ) 654 #define _Per_CPU_Get() _Per_CPU_Get_snapshot() 659 return &_Per_CPU_Information[ index ].per_cpu;
662 static inline uint32_t _Per_CPU_Get_index(
const Per_CPU_Control *cpu )
664 #if defined(RTEMS_SMP) 668 return ( uint32_t ) ( per_cpu_envelope - &_Per_CPU_Information[ 0 ] );
682 static inline bool _Per_CPU_Is_processor_online(
686 #if defined( RTEMS_SMP ) 695 static inline bool _Per_CPU_Is_boot_processor(
699 #if defined( RTEMS_SMP ) 712 #if defined(RTEMS_SMP) 717 cpu_max = _SMP_Get_processor_maximum();
718 previous_cpu = _Per_CPU_Get_by_index( 0 );
721 _Per_CPU_Acquire( previous_cpu, lock_context );
723 for ( cpu_index = 1 ; cpu_index < cpu_max ; ++cpu_index ) {
726 cpu = _Per_CPU_Get_by_index( cpu_index );
727 _Per_CPU_Acquire( cpu, &previous_cpu->Lock_context );
739 #if defined(RTEMS_SMP) 744 cpu_max = _SMP_Get_processor_maximum();
745 cpu = _Per_CPU_Get_by_index( cpu_max - 1 );
747 for ( cpu_index = cpu_max - 1 ; cpu_index > 0 ; --cpu_index ) {
750 previous_cpu = _Per_CPU_Get_by_index( cpu_index - 1 );
751 _Per_CPU_Release( cpu, &previous_cpu->Lock_context );
755 _Per_CPU_Release( cpu, lock_context );
762 #if defined( RTEMS_SMP ) 769 void _Per_CPU_Initialize(
void);
771 void _Per_CPU_State_change(
773 Per_CPU_State new_state
801 bool _Per_CPU_State_wait_for_non_initial_state(
803 uint32_t timeout_in_ns
835 void _Per_CPU_Wait_for_job(
837 const Per_CPU_Job *job
846 #define _Thread_Dispatch_disable_level \ 847 _Per_CPU_Get()->thread_dispatch_disable_level 848 #define _Thread_Heir \ 851 #if defined(_CPU_Get_thread_executing) 852 #define _Thread_Executing \ 853 _CPU_Get_thread_executing() 855 #define _Thread_Executing \ 856 _Per_CPU_Get_executing( _Per_CPU_Get() ) 859 #define _ISR_Nest_level \ 860 _Per_CPU_Get()->isr_nest_level 861 #define _CPU_Interrupt_stack_low \ 862 _Per_CPU_Get()->interrupt_stack_low 863 #define _CPU_Interrupt_stack_high \ 864 _Per_CPU_Get()->interrupt_stack_high 865 #define _Thread_Dispatch_necessary \ 866 _Per_CPU_Get()->dispatch_necessary 882 #if defined(RTEMS_SMP) && !defined(_CPU_Get_thread_executing) 890 #if defined(RTEMS_SMP) && !defined(_CPU_Get_thread_executing) 901 #if defined( ASM ) || defined( _RTEMS_PERCPU_DEFINE_OFFSETS ) 903 #define PER_CPU_INTERRUPT_STACK_LOW \ 904 CPU_PER_CPU_CONTROL_SIZE 905 #define PER_CPU_INTERRUPT_STACK_HIGH \ 906 PER_CPU_INTERRUPT_STACK_LOW + CPU_SIZEOF_POINTER 908 #define INTERRUPT_STACK_LOW \ 909 (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_LOW) 910 #define INTERRUPT_STACK_HIGH \ 911 (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_HIGH) 916 #define PER_CPU_ISR_NEST_LEVEL \ 917 PER_CPU_INTERRUPT_STACK_HIGH + CPU_SIZEOF_POINTER 918 #define PER_CPU_ISR_DISPATCH_DISABLE \ 919 PER_CPU_ISR_NEST_LEVEL + 4 920 #define PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL \ 921 PER_CPU_ISR_DISPATCH_DISABLE + 4 922 #define PER_CPU_DISPATCH_NEEDED \ 923 PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL + 4 924 #define PER_CPU_OFFSET_EXECUTING \ 925 PER_CPU_DISPATCH_NEEDED + 4 926 #define PER_CPU_OFFSET_HEIR \ 927 PER_CPU_OFFSET_EXECUTING + CPU_SIZEOF_POINTER 928 #if defined(RTEMS_SMP) 929 #define PER_CPU_INTERRUPT_FRAME_AREA \ 930 PER_CPU_OFFSET_HEIR + CPU_SIZEOF_POINTER 933 #define THREAD_DISPATCH_DISABLE_LEVEL \ 934 (SYM(_Per_CPU_Information) + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL) 935 #define ISR_NEST_LEVEL \ 936 (SYM(_Per_CPU_Information) + PER_CPU_ISR_NEST_LEVEL) 937 #define DISPATCH_NEEDED \ 938 (SYM(_Per_CPU_Information) + PER_CPU_DISPATCH_NEEDED) Per-CPU statistics.
Definition: percpu.h:236
void * interrupt_stack_high
The interrupt stack high address for this processor.
Definition: percpu.h:363
Index for realtime clock per-CPU watchdog header.
Definition: percpu.h:325
Definition: media-server.c:33
int64_t Timestamp_Control
Definition: timestamp.h:57
Count of per-CPU watchdog headers.
Definition: percpu.h:339
Watchdog_Header Header[PER_CPU_WATCHDOG_COUNT]
Header for watchdogs.
Definition: percpu.h:474
Scheduler context.
Definition: scheduler.h:252
#define _ISR_Local_disable(_level)
Disables interrupts on this processor.
Definition: isrlevel.h:57
struct _Thread_Control * executing
This is the thread executing on this processor.
Definition: percpu.h:420
uint64_t ticks
Protects all watchdog operations on this processor.
Definition: percpu.h:467
Interrupt stack frame (ISF).
Definition: cpu.h:191
Helpers for Manipulating Timestamps.
#define _ISR_lock_ISR_enable(_context)
Restores the saved interrupt state of the ISR lock context.
Definition: isrlock.h:419
Thread_Scheduler_control Scheduler
Scheduler related control.
Definition: thread.h:771
Per_CPU_Control_envelope _Per_CPU_Information [] CPU_STRUCTURE_ALIGNMENT
Set of Per CPU Core Information.
#define _ISR_Get_level()
Return current interrupt level.
Definition: isrlevel.h:128
Timestamp_Control cpu_usage_timestamp
The CPU usage timestamp contains the time point of the last heir thread change or last CPU usage upda...
Definition: percpu.h:452
ISR lock control.
Definition: isrlock.h:56
SuperCore SMP Support API.
Information for the Assert Handler.
Per_CPU_Watchdog_index
Per-CPU watchdog header index.
Definition: percpu.h:308
The CPU specific per-CPU control.
Definition: cpuimpl.h:54
#define ISR_LOCK_MEMBER(_designator)
Defines an ISR lock member.
Definition: isrlock.h:89
Per CPU Core Structure.
Definition: percpu.h:347
uint32_t ISR_Level
Definition: isrlevel.h:41
#define _ISR_Local_enable(_level)
Enables interrupts on this processor.
Definition: isrlevel.h:74
uint32_t isr_nest_level
Definition: percpu.h:369
void * interrupt_stack_low
The interrupt stack low address for this processor.
Definition: percpu.h:358
Constants and Structures Associated with Watchdog Timers.
uint32_t isr_dispatch_disable
Indicates if an ISR thread dispatch is disabled.
Definition: percpu.h:379
Definition: intercom.c:74
volatile bool dispatch_necessary
This is set to true when this processor needs to run the thread dispatcher.
Definition: percpu.h:400
struct _Thread_Control * heir
This is the heir thread for this processor.
Definition: percpu.h:436
struct Per_CPU_Control Per_CPU_Control
Per CPU Core Structure.
unsigned context
Definition: tlb.h:108
RTEMS_INLINE_ROUTINE struct _Thread_Control * _Thread_Get_executing(void)
Returns the thread control block of the executing thread.
Definition: percpu.h:878
Scheduler control.
Definition: scheduler.h:269
volatile uint32_t thread_dispatch_disable_level
The thread dispatch critical section nesting counter which is used to prevent context switches at ino...
Definition: percpu.h:385
#define _ISR_lock_ISR_disable(_context)
Disables interrupts and saves the previous interrupt state in the ISR lock context.
Definition: isrlock.h:398
Index for monotonic clock per-CPU watchdog header.
Definition: percpu.h:334
Local ISR lock context for acquire and release pairs.
Definition: isrlock.h:65
Index for tick clock per-CPU watchdog header.
Definition: percpu.h:316
#define RTEMS_INLINE_ROUTINE
Definition: basedefs.h:66
struct Per_CPU_Control::@3977 Watchdog
Watchdog state for this processor.
#define _Assert(_e)
Assertion similar to assert() controlled via RTEMS_DEBUG instead of NDEBUG.
Definition: assert.h:100