Interrupt stack frame (ISF). More...

#include <cpu.h>

Public Attributes
SPARC_Minimum_stack_frame	Stack_frame

uint32_t	psr

uint32_t	pc

uint32_t	npc

uint32_t	g1

uint32_t	g2

uint32_t	g3

uint32_t	g4

uint32_t	g5

uint32_t	reserved_for_alignment

uint32_t	g7

uint32_t	i0

uint32_t	i1

uint32_t	i2

uint32_t	i3

uint32_t	i4

uint32_t	i5

uint32_t	i6_fp

uint32_t	i7

uint32_t	y

uint32_t	tpc

Detailed Description

Interrupt stack frame (ISF).

Context saved on stack for an interrupt.

NOTE: The PSR, PC, and NPC are only saved in this structure for the benefit of the user's handler.

Definition at line 571 of file cpu.h.

Member Data Documentation

◆ g1

uint32_t CPU_Interrupt_frame::g1

This is the offset of the g1 register on an ISF.

Definition at line 581 of file cpu.h.

◆ g2

uint32_t CPU_Interrupt_frame::g2

This is the offset of the g2 register on an ISF.

Definition at line 583 of file cpu.h.

◆ g3

uint32_t CPU_Interrupt_frame::g3

This is the offset of the g3 register on an ISF.

Definition at line 585 of file cpu.h.

◆ g4

uint32_t CPU_Interrupt_frame::g4

This is the offset of the g4 register on an ISF.

Definition at line 587 of file cpu.h.

◆ g5

uint32_t CPU_Interrupt_frame::g5

This is the offset of the g5 register on an ISF.

Definition at line 589 of file cpu.h.

◆ g7

uint32_t CPU_Interrupt_frame::g7

This is the offset of the g7 register on an ISF.

Definition at line 593 of file cpu.h.

◆ i0

uint32_t CPU_Interrupt_frame::i0

This is the offset of the i0 register on an ISF.

Definition at line 595 of file cpu.h.

◆ i1

uint32_t CPU_Interrupt_frame::i1

This is the offset of the i1 register on an ISF.

Definition at line 597 of file cpu.h.

◆ i2

uint32_t CPU_Interrupt_frame::i2

This is the offset of the i2 register on an ISF.

Definition at line 599 of file cpu.h.

◆ i3

uint32_t CPU_Interrupt_frame::i3

This is the offset of the i3 register on an ISF.

Definition at line 601 of file cpu.h.

◆ i4

uint32_t CPU_Interrupt_frame::i4

This is the offset of the i4 register on an ISF.

Definition at line 603 of file cpu.h.

◆ i5

uint32_t CPU_Interrupt_frame::i5

This is the offset of the i5 register on an ISF.

Definition at line 605 of file cpu.h.

◆ i6_fp

uint32_t CPU_Interrupt_frame::i6_fp

This is the offset of the i6 register on an ISF.

Definition at line 607 of file cpu.h.

◆ i7

uint32_t CPU_Interrupt_frame::i7

This is the offset of the i7 register on an ISF.

Definition at line 609 of file cpu.h.

◆ npc

uint32_t CPU_Interrupt_frame::npc

This is the offset of the XXX on an ISF.

Definition at line 579 of file cpu.h.

◆ pc

uint32_t CPU_Interrupt_frame::pc

This is the offset of the XXX on an ISF.

Definition at line 577 of file cpu.h.

◆ psr

uint32_t CPU_Interrupt_frame::psr

This is the offset of the PSR on an ISF.

Definition at line 575 of file cpu.h.

◆ reserved_for_alignment

uint32_t CPU_Interrupt_frame::reserved_for_alignment

This is the offset is reserved for alignment on an ISF.

Definition at line 591 of file cpu.h.

◆ Stack_frame

SPARC_Minimum_stack_frame CPU_Interrupt_frame::Stack_frame

On an interrupt, we must save the minimum stack frame.

Definition at line 573 of file cpu.h.

◆ tpc

uint32_t CPU_Interrupt_frame::tpc

This is the offset of the tpc register on an ISF.

Definition at line 613 of file cpu.h.

◆ y

uint32_t CPU_Interrupt_frame::y

This is the offset of the y register on an ISF.

Definition at line 611 of file cpu.h.

The documentation for this struct was generated from the following file:

cpukit/score/cpu/sparc/include/rtems/score/cpu.h

Public Attributes