ppc_exc_asm_macros.h File Reference

Low-level assembly code for PPC exceptions. More...

#include <bspopts.h>
#include <bsp/vectors.h>
#include <libcpu/powerpc-utility.h>

Go to the source code of this file.

Macros
#define	LT(cr)   ((cr)*4+0)
#define	GT(cr)   ((cr)*4+1)
#define	EQ(cr)   ((cr)*4+2)
#define	STW_R1_R13(off)   ((((36<<10)|(r1<<5)|(r13))<<16) | ((off)&0xffff))
#define	FRAME_REGISTER   r14
#define	VECTOR_REGISTER   r4
#define	SCRATCH_REGISTER_0   r5
#define	SCRATCH_REGISTER_1   r6
#define	SCRATCH_REGISTER_2   r7
#define	FRAME_OFFSET(r)   GPR14_OFFSET( r)
#define	VECTOR_OFFSET(r)   GPR4_OFFSET( r)
#define	SCRATCH_REGISTER_0_OFFSET(r)   GPR5_OFFSET( r)
#define	SCRATCH_REGISTER_1_OFFSET(r)   GPR6_OFFSET( r)
#define	SCRATCH_REGISTER_2_OFFSET(r)   GPR7_OFFSET( r)
#define	CR_TYPE   2
#define	CR_MSR   3
#define	CR_LOCK   4

Functions
macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_ ppc_exc_lock_ _PRI	sdarel (r13) stw VECTOR_REGISTER
macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_ ppc_exc_lock_ _PRI ppc_exc_vector_register_ _PRI _VEC int ppc_exc_wrap_ _FLVR endm macro PPC_EXC_MIN_PROLOG_SYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_sync_ _NAME ppc_exc_min_prolog_sync_	EXCEPTION_FRAME_END (r1) stw VECTOR_REGISTER
macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_ ppc_exc_lock_ _PRI ppc_exc_vector_register_ _PRI _VEC int ppc_exc_wrap_ _FLVR endm macro PPC_EXC_MIN_PROLOG_SYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_sync_ _NAME ppc_exc_min_prolog_sync_	VECTOR_OFFSET (r1) li VECTOR_REGISTER
macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_ ppc_exc_lock_ _PRI ppc_exc_vector_register_ _PRI _VEC int ppc_exc_wrap_ _FLVR endm macro PPC_EXC_MIN_PROLOG_SYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_sync_ _NAME ppc_exc_min_prolog_sync_ _VEC int ppc_exc_wrap_nopush_ _FLVR endm macro TEST_1ST_OPCODE_crit _REG lwz	SRR0_FRAME_OFFSET (FRAME_REGISTER) lwz \_REG
macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_ ppc_exc_lock_ _PRI ppc_exc_vector_register_ _PRI _VEC int ppc_exc_wrap_ _FLVR endm macro PPC_EXC_MIN_PROLOG_SYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_sync_ _NAME ppc_exc_min_prolog_sync_ _VEC int ppc_exc_wrap_nopush_ _FLVR endm macro TEST_1ST_OPCODE_crit _REG lwz _REG subis	STW_R1_R13 (0) @h cmplwi cr0
macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_ ppc_exc_lock_ _PRI ppc_exc_vector_register_ _PRI _VEC int ppc_exc_wrap_ _FLVR endm macro PPC_EXC_MIN_PROLOG_SYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_sync_ _NAME ppc_exc_min_prolog_sync_ _VEC int ppc_exc_wrap_nopush_ _FLVR endm macro TEST_1ST_OPCODE_crit _REG lwz _REG subis ppc_exc_lock_std sdarel endm macro TEST_LOCK_std _FLVR creqv	EQ (CR_LOCK)
macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_ ppc_exc_lock_ _PRI ppc_exc_vector_register_ _PRI _VEC int ppc_exc_wrap_ _FLVR endm macro PPC_EXC_MIN_PROLOG_SYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_sync_ _NAME ppc_exc_min_prolog_sync_ _VEC int ppc_exc_wrap_nopush_ _FLVR endm macro TEST_1ST_OPCODE_crit _REG lwz _REG subis ppc_exc_lock_std sdarel endm macro TEST_LOCK_std _FLVR creqv MSR_CE h beq TEST_LOCK_crit_done_ _FLVR TEST_1ST_OPCODE_crit ppc_exc_lock_std TEST_LOCK_crit_done_	EQ (0) .endm .macro TEST_LOCK_mchk _SRR0 _FLVR crxor EQ(CR_LOCK)
macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_ ppc_exc_lock_ _PRI ppc_exc_vector_register_ _PRI _VEC int ppc_exc_wrap_ _FLVR endm macro PPC_EXC_MIN_PROLOG_SYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_sync_ _NAME ppc_exc_min_prolog_sync_ _VEC int ppc_exc_wrap_nopush_ _FLVR endm macro TEST_1ST_OPCODE_crit _REG lwz _REG subis ppc_exc_lock_std sdarel endm macro TEST_LOCK_std _FLVR creqv MSR_CE h beq TEST_LOCK_crit_done_ _FLVR TEST_1ST_OPCODE_crit ppc_exc_lock_std TEST_LOCK_crit_done_	SRR1_FRAME_OFFSET (FRAME_REGISTER) lwz SCRATCH_REGISTER_1

Variables
macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_	_NAME
macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_ ppc_exc_lock_ _PRI ppc_exc_vector_register_ _PRI _VEC int ppc_exc_wrap_ _FLVR endm macro PPC_EXC_MIN_PROLOG_SYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_sync_ _NAME ppc_exc_min_prolog_sync_ _VEC int ppc_exc_wrap_nopush_ _FLVR endm macro TEST_1ST_OPCODE_crit _REG lwz	_REG
macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_ ppc_exc_lock_ _PRI ppc_exc_vector_register_ _PRI _VEC int ppc_exc_wrap_ _FLVR endm macro PPC_EXC_MIN_PROLOG_SYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_sync_ _NAME ppc_exc_min_prolog_sync_ _VEC int ppc_exc_wrap_nopush_ _FLVR endm macro TEST_1ST_OPCODE_crit _REG lwz _REG subis ppc_exc_lock_std sdarel endm macro TEST_LOCK_std _FLVR creqv	SCRATCH_REGISTER_1
macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_ ppc_exc_lock_ _PRI ppc_exc_vector_register_ _PRI _VEC int ppc_exc_wrap_ _FLVR endm macro PPC_EXC_MIN_PROLOG_SYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_sync_ _NAME ppc_exc_min_prolog_sync_ _VEC int ppc_exc_wrap_nopush_ _FLVR endm macro TEST_1ST_OPCODE_crit _REG lwz _REG subis ppc_exc_lock_std sdarel endm macro TEST_LOCK_std _FLVR creqv MSR_CE h beq TEST_LOCK_crit_done_ _FLVR TEST_1ST_OPCODE_crit ppc_exc_lock_std TEST_LOCK_crit_done_	_FLVR
macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_ ppc_exc_lock_ _PRI ppc_exc_vector_register_ _PRI _VEC int ppc_exc_wrap_ _FLVR endm macro PPC_EXC_MIN_PROLOG_SYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_sync_ _NAME ppc_exc_min_prolog_sync_ _VEC int ppc_exc_wrap_nopush_ _FLVR endm macro TEST_1ST_OPCODE_crit _REG lwz _REG subis ppc_exc_lock_std sdarel endm macro TEST_LOCK_std _FLVR creqv MSR_CE h beq TEST_LOCK_crit_done_ _FLVR TEST_1ST_OPCODE_crit ppc_exc_lock_std TEST_LOCK_crit_done_ ppc_exc_msr_bits SCRATCH_REGISTER_0 andi	SCRATCH_REGISTER_0

Detailed Description

Low-level assembly code for PPC exceptions.

This file was written with the goal to eliminate ALL #ifdef <cpu_flavor> conditionals – please do not reintroduce such statements.

Function Documentation

EQ()

macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_ ppc_exc_lock_ _PRI ppc_exc_vector_register_ _PRI _VEC int ppc_exc_wrap_ _FLVR endm macro PPC_EXC_MIN_PROLOG_SYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_sync_ _NAME ppc_exc_min_prolog_sync_ _VEC int ppc_exc_wrap_nopush_ _FLVR endm macro TEST_1ST_OPCODE_crit _REG lwz _REG subis ppc_exc_lock_std sdarel endm macro TEST_LOCK_std _FLVR creqv MSR_CE h beq TEST_LOCK_crit_done_ _FLVR TEST_1ST_OPCODE_crit ppc_exc_lock_std TEST_LOCK_crit_done_ EQ

(

CR_LOCK

)

Initial value:

=SCRATCH_REGISTER_1
    
    andis.  SCRATCH_REGISTER_1

Variable Documentation

_REG

macro PPC_EXC_MIN_PROLOG_ASYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_async_ _NAME ppc_exc_min_prolog_async_ ppc_exc_lock_ _PRI ppc_exc_vector_register_ _PRI _VEC int ppc_exc_wrap_ _FLVR endm macro PPC_EXC_MIN_PROLOG_SYNC _NAME _VEC _PRI _FLVR global ppc_exc_min_prolog_sync_ _NAME ppc_exc_min_prolog_sync_ _VEC int ppc_exc_wrap_nopush_ _FLVR endm macro TEST_1ST_OPCODE_crit _REG lwz _REG subis ppc_exc_lock_std sdarel endm macro TEST_LOCK_std _FLVR creqv MSR_CE h beq TEST_LOCK_crit_done_ _FLVR TEST_1ST_OPCODE_crit _REG

Initial value:

=SCRATCH_REGISTER_0
    
 
    
    lwz SCRATCH_REGISTER_1