RTEMS 6.1-rc5
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This file contains all the functions prototypes for the HAL module driver. More...
#include "stm32h7xx_hal_conf.h"
Go to the source code of this file.
Macros | |
#define | REV_ID_Y ((uint32_t)0x1003) |
#define | REV_ID_B ((uint32_t)0x2000) |
#define | REV_ID_X ((uint32_t)0x2001) |
#define | REV_ID_V ((uint32_t)0x2003) |
#define | SYSCFG_VREFBUF_VOLTAGE_SCALE0 VREFBUF_CSR_VRS_OUT1 |
#define | SYSCFG_VREFBUF_VOLTAGE_SCALE1 VREFBUF_CSR_VRS_OUT2 |
#define | SYSCFG_VREFBUF_VOLTAGE_SCALE2 VREFBUF_CSR_VRS_OUT3 |
#define | SYSCFG_VREFBUF_VOLTAGE_SCALE3 VREFBUF_CSR_VRS_OUT4 |
#define | IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(__SCALE__) |
#define | SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE ((uint32_t)0x00000000) |
#define | SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE VREFBUF_CSR_HIZ |
#define | IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(__VALUE__) |
#define | IS_SYSCFG_VREFBUF_TRIMMING(__VALUE__) (((__VALUE__) > 0UL) && ((__VALUE__) <= VREFBUF_CCR_TRIM)) |
#define | SYSCFG_FASTMODEPLUS_PB6 SYSCFG_PMCR_I2C_PB6_FMP |
Fast-mode Plus driving capability on a specific GPIO. | |
#define | SYSCFG_FASTMODEPLUS_PB7 SYSCFG_PMCR_I2C_PB7_FMP |
#define | SYSCFG_FASTMODEPLUS_PB8 SYSCFG_PMCR_I2C_PB8_FMP |
#define | SYSCFG_FASTMODEPLUS_PB9 SYSCFG_PMCR_I2C_PB9_FMP |
#define | IS_SYSCFG_FASTMODEPLUS(__PIN__) |
#define | SYSCFG_ETH_MII ((uint32_t)0x00000000) |
#define | SYSCFG_ETH_RMII SYSCFG_PMCR_EPIS_SEL_2 |
#define | IS_SYSCFG_ETHERNET_CONFIG(CONFIG) |
#define | SYSCFG_SWITCH_PA0 SYSCFG_PMCR_PA0SO |
#define | SYSCFG_SWITCH_PA1 SYSCFG_PMCR_PA1SO |
#define | SYSCFG_SWITCH_PC2 SYSCFG_PMCR_PC2SO |
#define | SYSCFG_SWITCH_PC3 SYSCFG_PMCR_PC3SO |
#define | SYSCFG_SWITCH_PA0_OPEN SYSCFG_PMCR_PA0SO |
#define | SYSCFG_SWITCH_PA0_CLOSE ((uint32_t)0x00000000) |
#define | SYSCFG_SWITCH_PA1_OPEN SYSCFG_PMCR_PA1SO |
#define | SYSCFG_SWITCH_PA1_CLOSE ((uint32_t)0x00000000) |
#define | SYSCFG_SWITCH_PC2_OPEN SYSCFG_PMCR_PC2SO |
#define | SYSCFG_SWITCH_PC2_CLOSE ((uint32_t)0x00000000) |
#define | SYSCFG_SWITCH_PC3_OPEN SYSCFG_PMCR_PC3SO |
#define | SYSCFG_SWITCH_PC3_CLOSE ((uint32_t)0x00000000) |
#define | IS_SYSCFG_ANALOG_SWITCH(SWITCH) |
#define | IS_SYSCFG_SWITCH_STATE(STATE) |
#define | SYSCFG_BOOT_ADDR0 ((uint32_t)0x00000000) |
#define | SYSCFG_BOOT_ADDR1 ((uint32_t)0x00000001) |
#define | IS_SYSCFG_BOOT_REGISTER(REGISTER) |
#define | IS_SYSCFG_BOOT_ADDRESS(ADDRESS) ((ADDRESS) < PERIPH_BASE) |
#define | SYSCFG_CELL_CODE ((uint32_t)0x00000000) |
#define | SYSCFG_REGISTER_CODE SYSCFG_CCCSR_CS |
#define | IS_SYSCFG_CODE_SELECT(SELECT) |
#define | IS_SYSCFG_CODE_CONFIG(CONFIG) ((CONFIG) < (0x10UL)) |
#define | EXTI_MODE_IT ((uint32_t)0x00010000) |
#define | EXTI_MODE_EVT ((uint32_t)0x00020000) |
#define | EXTI_RISING_EDGE ((uint32_t)0x00100000) |
#define | EXTI_FALLING_EDGE ((uint32_t)0x00200000) |
#define | IS_EXTI_EDGE_LINE(EDGE) (((EDGE) == EXTI_RISING_EDGE) || ((EDGE) == EXTI_FALLING_EDGE)) |
#define | IS_EXTI_MODE_LINE(MODE) (((MODE) == EXTI_MODE_IT) || ((MODE) == EXTI_MODE_EVT)) |
#define | EXTI_LINE0 ((uint32_t)0x00) |
#define | EXTI_LINE1 ((uint32_t)0x01) |
#define | EXTI_LINE2 ((uint32_t)0x02) |
#define | EXTI_LINE3 ((uint32_t)0x03) |
#define | EXTI_LINE4 ((uint32_t)0x04) |
#define | EXTI_LINE5 ((uint32_t)0x05) |
#define | EXTI_LINE6 ((uint32_t)0x06) |
#define | EXTI_LINE7 ((uint32_t)0x07) |
#define | EXTI_LINE8 ((uint32_t)0x08) |
#define | EXTI_LINE9 ((uint32_t)0x09) |
#define | EXTI_LINE10 ((uint32_t)0x0A) |
#define | EXTI_LINE11 ((uint32_t)0x0B) |
#define | EXTI_LINE12 ((uint32_t)0x0C) |
#define | EXTI_LINE13 ((uint32_t)0x0D) |
#define | EXTI_LINE14 ((uint32_t)0x0E) |
#define | EXTI_LINE15 ((uint32_t)0x0F) |
#define | EXTI_LINE16 ((uint32_t)0x10) |
#define | EXTI_LINE17 ((uint32_t)0x11) |
#define | EXTI_LINE18 ((uint32_t)0x12) |
#define | EXTI_LINE19 ((uint32_t)0x13) |
#define | EXTI_LINE20 ((uint32_t)0x14) |
#define | EXTI_LINE21 ((uint32_t)0x15) |
#define | EXTI_LINE22 ((uint32_t)0x16) |
#define | EXTI_LINE23 ((uint32_t)0x17) |
#define | EXTI_LINE24 ((uint32_t)0x18) |
#define | EXTI_LINE25 ((uint32_t)0x19) |
#define | EXTI_LINE26 ((uint32_t)0x1A) |
#define | EXTI_LINE27 ((uint32_t)0x1B) |
#define | EXTI_LINE28 ((uint32_t)0x1C) |
#define | EXTI_LINE29 ((uint32_t)0x1D) |
#define | EXTI_LINE30 ((uint32_t)0x1E) |
#define | EXTI_LINE31 ((uint32_t)0x1F) |
#define | EXTI_LINE32 ((uint32_t)0x20) |
#define | EXTI_LINE33 ((uint32_t)0x21) |
#define | EXTI_LINE34 ((uint32_t)0x22) |
#define | EXTI_LINE35 ((uint32_t)0x23) |
#define | EXTI_LINE36 ((uint32_t)0x24) |
#define | EXTI_LINE37 ((uint32_t)0x25) |
#define | EXTI_LINE38 ((uint32_t)0x26) |
#define | EXTI_LINE39 ((uint32_t)0x27) |
#define | EXTI_LINE40 ((uint32_t)0x28) |
#define | EXTI_LINE41 ((uint32_t)0x29) |
#define | EXTI_LINE42 ((uint32_t)0x2A) |
#define | EXTI_LINE43 ((uint32_t)0x2B) |
#define | EXTI_LINE44 ((uint32_t)0x2C) /* Not available in all family lines */ |
#define | EXTI_LINE47 ((uint32_t)0x2F) |
#define | EXTI_LINE48 ((uint32_t)0x30) |
#define | EXTI_LINE49 ((uint32_t)0x31) |
#define | EXTI_LINE50 ((uint32_t)0x32) |
#define | EXTI_LINE51 ((uint32_t)0x33) |
#define | EXTI_LINE52 ((uint32_t)0x34) |
#define | EXTI_LINE53 ((uint32_t)0x35) |
#define | EXTI_LINE54 ((uint32_t)0x36) |
#define | EXTI_LINE55 ((uint32_t)0x37) |
#define | EXTI_LINE56 ((uint32_t)0x38) |
#define | EXTI_LINE57 ((uint32_t)0x39) |
#define | EXTI_LINE58 ((uint32_t)0x3A) |
#define | EXTI_LINE59 ((uint32_t)0x3B) |
#define | EXTI_LINE60 ((uint32_t)0x3C) |
#define | EXTI_LINE61 ((uint32_t)0x3D) |
#define | EXTI_LINE62 ((uint32_t)0x3E) |
#define | EXTI_LINE63 ((uint32_t)0x3F) |
#define | EXTI_LINE64 ((uint32_t)0x40) |
#define | EXTI_LINE65 ((uint32_t)0x41) |
#define | EXTI_LINE66 ((uint32_t)0x42) |
#define | EXTI_LINE67 ((uint32_t)0x43) |
#define | EXTI_LINE68 ((uint32_t)0x44) |
#define | EXTI_LINE69 ((uint32_t)0x45) |
#define | EXTI_LINE70 ((uint32_t)0x46) |
#define | EXTI_LINE71 ((uint32_t)0x47) |
#define | EXTI_LINE72 ((uint32_t)0x48) |
#define | EXTI_LINE73 ((uint32_t)0x49) |
#define | EXTI_LINE74 ((uint32_t)0x4A) |
#define | EXTI_LINE75 ((uint32_t)0x4B) /* Not available in all family lines */ |
#define | EXTI_LINE76 ((uint32_t)0x4C) /* Not available in all family lines */ |
#define | EXTI_LINE85 ((uint32_t)0x55) |
#define | EXTI_LINE86 ((uint32_t)0x56) /* Not available in all family lines */ |
#define | EXTI_LINE87 ((uint32_t)0x57) |
#define | EXTI_LINE88 ((uint32_t)0x58) /* Not available in all family lines */ |
#define | EXTI_LINE89 ((uint32_t)0x59) /* Not available in all family lines */ |
#define | EXTI_LINE90 ((uint32_t)0x5A) /* Not available in all family lines */ |
#define | EXTI_LINE91 ((uint32_t)0x5B) /* Not available in all family lines */ |
#define | IS_HAL_EXTI_CONFIG_LINE(LINE) |
#define | IS_EXTI_ALL_LINE(LINE) |
#define | IS_EXTI_D1_LINE(LINE) |
#define | IS_EXTI_D3_LINE(LINE) |
#define | BDMA_CH6_CLEAR ((uint32_t)0x00000000) |
#define | BDMA_CH7_CLEAR ((uint32_t)0x00000001) |
#define | LPTIM2_OUT_CLEAR ((uint32_t)0x00000002) |
#define | LPTIM3_OUT_CLEAR ((uint32_t)0x00000003) |
#define | IS_EXTI_D3_CLEAR(SOURCE) |
#define | FMC_SWAPBMAP_DISABLE (0x00000000U) |
#define | FMC_SWAPBMAP_SDRAM_SRAM FMC_BCR1_BMAP_0 |
#define | FMC_SWAPBMAP_SDRAMB2 FMC_BCR1_BMAP_1 |
#define | IS_FMC_SWAPBMAP_MODE(__MODE__) |
#define | __HAL_SYSCFG_BREAK_AXISRAM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_AXISRAML) |
SYSCFG Break AXIRAM double ECC lock. Enable and lock the connection of AXIRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. | |
#define | __HAL_SYSCFG_BREAK_ITCM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_ITCML) |
SYSCFG Break ITCM double ECC lock. Enable and lock the connection of ITCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. | |
#define | __HAL_SYSCFG_BREAK_DTCM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_DTCML) |
SYSCFG Break DTCM double ECC lock. Enable and lock the connection of DTCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. | |
#define | __HAL_SYSCFG_BREAK_SRAM1_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM1L) |
SYSCFG Break SRAM1 double ECC lock. Enable and lock the connection of SRAM1 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. | |
#define | __HAL_SYSCFG_BREAK_SRAM2_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM2L) |
SYSCFG Break SRAM2 double ECC lock. Enable and lock the connection of SRAM2 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. | |
#define | __HAL_SYSCFG_BREAK_SRAM3_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM3L) |
SYSCFG Break SRAM3 double ECC lock. Enable and lock the connection of SRAM3 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. | |
#define | __HAL_SYSCFG_BREAK_SRAM4_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM4L) |
SYSCFG Break SRAM4 double ECC lock. Enable and lock the connection of SRAM4 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. | |
#define | __HAL_SYSCFG_BREAK_BKRAM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_BKRAML) |
SYSCFG Break Backup SRAM double ECC lock. Enable and lock the connection of Backup SRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. | |
#define | __HAL_SYSCFG_BREAK_CM7_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_CM7L) |
SYSCFG Break Cortex-M7 Lockup lock. Enable and lock the connection of Cortex-M7 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input. | |
#define | __HAL_SYSCFG_BREAK_FLASH_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_FLASHL) |
SYSCFG Break FLASH double ECC lock. Enable and lock the connection of Flash double ECC error connection to TIM1/8/15/16/17 and HRTIMER Break input. | |
#define | __HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_PVDL) |
SYSCFG Break PVD lock. Enable and lock the PVD connection to Timer1/8/15/16/17 and HRTIMER Break input, as well as the PVDE and PLS[2:0] in the PWR_CR1 register. | |
#define | __HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__) |
Fast-mode Plus driving capability enable/disable macros. | |
#define | __HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__) |
#define | __HAL_DBGMCU_FREEZE_WWDG1() (DBGMCU->APB3FZ1 |= (DBGMCU_APB3FZ1_DBG_WWDG1)) |
Freeze/Unfreeze Peripherals in Debug mode. | |
#define | __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM2)) |
#define | __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM3)) |
#define | __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM4)) |
#define | __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM5)) |
#define | __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM6)) |
#define | __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM7)) |
#define | __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM12)) |
#define | __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM13)) |
#define | __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM14)) |
#define | __HAL_DBGMCU_FREEZE_LPTIM1() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_LPTIM1)) |
#define | __HAL_DBGMCU_FREEZE_I2C1() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C1)) |
#define | __HAL_DBGMCU_FREEZE_I2C2() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C2)) |
#define | __HAL_DBGMCU_FREEZE_I2C3() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C3)) |
#define | __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM1)) |
#define | __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM8)) |
#define | __HAL_DBGMCU_FREEZE_TIM15() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM15)) |
#define | __HAL_DBGMCU_FREEZE_TIM16() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM16)) |
#define | __HAL_DBGMCU_FREEZE_TIM17() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM17)) |
#define | __HAL_DBGMCU_FREEZE_HRTIM() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_HRTIM)) |
#define | __HAL_DBGMCU_FREEZE_I2C4() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_I2C4)) |
#define | __HAL_DBGMCU_FREEZE_LPTIM2() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM2)) |
#define | __HAL_DBGMCU_FREEZE_LPTIM3() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM3)) |
#define | __HAL_DBGMCU_FREEZE_LPTIM4() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM4)) |
#define | __HAL_DBGMCU_FREEZE_LPTIM5() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM5)) |
#define | __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_RTC)) |
#define | __HAL_DBGMCU_FREEZE_IWDG1() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_IWDG1)) |
#define | __HAL_DBGMCU_UnFreeze_WWDG1() (DBGMCU->APB3FZ1 &= ~ (DBGMCU_APB3FZ1_DBG_WWDG1)) |
#define | __HAL_DBGMCU_UnFreeze_TIM2() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM2)) |
#define | __HAL_DBGMCU_UnFreeze_TIM3() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM3)) |
#define | __HAL_DBGMCU_UnFreeze_TIM4() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM4)) |
#define | __HAL_DBGMCU_UnFreeze_TIM5() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM5)) |
#define | __HAL_DBGMCU_UnFreeze_TIM6() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM6)) |
#define | __HAL_DBGMCU_UnFreeze_TIM7() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM7)) |
#define | __HAL_DBGMCU_UnFreeze_TIM12() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM12)) |
#define | __HAL_DBGMCU_UnFreeze_TIM13() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM13)) |
#define | __HAL_DBGMCU_UnFreeze_TIM14() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM14)) |
#define | __HAL_DBGMCU_UnFreeze_LPTIM1() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_LPTIM1)) |
#define | __HAL_DBGMCU_UnFreeze_I2C1() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C1)) |
#define | __HAL_DBGMCU_UnFreeze_I2C2() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C2)) |
#define | __HAL_DBGMCU_UnFreeze_I2C3() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C3)) |
#define | __HAL_DBGMCU_UnFreeze_TIM1() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM1)) |
#define | __HAL_DBGMCU_UnFreeze_TIM8() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM8)) |
#define | __HAL_DBGMCU_UnFreeze_TIM15() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM15)) |
#define | __HAL_DBGMCU_UnFreeze_TIM16() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM16)) |
#define | __HAL_DBGMCU_UnFreeze_TIM17() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM17)) |
#define | __HAL_DBGMCU_UnFreeze_HRTIM() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_HRTIM)) |
#define | __HAL_DBGMCU_UnFreeze_I2C4() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_I2C4)) |
#define | __HAL_DBGMCU_UnFreeze_LPTIM2() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM2)) |
#define | __HAL_DBGMCU_UnFreeze_LPTIM3() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM3)) |
#define | __HAL_DBGMCU_UnFreeze_LPTIM4() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM4)) |
#define | __HAL_DBGMCU_UnFreeze_LPTIM5() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM5)) |
#define | __HAL_DBGMCU_UnFreeze_RTC() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_RTC)) |
#define | __HAL_DBGMCU_UnFreeze_IWDG1() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_IWDG1)) |
#define | IS_TICKFREQ(FREQ) |
Enumerations | |
enum | HAL_TickFreqTypeDef { HAL_TICK_FREQ_10HZ = 100U , HAL_TICK_FREQ_100HZ = 10U , HAL_TICK_FREQ_1KHZ = 1U , HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ } |
Functions | |
HAL_StatusTypeDef | HAL_Init (void) |
This function is used to initialize the HAL Library; it must be the first instruction to be executed in the main program (before to call any other HAL function), it performs the following: Configures the SysTick to generate an interrupt each 1 millisecond, which is clocked by the HSI (at this stage, the clock is not yet configured and thus the system is running from the internal HSI at 16 MHz). Set NVIC Group Priority to 4. Calls the HAL_MspInit() callback function defined in user file "stm32h7xx_hal_msp.c" to do the global low level hardware initialization. | |
HAL_StatusTypeDef | HAL_DeInit (void) |
This function de-Initializes common part of the HAL and stops the systick. This function is optional. | |
__weak void | HAL_MspInit (void) |
Initializes the MSP. | |
__weak void | HAL_MspDeInit (void) |
DeInitializes the MSP. | |
__weak HAL_StatusTypeDef | HAL_InitTick (uint32_t TickPriority) |
This function configures the source of the time base. The time source is configured to have 1ms time base with a dedicated Tick interrupt priority. | |
void | HAL_IncTick (void) |
This function is called to increment a global variable "uwTick" used as application time base. | |
void | HAL_Delay (uint32_t Delay) |
This function provides minimum delay (in milliseconds) based on variable incremented. | |
uint32_t | HAL_GetTick (void) |
Provides a tick value in millisecond. | |
uint32_t | HAL_GetTickPrio (void) |
This function returns a tick priority. | |
HAL_StatusTypeDef | HAL_SetTickFreq (HAL_TickFreqTypeDef Freq) |
Set new tick Freq. | |
HAL_TickFreqTypeDef | HAL_GetTickFreq (void) |
Return tick frequency. | |
void | HAL_SuspendTick (void) |
Suspend Tick increment. | |
void | HAL_ResumeTick (void) |
Resume Tick increment. | |
uint32_t | HAL_GetHalVersion (void) |
Returns the HAL revision. | |
uint32_t | HAL_GetREVID (void) |
Returns the device revision identifier. | |
uint32_t | HAL_GetDEVID (void) |
Returns the device identifier. | |
uint32_t | HAL_GetUIDw0 (void) |
Return the first word of the unique device identifier (UID based on 96 bits) | |
uint32_t | HAL_GetUIDw1 (void) |
Return the second word of the unique device identifier (UID based on 96 bits) | |
uint32_t | HAL_GetUIDw2 (void) |
Return the third word of the unique device identifier (UID based on 96 bits) | |
void | HAL_SYSCFG_AnalogSwitchConfig (uint32_t SYSCFG_AnalogSwitch, uint32_t SYSCFG_SwitchState) |
Analog Switch control for dual analog pads. | |
void | HAL_EnableCompensationCell (void) |
Enables the I/O Compensation Cell. | |
void | HAL_DisableCompensationCell (void) |
Power-down the I/O Compensation Cell. | |
void | HAL_SYSCFG_EnableIOSpeedOptimize (void) |
To Enable optimize the I/O speed when the product voltage is low. | |
void | HAL_SYSCFG_DisableIOSpeedOptimize (void) |
To Disable optimize the I/O speed when the product voltage is low. | |
void | HAL_SYSCFG_CompensationCodeSelect (uint32_t SYSCFG_CompCode) |
Code selection for the I/O Compensation cell. | |
void | HAL_SYSCFG_CompensationCodeConfig (uint32_t SYSCFG_PMOSCode, uint32_t SYSCFG_NMOSCode) |
Code selection for the I/O Compensation cell. | |
void | HAL_DBGMCU_EnableDBGSleepMode (void) |
Enable the Debug Module during Domain1/CDomain SLEEP mode. | |
void | HAL_DBGMCU_DisableDBGSleepMode (void) |
Disable the Debug Module during Domain1/CDomain SLEEP mode. | |
void | HAL_DBGMCU_EnableDBGStopMode (void) |
Enable the Debug Module during Domain1/CDomain STOP mode. | |
void | HAL_DBGMCU_DisableDBGStopMode (void) |
Disable the Debug Module during Domain1/CDomain STOP mode. | |
void | HAL_DBGMCU_EnableDBGStandbyMode (void) |
Enable the Debug Module during Domain1/CDomain STANDBY mode. | |
void | HAL_DBGMCU_DisableDBGStandbyMode (void) |
Disable the Debug Module during Domain1/CDomain STANDBY mode. | |
void | HAL_EXTI_EdgeConfig (uint32_t EXTI_Line, uint32_t EXTI_Edge) |
Configure the EXTI input event line edge. | |
void | HAL_EXTI_GenerateSWInterrupt (uint32_t EXTI_Line) |
Generates a Software interrupt on selected EXTI line. | |
void | HAL_EXTI_D1_ClearFlag (uint32_t EXTI_Line) |
Clears the EXTI's line pending flags for Domain D1. | |
void | HAL_EXTI_D1_EventInputConfig (uint32_t EXTI_Line, uint32_t EXTI_Mode, uint32_t EXTI_LineCmd) |
Configure the EXTI input event line for Domain D1. | |
void | HAL_EXTI_D3_EventInputConfig (uint32_t EXTI_Line, uint32_t EXTI_LineCmd, uint32_t EXTI_ClearSrc) |
Configure the EXTI input event line for Domain D3. | |
void | HAL_SetFMCMemorySwappingConfig (uint32_t BankMapConfig) |
Set the FMC Memory Mapping Swapping config. | |
uint32_t | HAL_GetFMCMemorySwappingConfig (void) |
Get FMC Bank mapping mode. | |
void | HAL_SYSCFG_VREFBUF_VoltageScalingConfig (uint32_t VoltageScaling) |
Configure the internal voltage reference buffer voltage scale. | |
void | HAL_SYSCFG_VREFBUF_HighImpedanceConfig (uint32_t Mode) |
Configure the internal voltage reference buffer high impedance mode. | |
void | HAL_SYSCFG_VREFBUF_TrimmingConfig (uint32_t TrimmingValue) |
Tune the Internal Voltage Reference buffer (VREFBUF). | |
HAL_StatusTypeDef | HAL_SYSCFG_EnableVREFBUF (void) |
Enable the Internal Voltage Reference buffer (VREFBUF). | |
void | HAL_SYSCFG_DisableVREFBUF (void) |
Disable the Internal Voltage Reference buffer (VREFBUF). | |
Variables | |
__IO uint32_t | uwTick |
uint32_t | uwTickPrio |
HAL_TickFreqTypeDef | uwTickFreq |
This file contains all the functions prototypes for the HAL module driver.
Copyright (c) 2017 STMicroelectronics. All rights reserved.
This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.