This group contains register bit definitions.
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#define | GRPCI2_TCM_CBE_3_0_SHIFT 16 |
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#define | GRPCI2_TCM_CBE_3_0_MASK 0xf0000U |
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#define | GRPCI2_TCM_CBE_3_0_GET(_reg) |
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#define | GRPCI2_TCM_CBE_3_0_SET(_reg, _val) |
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#define | GRPCI2_TCM_CBE_3_0(_val) |
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#define | GRPCI2_TCM_FRAME 0x8000U |
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#define | GRPCI2_TCM_IRDY 0x4000U |
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#define | GRPCI2_TCM_TRDY 0x2000U |
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#define | GRPCI2_TCM_STOP 0x1000U |
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#define | GRPCI2_TCM_DEVSEL 0x800U |
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#define | GRPCI2_TCM_PAR 0x400U |
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#define | GRPCI2_TCM_PERR 0x200U |
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#define | GRPCI2_TCM_SERR 0x100U |
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#define | GRPCI2_TCM_IDSEL 0x80U |
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#define | GRPCI2_TCM_REQ 0x40U |
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#define | GRPCI2_TCM_GNT 0x20U |
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#define | GRPCI2_TCM_LOCK 0x10U |
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#define | GRPCI2_TCM_RST 0x8U |
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This group contains register bit definitions.
◆ GRPCI2_TCM_CBE_3_0
#define GRPCI2_TCM_CBE_3_0 |
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_val | ) |
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Value: ( ( ( _val ) << GRPCI2_TCM_CBE_3_0_SHIFT ) & \
GRPCI2_TCM_CBE_3_0_MASK )
◆ GRPCI2_TCM_CBE_3_0_GET
#define GRPCI2_TCM_CBE_3_0_GET |
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_reg | ) |
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Value: ( ( ( _reg ) & GRPCI2_TCM_CBE_3_0_MASK ) >> \
GRPCI2_TCM_CBE_3_0_SHIFT )
◆ GRPCI2_TCM_CBE_3_0_SET
#define GRPCI2_TCM_CBE_3_0_SET |
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_reg, |
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_val |
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) |
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Value: ( ( ( _reg ) & ~GRPCI2_TCM_CBE_3_0_MASK ) | \
( ( ( _val ) << GRPCI2_TCM_CBE_3_0_SHIFT ) & \
GRPCI2_TCM_CBE_3_0_MASK ) )