RTEMS 6.1-rc4
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Data Fields
Per_CPU_Control Struct Reference

Per CPU Core Structure. More...

#include <percpu.h>

Data Fields

void * interrupt_stack_low
 The interrupt stack low address for this processor.
 
void * interrupt_stack_high
 The interrupt stack high address for this processor.
 
uint32_t isr_nest_level
 
uint32_t isr_dispatch_disable
 Indicates if an ISR thread dispatch is disabled.
 
volatile uint32_t thread_dispatch_disable_level
 The thread dispatch critical section nesting counter which is used to prevent context switches at inopportune moments.
 
volatile bool dispatch_necessary
 This is set to true when this processor needs to run the thread dispatcher.
 
bool reserved_for_executing_alignment [3]
 
struct _Thread_Controlexecuting
 This is the thread executing on this processor.
 
struct _Thread_Controlheir
 This is the heir thread for this processor.
 
Timestamp_Control cpu_usage_timestamp
 The CPU usage timestamp contains the time point of the last heir thread change or last CPU usage update of the executing thread of this processor.
 
struct {
   uint64_t   ticks
 Watchdog ticks on this processor used for monotonic clock watchdogs.
 
   Watchdog_Header   Header [PER_CPU_WATCHDOG_COUNT]
 Header for watchdogs. More...
 
Watchdog
 Watchdog state for this processor.
 
struct Record_Controlrecord
 
Per_CPU_Stats Stats
 

Detailed Description

Per CPU Core Structure.

This structure is used to hold per core state information.

Field Documentation

◆ cpu_usage_timestamp

Timestamp_Control Per_CPU_Control::cpu_usage_timestamp

The CPU usage timestamp contains the time point of the last heir thread change or last CPU usage update of the executing thread of this processor.

Protected by the scheduler lock.

See also
_Scheduler_Update_heir(), _Thread_Dispatch_update_heir() and _Thread_Get_CPU_time_used().

◆ dispatch_necessary

volatile bool Per_CPU_Control::dispatch_necessary

This is set to true when this processor needs to run the thread dispatcher.

It is volatile since interrupts may alter this flag.

This member is not protected by a lock and must be accessed only by this processor. Code (e.g. scheduler and post-switch action requests) running on another processors must use an inter-processor interrupt to set the thread dispatch necessary indicator to true.

See also
_Thread_Get_heir_and_make_it_executing().

◆ executing

struct _Thread_Control* Per_CPU_Control::executing

This is the thread executing on this processor.

This member is not protected by a lock. The only writer is this processor.

On SMP configurations a thread may be registered as executing on more than one processor in case a thread migration is in progress. On SMP configurations use _Thread_Is_executing_on_a_processor() to figure out if a thread context is executing on a processor.

◆ Header

Watchdog_Header Per_CPU_Control::Header[PER_CPU_WATCHDOG_COUNT]

Header for watchdogs.

See also
Per_CPU_Watchdog_index.

◆ heir

struct _Thread_Control* Per_CPU_Control::heir

This is the heir thread for this processor.

This member is not protected by a lock. The only writer after multitasking start is the scheduler owning this processor. It is assumed that stores to pointers are atomic on all supported SMP architectures. The CPU port specific code (inter-processor interrupt handling and _CPU_SMP_Send_interrupt()) must guarantee that this processor observes the last value written.

A thread can be a heir on at most one processor in the system.

See also
_Thread_Get_heir_and_make_it_executing().

◆ isr_dispatch_disable

uint32_t Per_CPU_Control::isr_dispatch_disable

Indicates if an ISR thread dispatch is disabled.

This flag is context switched with each thread. It indicates that this thread has an interrupt stack frame on its stack. By using this flag, we can avoid nesting more interrupt dispatching attempts on a previously interrupted thread's stack.

◆ isr_nest_level

uint32_t Per_CPU_Control::isr_nest_level

This contains the current interrupt nesting level on this CPU.


The documentation for this struct was generated from the following file: