RTEMS 6.1-rc4
|
Hitachi SH CPU Department Source. More...
Go to the source code of this file.
Macros | |
#define | SH_HAS_FPU 0 |
#define | CPU_MODEL_NAME "SH-Multilib" |
#define | SH_HAS_SEPARATE_STACKS 1 |
#define | CPU_NAME "Hitachi SH" |
#define | SH_IRQDIS_MASK 0xf0 |
#define | sh_disable_interrupts(_level) |
#define | sh_enable_interrupts(_level) |
#define | sh_flash_interrupts(_level) |
#define | sh_get_interrupt_level(_level) |
#define | sh_set_interrupt_level(_newlevel) |
#define | CPU_swap_u32(value) sh_swap_u32( value ) |
#define | CPU_swap_u16(value) sh_swap_u16( value ) |
Functions | |
unsigned int | sh_set_irq_priority (unsigned int irq, unsigned int prio) |
Hitachi SH CPU Department Source.
This include file contains information pertaining to the Hitachi SH processor.
#define sh_disable_interrupts | ( | _level | ) |
#define sh_enable_interrupts | ( | _level | ) |
#define sh_flash_interrupts | ( | _level | ) |
#define sh_get_interrupt_level | ( | _level | ) |
#define sh_set_interrupt_level | ( | _newlevel | ) |