Macros
#define	TIM_TIM1_TI1_GPIO 0x00000000U

#define	TIM_TIM1_TI1_COMP1 TIM_TISEL_TI1SEL_0

#define	TIM_TIM8_TI1_GPIO 0x00000000U

#define	TIM_TIM8_TI1_COMP2 TIM_TISEL_TI1SEL_0

#define	TIM_TIM2_TI4_GPIO 0x00000000U

#define	TIM_TIM2_TI4_COMP1 TIM_TISEL_TI4SEL_0

#define	TIM_TIM2_TI4_COMP2 TIM_TISEL_TI4SEL_1

#define	TIM_TIM2_TI4_COMP1_COMP2 (TIM_TISEL_TI4SEL_0 \| TIM_TISEL_TI4SEL_1)

#define	TIM_TIM3_TI1_GPIO 0x00000000U

#define	TIM_TIM3_TI1_COMP1 TIM_TISEL_TI1SEL_0

#define	TIM_TIM3_TI1_COMP2 TIM_TISEL_TI1SEL_1

#define	TIM_TIM3_TI1_COMP1_COMP2 (TIM_TISEL_TI1SEL_0 \| TIM_TISEL_TI1SEL_1)

#define	TIM_TIM5_TI1_GPIO 0x00000000U

#define	TIM_TIM5_TI1_CAN_TMP TIM_TISEL_TI1SEL_0

#define	TIM_TIM5_TI1_CAN_RTP TIM_TISEL_TI1SEL_1

#define	TIM_TIM12_TI1_GPIO 0x00000000U

#define	TIM_TIM12_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0

#define	TIM_TIM15_TI1_GPIO 0x00000000U

#define	TIM_TIM15_TI1_TIM2_CH1 TIM_TISEL_TI1SEL_0

#define	TIM_TIM15_TI1_TIM3_CH1 TIM_TISEL_TI1SEL_1

#define	TIM_TIM15_TI1_TIM4_CH1 (TIM_TISEL_TI1SEL_0 \| TIM_TISEL_TI1SEL_1)

#define	TIM_TIM15_TI1_RCC_LSE (TIM_TISEL_TI1SEL_2)

#define	TIM_TIM15_TI1_RCC_CSI (TIM_TISEL_TI1SEL_2 \| TIM_TISEL_TI1SEL_0)

#define	TIM_TIM15_TI1_RCC_MCO2 (TIM_TISEL_TI1SEL_2 \| TIM_TISEL_TI1SEL_1)

#define	TIM_TIM15_TI2_GPIO 0x00000000U

#define	TIM_TIM15_TI2_TIM2_CH2 (TIM_TISEL_TI2SEL_0)

#define	TIM_TIM15_TI2_TIM3_CH2 (TIM_TISEL_TI2SEL_1)

#define	TIM_TIM15_TI2_TIM4_CH2 (TIM_TISEL_TI2SEL_0 \| TIM_TISEL_TI2SEL_1)

#define	TIM_TIM16_TI1_GPIO 0x00000000U

#define	TIM_TIM16_TI1_RCC_LSI TIM_TISEL_TI1SEL_0

#define	TIM_TIM16_TI1_RCC_LSE TIM_TISEL_TI1SEL_1

#define	TIM_TIM16_TI1_WKUP_IT (TIM_TISEL_TI1SEL_0 \| TIM_TISEL_TI1SEL_1)

#define	TIM_TIM17_TI1_GPIO 0x00000000U

#define	TIM_TIM17_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0

#define	TIM_TIM17_TI1_RCC_HSE1MHZ TIM_TISEL_TI1SEL_1

#define	TIM_TIM17_TI1_RCC_MCO1 (TIM_TISEL_TI1SEL_0 \| TIM_TISEL_TI1SEL_1)

#define	TIM_TIM23_TI4_GPIO 0x00000000U

#define	TIM_TIM23_TI4_COMP1 TIM_TISEL_TI4SEL_0

#define	TIM_TIM23_TI4_COMP2 TIM_TISEL_TI4SEL_1

#define	TIM_TIM23_TI4_COMP1_COMP2 (TIM_TISEL_TI4SEL_0 \| TIM_TISEL_TI4SEL_1)

#define	TIM_TIM24_TI1_GPIO 0x00000000U

#define	TIM_TIM24_TI1_CAN_TMP TIM_TISEL_TI1SEL_0

#define	TIM_TIM24_TI1_CAN_RTP TIM_TISEL_TI1SEL_1

#define	TIM_TIM24_TI1_CAN_SOC (TIM_TISEL_TI4SEL_0 \| TIM_TISEL_TI4SEL_1)

Detailed Description

Macro Definition Documentation

◆ TIM_TIM12_TI1_GPIO

#define TIM_TIM12_TI1_GPIO 0x00000000U

TIM12 TI1 is connected to GPIO

◆ TIM_TIM12_TI1_SPDIF_FS

#define TIM_TIM12_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0

TIM12 TI1 is connected to SPDIF FS

◆ TIM_TIM15_TI1_GPIO

#define TIM_TIM15_TI1_GPIO 0x00000000U

TIM15_TI1 is connected to GPIO

◆ TIM_TIM15_TI1_RCC_CSI

#define TIM_TIM15_TI1_RCC_CSI (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0)

TIM15_TI1 is connected to RCC CSI

◆ TIM_TIM15_TI1_RCC_LSE

#define TIM_TIM15_TI1_RCC_LSE (TIM_TISEL_TI1SEL_2)

TIM15_TI1 is connected to RCC LSE

◆ TIM_TIM15_TI1_RCC_MCO2

#define TIM_TIM15_TI1_RCC_MCO2 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1)

TIM15_TI1 is connected to RCC MCO2

◆ TIM_TIM15_TI1_TIM2_CH1

#define TIM_TIM15_TI1_TIM2_CH1 TIM_TISEL_TI1SEL_0

TIM15_TI1 is connected to TIM2 CH1

◆ TIM_TIM15_TI1_TIM3_CH1

#define TIM_TIM15_TI1_TIM3_CH1 TIM_TISEL_TI1SEL_1

TIM15_TI1 is connected to TIM3 CH1

◆ TIM_TIM15_TI1_TIM4_CH1

#define TIM_TIM15_TI1_TIM4_CH1 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1)

TIM15_TI1 is connected to TIM4 CH1

◆ TIM_TIM15_TI2_GPIO

#define TIM_TIM15_TI2_GPIO 0x00000000U

TIM15_TI2 is connected to GPIO

◆ TIM_TIM15_TI2_TIM2_CH2

#define TIM_TIM15_TI2_TIM2_CH2 (TIM_TISEL_TI2SEL_0)

TIM15_TI2 is connected to TIM2 CH2

◆ TIM_TIM15_TI2_TIM3_CH2

#define TIM_TIM15_TI2_TIM3_CH2 (TIM_TISEL_TI2SEL_1)

TIM15_TI2 is connected to TIM3 CH2

◆ TIM_TIM15_TI2_TIM4_CH2

#define TIM_TIM15_TI2_TIM4_CH2 (TIM_TISEL_TI2SEL_0 | TIM_TISEL_TI2SEL_1)

TIM15_TI2 is connected to TIM4 CH2

◆ TIM_TIM16_TI1_GPIO

#define TIM_TIM16_TI1_GPIO 0x00000000U

TIM16 TI1 is connected to GPIO

◆ TIM_TIM16_TI1_RCC_LSE

#define TIM_TIM16_TI1_RCC_LSE TIM_TISEL_TI1SEL_1

TIM16 TI1 is connected to RCC LSE

◆ TIM_TIM16_TI1_RCC_LSI

#define TIM_TIM16_TI1_RCC_LSI TIM_TISEL_TI1SEL_0

TIM16 TI1 is connected to RCC LSI

◆ TIM_TIM16_TI1_WKUP_IT

#define TIM_TIM16_TI1_WKUP_IT (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1)

TIM16 TI1 is connected to WKUP_IT

◆ TIM_TIM17_TI1_GPIO

#define TIM_TIM17_TI1_GPIO 0x00000000U

TIM17 TI1 is connected to GPIO

◆ TIM_TIM17_TI1_RCC_HSE1MHZ

#define TIM_TIM17_TI1_RCC_HSE1MHZ TIM_TISEL_TI1SEL_1

TIM17 TI1 is connected to RCC HSE 1Mhz

◆ TIM_TIM17_TI1_RCC_MCO1

#define TIM_TIM17_TI1_RCC_MCO1 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1)

TIM17 TI1 is connected to RCC MCO1

◆ TIM_TIM17_TI1_SPDIF_FS

#define TIM_TIM17_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0

TIM17 TI1 is connected to SPDIF FS

◆ TIM_TIM1_TI1_COMP1

#define TIM_TIM1_TI1_COMP1 TIM_TISEL_TI1SEL_0

TIM1_TI1 is connected to COMP1 OUT

◆ TIM_TIM1_TI1_GPIO

#define TIM_TIM1_TI1_GPIO 0x00000000U

TIM1_TI1 is connected to GPIO

◆ TIM_TIM23_TI4_COMP1

#define TIM_TIM23_TI4_COMP1 TIM_TISEL_TI4SEL_0

TIM23_TI4 is connected to COMP1 OUT

◆ TIM_TIM23_TI4_COMP1_COMP2

#define TIM_TIM23_TI4_COMP1_COMP2 (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1)

TIM23_TI4 is connected to COMP1 OUT or COMP2 OUT

◆ TIM_TIM23_TI4_COMP2

#define TIM_TIM23_TI4_COMP2 TIM_TISEL_TI4SEL_1

TIM23_TI4 is connected to COMP2 OUT

◆ TIM_TIM23_TI4_GPIO

#define TIM_TIM23_TI4_GPIO 0x00000000U

TIM23_TI4 is connected to GPIO

◆ TIM_TIM24_TI1_CAN_RTP

#define TIM_TIM24_TI1_CAN_RTP TIM_TISEL_TI1SEL_1

TIM24_TI1 is connected to CAN RTP

◆ TIM_TIM24_TI1_CAN_SOC

#define TIM_TIM24_TI1_CAN_SOC (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1)

TIM24_TI1 is connected to CAN SOC

◆ TIM_TIM24_TI1_CAN_TMP

#define TIM_TIM24_TI1_CAN_TMP TIM_TISEL_TI1SEL_0

TIM24_TI1 is connected to CAN TMP

◆ TIM_TIM24_TI1_GPIO

#define TIM_TIM24_TI1_GPIO 0x00000000U

TIM24_TI1 is connected to GPIO

◆ TIM_TIM2_TI4_COMP1

#define TIM_TIM2_TI4_COMP1 TIM_TISEL_TI4SEL_0

TIM2_TI4 is connected to COMP1 OUT

◆ TIM_TIM2_TI4_COMP1_COMP2

#define TIM_TIM2_TI4_COMP1_COMP2 (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1)

TIM2_TI4 is connected to COMP2 OUT OR COMP2 OUT

◆ TIM_TIM2_TI4_COMP2

#define TIM_TIM2_TI4_COMP2 TIM_TISEL_TI4SEL_1

TIM2_TI4 is connected to COMP2 OUT

◆ TIM_TIM2_TI4_GPIO

#define TIM_TIM2_TI4_GPIO 0x00000000U

TIM2_TI4 is connected to GPIO

◆ TIM_TIM3_TI1_COMP1

#define TIM_TIM3_TI1_COMP1 TIM_TISEL_TI1SEL_0

TIM3_TI1 is connected to COMP1 OUT

◆ TIM_TIM3_TI1_COMP1_COMP2

#define TIM_TIM3_TI1_COMP1_COMP2 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1)

TIM3_TI1 is connected to COMP1 OUT or COMP2 OUT

◆ TIM_TIM3_TI1_COMP2

#define TIM_TIM3_TI1_COMP2 TIM_TISEL_TI1SEL_1

TIM3_TI1 is connected to COMP2 OUT

◆ TIM_TIM3_TI1_GPIO

#define TIM_TIM3_TI1_GPIO 0x00000000U

TIM3_TI1 is connected to GPIO

◆ TIM_TIM5_TI1_CAN_RTP

#define TIM_TIM5_TI1_CAN_RTP TIM_TISEL_TI1SEL_1

TIM5_TI1 is connected to CAN RTP

◆ TIM_TIM5_TI1_CAN_TMP

#define TIM_TIM5_TI1_CAN_TMP TIM_TISEL_TI1SEL_0

TIM5_TI1 is connected to CAN TMP

◆ TIM_TIM5_TI1_GPIO

#define TIM_TIM5_TI1_GPIO 0x00000000U

TIM5_TI1 is connected to GPIO

◆ TIM_TIM8_TI1_COMP2

#define TIM_TIM8_TI1_COMP2 TIM_TISEL_TI1SEL_0

TIM8_TI1 is connected to COMP2 OUT

◆ TIM_TIM8_TI1_GPIO

#define TIM_TIM8_TI1_GPIO 0x00000000U

TIM8_TI1 is connected to GPIO

Macros