Macros
#define	OPAMP_PGA_CONNECT_INVERTINGINPUT_NO 0x00000000U

#define	OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 OPAMP_CSR_PGGAIN_2

#define	OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS OPAMP_CSR_PGGAIN_3

#define	OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS (OPAMP_CSR_PGGAIN_2 \| OPAMP_CSR_PGGAIN_3)

Detailed Description

Macro Definition Documentation

#define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 OPAMP_CSR_PGGAIN_2

In PGA mode, the inverting input is connected to VINM0

#define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS OPAMP_CSR_PGGAIN_3

In PGA mode, the inverting input is connected to VINM0 or bias

#define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS (OPAMP_CSR_PGGAIN_2 | OPAMP_CSR_PGGAIN_3)

In PGA mode, the inverting input is connected to VINM0 or bias , VINM1 connected for filtering

#define OPAMP_PGA_CONNECT_INVERTINGINPUT_NO 0x00000000U

In PGA mode, the inverting input is not connected