MECC Peripheral Access Layer

Modules
	MECC Register Masks

Data Structures
struct	MECC_Type

Macros
#define	MECC1_BASE   (0x40014000u)
#define	MECC1   ((MECC_Type *)MECC1_BASE)
#define	MECC2_BASE   (0x40018000u)
#define	MECC2   ((MECC_Type *)MECC2_BASE)
#define	MECC_BASE_ADDRS   { 0u, MECC1_BASE, MECC2_BASE }
#define	MECC_BASE_PTRS   { (MECC_Type *)0u, MECC1, MECC2 }
#define	MECC1_BASE   (0x40014000u)
#define	MECC1   ((MECC_Type *)MECC1_BASE)
#define	MECC2_BASE   (0x40018000u)
#define	MECC2   ((MECC_Type *)MECC2_BASE)
#define	MECC_BASE_ADDRS   { 0u, MECC1_BASE, MECC2_BASE }
#define	MECC_BASE_PTRS   { (MECC_Type *)0u, MECC1, MECC2 }

Detailed Description

Macro Definition Documentation

MECC1 [1/2]

#define MECC1   ((MECC_Type *)MECC1_BASE)

Peripheral MECC1 base pointer

MECC1 [2/2]

#define MECC1   ((MECC_Type *)MECC1_BASE)

Peripheral MECC1 base pointer

MECC1_BASE [1/2]

#define MECC1_BASE   (0x40014000u)

Peripheral MECC1 base address

MECC1_BASE [2/2]

#define MECC1_BASE   (0x40014000u)

Peripheral MECC1 base address

MECC2 [1/2]

#define MECC2   ((MECC_Type *)MECC2_BASE)

Peripheral MECC2 base pointer

MECC2 [2/2]

#define MECC2   ((MECC_Type *)MECC2_BASE)

Peripheral MECC2 base pointer

MECC2_BASE [1/2]

#define MECC2_BASE   (0x40018000u)

Peripheral MECC2 base address

MECC2_BASE [2/2]

#define MECC2_BASE   (0x40018000u)

Peripheral MECC2 base address

MECC_BASE_ADDRS [1/2]

#define MECC_BASE_ADDRS   { 0u, MECC1_BASE, MECC2_BASE }

Array initializer of MECC peripheral base addresses

MECC_BASE_ADDRS [2/2]

#define MECC_BASE_ADDRS   { 0u, MECC1_BASE, MECC2_BASE }

Array initializer of MECC peripheral base addresses

MECC_BASE_PTRS [1/2]

#define MECC_BASE_PTRS   { (MECC_Type *)0u, MECC1, MECC2 }

Array initializer of MECC peripheral base pointers

MECC_BASE_PTRS [2/2]

#define MECC_BASE_PTRS   { (MECC_Type *)0u, MECC1, MECC2 }

Array initializer of MECC peripheral base pointers