RTEMS 6.1-rc4
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CONTROL - Control | |
#define | CDOG_CONTROL_LOCK_CTRL_MASK (0x3U) |
#define | CDOG_CONTROL_LOCK_CTRL_SHIFT (0U) |
#define | CDOG_CONTROL_LOCK_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_LOCK_CTRL_SHIFT)) & CDOG_CONTROL_LOCK_CTRL_MASK) |
#define | CDOG_CONTROL_TIMEOUT_CTRL_MASK (0x1CU) |
#define | CDOG_CONTROL_TIMEOUT_CTRL_SHIFT (2U) |
#define | CDOG_CONTROL_TIMEOUT_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_TIMEOUT_CTRL_SHIFT)) & CDOG_CONTROL_TIMEOUT_CTRL_MASK) |
#define | CDOG_CONTROL_MISCOMPARE_CTRL_MASK (0xE0U) |
#define | CDOG_CONTROL_MISCOMPARE_CTRL_SHIFT (5U) |
#define | CDOG_CONTROL_MISCOMPARE_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_MISCOMPARE_CTRL_SHIFT)) & CDOG_CONTROL_MISCOMPARE_CTRL_MASK) |
#define | CDOG_CONTROL_SEQUENCE_CTRL_MASK (0x700U) |
#define | CDOG_CONTROL_SEQUENCE_CTRL_SHIFT (8U) |
#define | CDOG_CONTROL_SEQUENCE_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_SEQUENCE_CTRL_SHIFT)) & CDOG_CONTROL_SEQUENCE_CTRL_MASK) |
#define | CDOG_CONTROL_CONTROL_CTRL_MASK (0x3800U) |
#define | CDOG_CONTROL_CONTROL_CTRL_SHIFT (11U) |
#define | CDOG_CONTROL_CONTROL_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_CONTROL_CTRL_SHIFT)) & CDOG_CONTROL_CONTROL_CTRL_MASK) |
#define | CDOG_CONTROL_STATE_CTRL_MASK (0x1C000U) |
#define | CDOG_CONTROL_STATE_CTRL_SHIFT (14U) |
#define | CDOG_CONTROL_STATE_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_STATE_CTRL_SHIFT)) & CDOG_CONTROL_STATE_CTRL_MASK) |
#define | CDOG_CONTROL_ADDRESS_CTRL_MASK (0xE0000U) |
#define | CDOG_CONTROL_ADDRESS_CTRL_SHIFT (17U) |
#define | CDOG_CONTROL_ADDRESS_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_ADDRESS_CTRL_SHIFT)) & CDOG_CONTROL_ADDRESS_CTRL_MASK) |
#define | CDOG_CONTROL_IRQ_PAUSE_MASK (0x30000000U) |
#define | CDOG_CONTROL_IRQ_PAUSE_SHIFT (28U) |
#define | CDOG_CONTROL_IRQ_PAUSE(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_IRQ_PAUSE_SHIFT)) & CDOG_CONTROL_IRQ_PAUSE_MASK) |
#define | CDOG_CONTROL_DEBUG_HALT_CTRL_MASK (0xC0000000U) |
#define | CDOG_CONTROL_DEBUG_HALT_CTRL_SHIFT (30U) |
#define | CDOG_CONTROL_DEBUG_HALT_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_DEBUG_HALT_CTRL_SHIFT)) & CDOG_CONTROL_DEBUG_HALT_CTRL_MASK) |
RELOAD - Instruction Timer reload | |
#define | CDOG_RELOAD_RLOAD_MASK (0xFFFFFFFFU) |
#define | CDOG_RELOAD_RLOAD_SHIFT (0U) |
#define | CDOG_RELOAD_RLOAD(x) (((uint32_t)(((uint32_t)(x)) << CDOG_RELOAD_RLOAD_SHIFT)) & CDOG_RELOAD_RLOAD_MASK) |
INSTRUCTION_TIMER - Instruction Timer | |
#define | CDOG_INSTRUCTION_TIMER_INSTIM_MASK (0xFFFFFFFFU) |
#define | CDOG_INSTRUCTION_TIMER_INSTIM_SHIFT (0U) |
#define | CDOG_INSTRUCTION_TIMER_INSTIM(x) (((uint32_t)(((uint32_t)(x)) << CDOG_INSTRUCTION_TIMER_INSTIM_SHIFT)) & CDOG_INSTRUCTION_TIMER_INSTIM_MASK) |
SECURE_COUNTER - Secure Counter | |
#define | CDOG_SECURE_COUNTER_SECCNT_MASK (0xFFFFFFFFU) |
#define | CDOG_SECURE_COUNTER_SECCNT_SHIFT (0U) |
#define | CDOG_SECURE_COUNTER_SECCNT(x) (((uint32_t)(((uint32_t)(x)) << CDOG_SECURE_COUNTER_SECCNT_SHIFT)) & CDOG_SECURE_COUNTER_SECCNT_MASK) |
STATUS - Status 1 | |
#define | CDOG_STATUS_NUMTOF_MASK (0xFFU) |
#define | CDOG_STATUS_NUMTOF_SHIFT (0U) |
#define | CDOG_STATUS_NUMTOF(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_NUMTOF_SHIFT)) & CDOG_STATUS_NUMTOF_MASK) |
#define | CDOG_STATUS_NUMMISCOMPF_MASK (0xFF00U) |
#define | CDOG_STATUS_NUMMISCOMPF_SHIFT (8U) |
#define | CDOG_STATUS_NUMMISCOMPF(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_NUMMISCOMPF_SHIFT)) & CDOG_STATUS_NUMMISCOMPF_MASK) |
#define | CDOG_STATUS_NUMILSEQF_MASK (0xFF0000U) |
#define | CDOG_STATUS_NUMILSEQF_SHIFT (16U) |
#define | CDOG_STATUS_NUMILSEQF(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_NUMILSEQF_SHIFT)) & CDOG_STATUS_NUMILSEQF_MASK) |
#define | CDOG_STATUS_CURST_MASK (0xF0000000U) |
#define | CDOG_STATUS_CURST_SHIFT (28U) |
#define | CDOG_STATUS_CURST(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_CURST_SHIFT)) & CDOG_STATUS_CURST_MASK) |
STATUS2 - Status 2 | |
#define | CDOG_STATUS2_NUMCNTF_MASK (0xFFU) |
#define | CDOG_STATUS2_NUMCNTF_SHIFT (0U) |
#define | CDOG_STATUS2_NUMCNTF(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS2_NUMCNTF_SHIFT)) & CDOG_STATUS2_NUMCNTF_MASK) |
#define | CDOG_STATUS2_NUMILLSTF_MASK (0xFF00U) |
#define | CDOG_STATUS2_NUMILLSTF_SHIFT (8U) |
#define | CDOG_STATUS2_NUMILLSTF(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS2_NUMILLSTF_SHIFT)) & CDOG_STATUS2_NUMILLSTF_MASK) |
#define | CDOG_STATUS2_NUMILLA_MASK (0xFF0000U) |
#define | CDOG_STATUS2_NUMILLA_SHIFT (16U) |
#define | CDOG_STATUS2_NUMILLA(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS2_NUMILLA_SHIFT)) & CDOG_STATUS2_NUMILLA_MASK) |
FLAGS - Flags | |
#define | CDOG_FLAGS_TO_FLAG_MASK (0x1U) |
#define | CDOG_FLAGS_TO_FLAG_SHIFT (0U) |
#define | CDOG_FLAGS_TO_FLAG(x) (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_TO_FLAG_SHIFT)) & CDOG_FLAGS_TO_FLAG_MASK) |
#define | CDOG_FLAGS_MISCOM_FLAG_MASK (0x2U) |
#define | CDOG_FLAGS_MISCOM_FLAG_SHIFT (1U) |
#define | CDOG_FLAGS_MISCOM_FLAG(x) (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_MISCOM_FLAG_SHIFT)) & CDOG_FLAGS_MISCOM_FLAG_MASK) |
#define | CDOG_FLAGS_SEQ_FLAG_MASK (0x4U) |
#define | CDOG_FLAGS_SEQ_FLAG_SHIFT (2U) |
#define | CDOG_FLAGS_SEQ_FLAG(x) (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_SEQ_FLAG_SHIFT)) & CDOG_FLAGS_SEQ_FLAG_MASK) |
#define | CDOG_FLAGS_CNT_FLAG_MASK (0x8U) |
#define | CDOG_FLAGS_CNT_FLAG_SHIFT (3U) |
#define | CDOG_FLAGS_CNT_FLAG(x) (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_CNT_FLAG_SHIFT)) & CDOG_FLAGS_CNT_FLAG_MASK) |
#define | CDOG_FLAGS_STATE_FLAG_MASK (0x10U) |
#define | CDOG_FLAGS_STATE_FLAG_SHIFT (4U) |
#define | CDOG_FLAGS_STATE_FLAG(x) (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_STATE_FLAG_SHIFT)) & CDOG_FLAGS_STATE_FLAG_MASK) |
#define | CDOG_FLAGS_ADDR_FLAG_MASK (0x20U) |
#define | CDOG_FLAGS_ADDR_FLAG_SHIFT (5U) |
#define | CDOG_FLAGS_ADDR_FLAG(x) (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_ADDR_FLAG_SHIFT)) & CDOG_FLAGS_ADDR_FLAG_MASK) |
#define | CDOG_FLAGS_POR_FLAG_MASK (0x10000U) |
#define | CDOG_FLAGS_POR_FLAG_SHIFT (16U) |
#define | CDOG_FLAGS_POR_FLAG(x) (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_POR_FLAG_SHIFT)) & CDOG_FLAGS_POR_FLAG_MASK) |
PERSISTENT - Persistent Data Storage | |
#define | CDOG_PERSISTENT_PERSIS_MASK (0xFFFFFFFFU) |
#define | CDOG_PERSISTENT_PERSIS_SHIFT (0U) |
#define | CDOG_PERSISTENT_PERSIS(x) (((uint32_t)(((uint32_t)(x)) << CDOG_PERSISTENT_PERSIS_SHIFT)) & CDOG_PERSISTENT_PERSIS_MASK) |
START - START Command | |
#define | CDOG_START_STRT_MASK (0xFFFFFFFFU) |
#define | CDOG_START_STRT_SHIFT (0U) |
#define | CDOG_START_STRT(x) (((uint32_t)(((uint32_t)(x)) << CDOG_START_STRT_SHIFT)) & CDOG_START_STRT_MASK) |
STOP - STOP Command | |
#define | CDOG_STOP_STP_MASK (0xFFFFFFFFU) |
#define | CDOG_STOP_STP_SHIFT (0U) |
#define | CDOG_STOP_STP(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STOP_STP_SHIFT)) & CDOG_STOP_STP_MASK) |
RESTART - RESTART Command | |
#define | CDOG_RESTART_RSTRT_MASK (0xFFFFFFFFU) |
#define | CDOG_RESTART_RSTRT_SHIFT (0U) |
#define | CDOG_RESTART_RSTRT(x) (((uint32_t)(((uint32_t)(x)) << CDOG_RESTART_RSTRT_SHIFT)) & CDOG_RESTART_RSTRT_MASK) |
ADD - ADD Command | |
#define | CDOG_ADD_AD_MASK (0xFFFFFFFFU) |
#define | CDOG_ADD_AD_SHIFT (0U) |
#define | CDOG_ADD_AD(x) (((uint32_t)(((uint32_t)(x)) << CDOG_ADD_AD_SHIFT)) & CDOG_ADD_AD_MASK) |
ADD1 - ADD1 Command | |
#define | CDOG_ADD1_AD1_MASK (0xFFFFFFFFU) |
#define | CDOG_ADD1_AD1_SHIFT (0U) |
#define | CDOG_ADD1_AD1(x) (((uint32_t)(((uint32_t)(x)) << CDOG_ADD1_AD1_SHIFT)) & CDOG_ADD1_AD1_MASK) |
ADD16 - ADD16 Command | |
#define | CDOG_ADD16_AD16_MASK (0xFFFFFFFFU) |
#define | CDOG_ADD16_AD16_SHIFT (0U) |
#define | CDOG_ADD16_AD16(x) (((uint32_t)(((uint32_t)(x)) << CDOG_ADD16_AD16_SHIFT)) & CDOG_ADD16_AD16_MASK) |
ADD256 - ADD256 Command | |
#define | CDOG_ADD256_AD256_MASK (0xFFFFFFFFU) |
#define | CDOG_ADD256_AD256_SHIFT (0U) |
#define | CDOG_ADD256_AD256(x) (((uint32_t)(((uint32_t)(x)) << CDOG_ADD256_AD256_SHIFT)) & CDOG_ADD256_AD256_MASK) |
SUB - SUB Command | |
#define | CDOG_SUB_S0B_MASK (0xFFFFFFFFU) |
#define | CDOG_SUB_S0B_SHIFT (0U) |
#define | CDOG_SUB_S0B(x) (((uint32_t)(((uint32_t)(x)) << CDOG_SUB_S0B_SHIFT)) & CDOG_SUB_S0B_MASK) |
SUB1 - SUB1 Command | |
#define | CDOG_SUB1_S1B_MASK (0xFFFFFFFFU) |
#define | CDOG_SUB1_S1B_SHIFT (0U) |
#define | CDOG_SUB1_S1B(x) (((uint32_t)(((uint32_t)(x)) << CDOG_SUB1_S1B_SHIFT)) & CDOG_SUB1_S1B_MASK) |
SUB16 - SUB16 Command | |
#define | CDOG_SUB16_SB16_MASK (0xFFFFFFFFU) |
#define | CDOG_SUB16_SB16_SHIFT (0U) |
#define | CDOG_SUB16_SB16(x) (((uint32_t)(((uint32_t)(x)) << CDOG_SUB16_SB16_SHIFT)) & CDOG_SUB16_SB16_MASK) |
SUB256 - SUB256 Command | |
#define | CDOG_SUB256_SB256_MASK (0xFFFFFFFFU) |
#define | CDOG_SUB256_SB256_SHIFT (0U) |
#define | CDOG_SUB256_SB256(x) (((uint32_t)(((uint32_t)(x)) << CDOG_SUB256_SB256_SHIFT)) & CDOG_SUB256_SB256_MASK) |
CONTROL - Control | |
#define | CDOG_CONTROL_LOCK_CTRL_MASK (0x3U) |
#define | CDOG_CONTROL_LOCK_CTRL_SHIFT (0U) |
#define | CDOG_CONTROL_LOCK_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_LOCK_CTRL_SHIFT)) & CDOG_CONTROL_LOCK_CTRL_MASK) |
#define | CDOG_CONTROL_TIMEOUT_CTRL_MASK (0x1CU) |
#define | CDOG_CONTROL_TIMEOUT_CTRL_SHIFT (2U) |
#define | CDOG_CONTROL_TIMEOUT_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_TIMEOUT_CTRL_SHIFT)) & CDOG_CONTROL_TIMEOUT_CTRL_MASK) |
#define | CDOG_CONTROL_MISCOMPARE_CTRL_MASK (0xE0U) |
#define | CDOG_CONTROL_MISCOMPARE_CTRL_SHIFT (5U) |
#define | CDOG_CONTROL_MISCOMPARE_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_MISCOMPARE_CTRL_SHIFT)) & CDOG_CONTROL_MISCOMPARE_CTRL_MASK) |
#define | CDOG_CONTROL_SEQUENCE_CTRL_MASK (0x700U) |
#define | CDOG_CONTROL_SEQUENCE_CTRL_SHIFT (8U) |
#define | CDOG_CONTROL_SEQUENCE_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_SEQUENCE_CTRL_SHIFT)) & CDOG_CONTROL_SEQUENCE_CTRL_MASK) |
#define | CDOG_CONTROL_CONTROL_CTRL_MASK (0x3800U) |
#define | CDOG_CONTROL_CONTROL_CTRL_SHIFT (11U) |
#define | CDOG_CONTROL_CONTROL_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_CONTROL_CTRL_SHIFT)) & CDOG_CONTROL_CONTROL_CTRL_MASK) |
#define | CDOG_CONTROL_STATE_CTRL_MASK (0x1C000U) |
#define | CDOG_CONTROL_STATE_CTRL_SHIFT (14U) |
#define | CDOG_CONTROL_STATE_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_STATE_CTRL_SHIFT)) & CDOG_CONTROL_STATE_CTRL_MASK) |
#define | CDOG_CONTROL_ADDRESS_CTRL_MASK (0xE0000U) |
#define | CDOG_CONTROL_ADDRESS_CTRL_SHIFT (17U) |
#define | CDOG_CONTROL_ADDRESS_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_ADDRESS_CTRL_SHIFT)) & CDOG_CONTROL_ADDRESS_CTRL_MASK) |
#define | CDOG_CONTROL_IRQ_PAUSE_MASK (0x30000000U) |
#define | CDOG_CONTROL_IRQ_PAUSE_SHIFT (28U) |
#define | CDOG_CONTROL_IRQ_PAUSE(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_IRQ_PAUSE_SHIFT)) & CDOG_CONTROL_IRQ_PAUSE_MASK) |
#define | CDOG_CONTROL_DEBUG_HALT_CTRL_MASK (0xC0000000U) |
#define | CDOG_CONTROL_DEBUG_HALT_CTRL_SHIFT (30U) |
#define | CDOG_CONTROL_DEBUG_HALT_CTRL(x) (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_DEBUG_HALT_CTRL_SHIFT)) & CDOG_CONTROL_DEBUG_HALT_CTRL_MASK) |
RELOAD - Instruction Timer reload | |
#define | CDOG_RELOAD_RLOAD_MASK (0xFFFFFFFFU) |
#define | CDOG_RELOAD_RLOAD_SHIFT (0U) |
#define | CDOG_RELOAD_RLOAD(x) (((uint32_t)(((uint32_t)(x)) << CDOG_RELOAD_RLOAD_SHIFT)) & CDOG_RELOAD_RLOAD_MASK) |
INSTRUCTION_TIMER - Instruction Timer | |
#define | CDOG_INSTRUCTION_TIMER_INSTIM_MASK (0xFFFFFFFFU) |
#define | CDOG_INSTRUCTION_TIMER_INSTIM_SHIFT (0U) |
#define | CDOG_INSTRUCTION_TIMER_INSTIM(x) (((uint32_t)(((uint32_t)(x)) << CDOG_INSTRUCTION_TIMER_INSTIM_SHIFT)) & CDOG_INSTRUCTION_TIMER_INSTIM_MASK) |
SECURE_COUNTER - Secure Counter | |
#define | CDOG_SECURE_COUNTER_SECCNT_MASK (0xFFFFFFFFU) |
#define | CDOG_SECURE_COUNTER_SECCNT_SHIFT (0U) |
#define | CDOG_SECURE_COUNTER_SECCNT(x) (((uint32_t)(((uint32_t)(x)) << CDOG_SECURE_COUNTER_SECCNT_SHIFT)) & CDOG_SECURE_COUNTER_SECCNT_MASK) |
STATUS - Status 1 | |
#define | CDOG_STATUS_NUMTOF_MASK (0xFFU) |
#define | CDOG_STATUS_NUMTOF_SHIFT (0U) |
#define | CDOG_STATUS_NUMTOF(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_NUMTOF_SHIFT)) & CDOG_STATUS_NUMTOF_MASK) |
#define | CDOG_STATUS_NUMMISCOMPF_MASK (0xFF00U) |
#define | CDOG_STATUS_NUMMISCOMPF_SHIFT (8U) |
#define | CDOG_STATUS_NUMMISCOMPF(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_NUMMISCOMPF_SHIFT)) & CDOG_STATUS_NUMMISCOMPF_MASK) |
#define | CDOG_STATUS_NUMILSEQF_MASK (0xFF0000U) |
#define | CDOG_STATUS_NUMILSEQF_SHIFT (16U) |
#define | CDOG_STATUS_NUMILSEQF(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_NUMILSEQF_SHIFT)) & CDOG_STATUS_NUMILSEQF_MASK) |
#define | CDOG_STATUS_CURST_MASK (0xF0000000U) |
#define | CDOG_STATUS_CURST_SHIFT (28U) |
#define | CDOG_STATUS_CURST(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_CURST_SHIFT)) & CDOG_STATUS_CURST_MASK) |
STATUS2 - Status 2 | |
#define | CDOG_STATUS2_NUMCNTF_MASK (0xFFU) |
#define | CDOG_STATUS2_NUMCNTF_SHIFT (0U) |
#define | CDOG_STATUS2_NUMCNTF(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS2_NUMCNTF_SHIFT)) & CDOG_STATUS2_NUMCNTF_MASK) |
#define | CDOG_STATUS2_NUMILLSTF_MASK (0xFF00U) |
#define | CDOG_STATUS2_NUMILLSTF_SHIFT (8U) |
#define | CDOG_STATUS2_NUMILLSTF(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS2_NUMILLSTF_SHIFT)) & CDOG_STATUS2_NUMILLSTF_MASK) |
#define | CDOG_STATUS2_NUMILLA_MASK (0xFF0000U) |
#define | CDOG_STATUS2_NUMILLA_SHIFT (16U) |
#define | CDOG_STATUS2_NUMILLA(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS2_NUMILLA_SHIFT)) & CDOG_STATUS2_NUMILLA_MASK) |
FLAGS - Flags | |
#define | CDOG_FLAGS_TO_FLAG_MASK (0x1U) |
#define | CDOG_FLAGS_TO_FLAG_SHIFT (0U) |
#define | CDOG_FLAGS_TO_FLAG(x) (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_TO_FLAG_SHIFT)) & CDOG_FLAGS_TO_FLAG_MASK) |
#define | CDOG_FLAGS_MISCOM_FLAG_MASK (0x2U) |
#define | CDOG_FLAGS_MISCOM_FLAG_SHIFT (1U) |
#define | CDOG_FLAGS_MISCOM_FLAG(x) (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_MISCOM_FLAG_SHIFT)) & CDOG_FLAGS_MISCOM_FLAG_MASK) |
#define | CDOG_FLAGS_SEQ_FLAG_MASK (0x4U) |
#define | CDOG_FLAGS_SEQ_FLAG_SHIFT (2U) |
#define | CDOG_FLAGS_SEQ_FLAG(x) (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_SEQ_FLAG_SHIFT)) & CDOG_FLAGS_SEQ_FLAG_MASK) |
#define | CDOG_FLAGS_CNT_FLAG_MASK (0x8U) |
#define | CDOG_FLAGS_CNT_FLAG_SHIFT (3U) |
#define | CDOG_FLAGS_CNT_FLAG(x) (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_CNT_FLAG_SHIFT)) & CDOG_FLAGS_CNT_FLAG_MASK) |
#define | CDOG_FLAGS_STATE_FLAG_MASK (0x10U) |
#define | CDOG_FLAGS_STATE_FLAG_SHIFT (4U) |
#define | CDOG_FLAGS_STATE_FLAG(x) (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_STATE_FLAG_SHIFT)) & CDOG_FLAGS_STATE_FLAG_MASK) |
#define | CDOG_FLAGS_ADDR_FLAG_MASK (0x20U) |
#define | CDOG_FLAGS_ADDR_FLAG_SHIFT (5U) |
#define | CDOG_FLAGS_ADDR_FLAG(x) (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_ADDR_FLAG_SHIFT)) & CDOG_FLAGS_ADDR_FLAG_MASK) |
#define | CDOG_FLAGS_POR_FLAG_MASK (0x10000U) |
#define | CDOG_FLAGS_POR_FLAG_SHIFT (16U) |
#define | CDOG_FLAGS_POR_FLAG(x) (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_POR_FLAG_SHIFT)) & CDOG_FLAGS_POR_FLAG_MASK) |
PERSISTENT - Persistent Data Storage | |
#define | CDOG_PERSISTENT_PERSIS_MASK (0xFFFFFFFFU) |
#define | CDOG_PERSISTENT_PERSIS_SHIFT (0U) |
#define | CDOG_PERSISTENT_PERSIS(x) (((uint32_t)(((uint32_t)(x)) << CDOG_PERSISTENT_PERSIS_SHIFT)) & CDOG_PERSISTENT_PERSIS_MASK) |
START - START Command | |
#define | CDOG_START_STRT_MASK (0xFFFFFFFFU) |
#define | CDOG_START_STRT_SHIFT (0U) |
#define | CDOG_START_STRT(x) (((uint32_t)(((uint32_t)(x)) << CDOG_START_STRT_SHIFT)) & CDOG_START_STRT_MASK) |
STOP - STOP Command | |
#define | CDOG_STOP_STP_MASK (0xFFFFFFFFU) |
#define | CDOG_STOP_STP_SHIFT (0U) |
#define | CDOG_STOP_STP(x) (((uint32_t)(((uint32_t)(x)) << CDOG_STOP_STP_SHIFT)) & CDOG_STOP_STP_MASK) |
RESTART - RESTART Command | |
#define | CDOG_RESTART_RSTRT_MASK (0xFFFFFFFFU) |
#define | CDOG_RESTART_RSTRT_SHIFT (0U) |
#define | CDOG_RESTART_RSTRT(x) (((uint32_t)(((uint32_t)(x)) << CDOG_RESTART_RSTRT_SHIFT)) & CDOG_RESTART_RSTRT_MASK) |
ADD - ADD Command | |
#define | CDOG_ADD_AD_MASK (0xFFFFFFFFU) |
#define | CDOG_ADD_AD_SHIFT (0U) |
#define | CDOG_ADD_AD(x) (((uint32_t)(((uint32_t)(x)) << CDOG_ADD_AD_SHIFT)) & CDOG_ADD_AD_MASK) |
ADD1 - ADD1 Command | |
#define | CDOG_ADD1_AD1_MASK (0xFFFFFFFFU) |
#define | CDOG_ADD1_AD1_SHIFT (0U) |
#define | CDOG_ADD1_AD1(x) (((uint32_t)(((uint32_t)(x)) << CDOG_ADD1_AD1_SHIFT)) & CDOG_ADD1_AD1_MASK) |
ADD16 - ADD16 Command | |
#define | CDOG_ADD16_AD16_MASK (0xFFFFFFFFU) |
#define | CDOG_ADD16_AD16_SHIFT (0U) |
#define | CDOG_ADD16_AD16(x) (((uint32_t)(((uint32_t)(x)) << CDOG_ADD16_AD16_SHIFT)) & CDOG_ADD16_AD16_MASK) |
ADD256 - ADD256 Command | |
#define | CDOG_ADD256_AD256_MASK (0xFFFFFFFFU) |
#define | CDOG_ADD256_AD256_SHIFT (0U) |
#define | CDOG_ADD256_AD256(x) (((uint32_t)(((uint32_t)(x)) << CDOG_ADD256_AD256_SHIFT)) & CDOG_ADD256_AD256_MASK) |
SUB - SUB Command | |
#define | CDOG_SUB_S0B_MASK (0xFFFFFFFFU) |
#define | CDOG_SUB_S0B_SHIFT (0U) |
#define | CDOG_SUB_S0B(x) (((uint32_t)(((uint32_t)(x)) << CDOG_SUB_S0B_SHIFT)) & CDOG_SUB_S0B_MASK) |
SUB1 - SUB1 Command | |
#define | CDOG_SUB1_S1B_MASK (0xFFFFFFFFU) |
#define | CDOG_SUB1_S1B_SHIFT (0U) |
#define | CDOG_SUB1_S1B(x) (((uint32_t)(((uint32_t)(x)) << CDOG_SUB1_S1B_SHIFT)) & CDOG_SUB1_S1B_MASK) |
SUB16 - SUB16 Command | |
#define | CDOG_SUB16_SB16_MASK (0xFFFFFFFFU) |
#define | CDOG_SUB16_SB16_SHIFT (0U) |
#define | CDOG_SUB16_SB16(x) (((uint32_t)(((uint32_t)(x)) << CDOG_SUB16_SB16_SHIFT)) & CDOG_SUB16_SB16_MASK) |
SUB256 - SUB256 Command | |
#define | CDOG_SUB256_SB256_MASK (0xFFFFFFFFU) |
#define | CDOG_SUB256_SB256_SHIFT (0U) |
#define | CDOG_SUB256_SB256(x) (((uint32_t)(((uint32_t)(x)) << CDOG_SUB256_SB256_SHIFT)) & CDOG_SUB256_SB256_MASK) |
#define CDOG_ADD16_AD16 | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_ADD16_AD16_SHIFT)) & CDOG_ADD16_AD16_MASK) |
AD16 - ADD 16
#define CDOG_ADD16_AD16 | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_ADD16_AD16_SHIFT)) & CDOG_ADD16_AD16_MASK) |
AD16 - ADD 16
#define CDOG_ADD1_AD1 | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_ADD1_AD1_SHIFT)) & CDOG_ADD1_AD1_MASK) |
AD1 - ADD 1
#define CDOG_ADD1_AD1 | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_ADD1_AD1_SHIFT)) & CDOG_ADD1_AD1_MASK) |
AD1 - ADD 1
#define CDOG_ADD256_AD256 | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_ADD256_AD256_SHIFT)) & CDOG_ADD256_AD256_MASK) |
AD256 - ADD 256
#define CDOG_ADD256_AD256 | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_ADD256_AD256_SHIFT)) & CDOG_ADD256_AD256_MASK) |
AD256 - ADD 256
#define CDOG_ADD_AD | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_ADD_AD_SHIFT)) & CDOG_ADD_AD_MASK) |
AD - ADD Write Value
#define CDOG_ADD_AD | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_ADD_AD_SHIFT)) & CDOG_ADD_AD_MASK) |
AD - ADD Write Value
#define CDOG_CONTROL_ADDRESS_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_ADDRESS_CTRL_SHIFT)) & CDOG_CONTROL_ADDRESS_CTRL_MASK) |
ADDRESS_CTRL - ADDRESS fault control 0b001..Enable reset 0b010..Enable interrupt 0b100..Disable both reset and interrupt
#define CDOG_CONTROL_ADDRESS_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_ADDRESS_CTRL_SHIFT)) & CDOG_CONTROL_ADDRESS_CTRL_MASK) |
ADDRESS_CTRL - ADDRESS fault control 0b001..Enable reset 0b010..Enable interrupt 0b100..Disable both reset and interrupt
#define CDOG_CONTROL_CONTROL_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_CONTROL_CTRL_SHIFT)) & CDOG_CONTROL_CONTROL_CTRL_MASK) |
CONTROL_CTRL - CONTROL fault control 0b001..Enable reset 0b100..Disable reset
#define CDOG_CONTROL_CONTROL_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_CONTROL_CTRL_SHIFT)) & CDOG_CONTROL_CONTROL_CTRL_MASK) |
CONTROL_CTRL - CONTROL fault control 0b001..Enable reset 0b100..Disable reset
#define CDOG_CONTROL_DEBUG_HALT_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_DEBUG_HALT_CTRL_SHIFT)) & CDOG_CONTROL_DEBUG_HALT_CTRL_MASK) |
DEBUG_HALT_CTRL - DEBUG_HALT control 0b01..Keep the timer running 0b10..Stop the timer
#define CDOG_CONTROL_DEBUG_HALT_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_DEBUG_HALT_CTRL_SHIFT)) & CDOG_CONTROL_DEBUG_HALT_CTRL_MASK) |
DEBUG_HALT_CTRL - DEBUG_HALT control 0b01..Keep the timer running 0b10..Stop the timer
#define CDOG_CONTROL_IRQ_PAUSE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_IRQ_PAUSE_SHIFT)) & CDOG_CONTROL_IRQ_PAUSE_MASK) |
IRQ_PAUSE - IRQ pause control 0b01..Keep the timer running 0b10..Stop the timer
#define CDOG_CONTROL_IRQ_PAUSE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_IRQ_PAUSE_SHIFT)) & CDOG_CONTROL_IRQ_PAUSE_MASK) |
IRQ_PAUSE - IRQ pause control 0b01..Keep the timer running 0b10..Stop the timer
#define CDOG_CONTROL_LOCK_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_LOCK_CTRL_SHIFT)) & CDOG_CONTROL_LOCK_CTRL_MASK) |
LOCK_CTRL - Lock control 0b01..Locked 0b10..Unlocked
#define CDOG_CONTROL_LOCK_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_LOCK_CTRL_SHIFT)) & CDOG_CONTROL_LOCK_CTRL_MASK) |
LOCK_CTRL - Lock control 0b01..Locked 0b10..Unlocked
#define CDOG_CONTROL_MISCOMPARE_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_MISCOMPARE_CTRL_SHIFT)) & CDOG_CONTROL_MISCOMPARE_CTRL_MASK) |
MISCOMPARE_CTRL - MISCOMPARE fault control 0b100..Disable both reset and interrupt 0b001..Enable reset 0b010..Enable interrupt
#define CDOG_CONTROL_MISCOMPARE_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_MISCOMPARE_CTRL_SHIFT)) & CDOG_CONTROL_MISCOMPARE_CTRL_MASK) |
MISCOMPARE_CTRL - MISCOMPARE fault control 0b100..Disable both reset and interrupt 0b001..Enable reset 0b010..Enable interrupt
#define CDOG_CONTROL_SEQUENCE_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_SEQUENCE_CTRL_SHIFT)) & CDOG_CONTROL_SEQUENCE_CTRL_MASK) |
SEQUENCE_CTRL - SEQUENCE fault control 0b001..Enable reset 0b010..Enable interrupt 0b100..Disable both reset and interrupt
#define CDOG_CONTROL_SEQUENCE_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_SEQUENCE_CTRL_SHIFT)) & CDOG_CONTROL_SEQUENCE_CTRL_MASK) |
SEQUENCE_CTRL - SEQUENCE fault control 0b001..Enable reset 0b010..Enable interrupt 0b100..Disable both reset and interrupt
#define CDOG_CONTROL_STATE_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_STATE_CTRL_SHIFT)) & CDOG_CONTROL_STATE_CTRL_MASK) |
STATE_CTRL - STATE fault control 0b001..Enable reset 0b010..Enable interrupt 0b100..Disable both reset and interrupt
#define CDOG_CONTROL_STATE_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_STATE_CTRL_SHIFT)) & CDOG_CONTROL_STATE_CTRL_MASK) |
STATE_CTRL - STATE fault control 0b001..Enable reset 0b010..Enable interrupt 0b100..Disable both reset and interrupt
#define CDOG_CONTROL_TIMEOUT_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_TIMEOUT_CTRL_SHIFT)) & CDOG_CONTROL_TIMEOUT_CTRL_MASK) |
TIMEOUT_CTRL - TIMEOUT fault control 0b100..Disable both reset and interrupt 0b001..Enable reset 0b010..Enable interrupt
#define CDOG_CONTROL_TIMEOUT_CTRL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_CONTROL_TIMEOUT_CTRL_SHIFT)) & CDOG_CONTROL_TIMEOUT_CTRL_MASK) |
TIMEOUT_CTRL - TIMEOUT fault control 0b100..Disable both reset and interrupt 0b001..Enable reset 0b010..Enable interrupt
#define CDOG_FLAGS_ADDR_FLAG | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_ADDR_FLAG_SHIFT)) & CDOG_FLAGS_ADDR_FLAG_MASK) |
ADDR_FLAG - ADDRESS fault flag 0b0..An ADDRESS fault has not occurred 0b1..An ADDRESS fault has occurred
#define CDOG_FLAGS_ADDR_FLAG | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_ADDR_FLAG_SHIFT)) & CDOG_FLAGS_ADDR_FLAG_MASK) |
ADDR_FLAG - ADDRESS fault flag 0b0..An ADDRESS fault has not occurred 0b1..An ADDRESS fault has occurred
#define CDOG_FLAGS_CNT_FLAG | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_CNT_FLAG_SHIFT)) & CDOG_FLAGS_CNT_FLAG_MASK) |
CNT_FLAG - CONTROL fault flag 0b0..A CONTROL fault has not occurred 0b1..A CONTROL fault has occurred
#define CDOG_FLAGS_CNT_FLAG | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_CNT_FLAG_SHIFT)) & CDOG_FLAGS_CNT_FLAG_MASK) |
CNT_FLAG - CONTROL fault flag 0b0..A CONTROL fault has not occurred 0b1..A CONTROL fault has occurred
#define CDOG_FLAGS_MISCOM_FLAG | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_MISCOM_FLAG_SHIFT)) & CDOG_FLAGS_MISCOM_FLAG_MASK) |
MISCOM_FLAG - MISCOMPARE fault flag 0b0..A MISCOMPARE fault has not occurred 0b1..A MISCOMPARE fault has occurred
#define CDOG_FLAGS_MISCOM_FLAG | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_MISCOM_FLAG_SHIFT)) & CDOG_FLAGS_MISCOM_FLAG_MASK) |
MISCOM_FLAG - MISCOMPARE fault flag 0b0..A MISCOMPARE fault has not occurred 0b1..A MISCOMPARE fault has occurred
#define CDOG_FLAGS_POR_FLAG | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_POR_FLAG_SHIFT)) & CDOG_FLAGS_POR_FLAG_MASK) |
POR_FLAG - Power-on reset flag 0b0..A Power-on reset event has not occurred 0b1..A Power-on reset event has occurred
#define CDOG_FLAGS_POR_FLAG | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_POR_FLAG_SHIFT)) & CDOG_FLAGS_POR_FLAG_MASK) |
POR_FLAG - Power-on reset flag 0b0..A Power-on reset event has not occurred 0b1..A Power-on reset event has occurred
#define CDOG_FLAGS_SEQ_FLAG | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_SEQ_FLAG_SHIFT)) & CDOG_FLAGS_SEQ_FLAG_MASK) |
SEQ_FLAG - SEQUENCE fault flag 0b0..A SEQUENCE fault has not occurred 0b1..A SEQUENCE fault has occurred
#define CDOG_FLAGS_SEQ_FLAG | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_SEQ_FLAG_SHIFT)) & CDOG_FLAGS_SEQ_FLAG_MASK) |
SEQ_FLAG - SEQUENCE fault flag 0b0..A SEQUENCE fault has not occurred 0b1..A SEQUENCE fault has occurred
#define CDOG_FLAGS_STATE_FLAG | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_STATE_FLAG_SHIFT)) & CDOG_FLAGS_STATE_FLAG_MASK) |
STATE_FLAG - STATE fault flag 0b0..A STATE fault has not occurred 0b1..A STATE fault has occurred
#define CDOG_FLAGS_STATE_FLAG | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_STATE_FLAG_SHIFT)) & CDOG_FLAGS_STATE_FLAG_MASK) |
STATE_FLAG - STATE fault flag 0b0..A STATE fault has not occurred 0b1..A STATE fault has occurred
#define CDOG_FLAGS_TO_FLAG | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_TO_FLAG_SHIFT)) & CDOG_FLAGS_TO_FLAG_MASK) |
TO_FLAG - TIMEOUT fault flag 0b0..A TIMEOUT fault has not occurred 0b1..A TIMEOUT fault has occurred
#define CDOG_FLAGS_TO_FLAG | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_FLAGS_TO_FLAG_SHIFT)) & CDOG_FLAGS_TO_FLAG_MASK) |
TO_FLAG - TIMEOUT fault flag 0b0..A TIMEOUT fault has not occurred 0b1..A TIMEOUT fault has occurred
#define CDOG_INSTRUCTION_TIMER_INSTIM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_INSTRUCTION_TIMER_INSTIM_SHIFT)) & CDOG_INSTRUCTION_TIMER_INSTIM_MASK) |
INSTIM - Current value of the Instruction Timer
#define CDOG_INSTRUCTION_TIMER_INSTIM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_INSTRUCTION_TIMER_INSTIM_SHIFT)) & CDOG_INSTRUCTION_TIMER_INSTIM_MASK) |
INSTIM - Current value of the Instruction Timer
#define CDOG_PERSISTENT_PERSIS | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_PERSISTENT_PERSIS_SHIFT)) & CDOG_PERSISTENT_PERSIS_MASK) |
PERSIS - Persistent Storage
#define CDOG_PERSISTENT_PERSIS | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_PERSISTENT_PERSIS_SHIFT)) & CDOG_PERSISTENT_PERSIS_MASK) |
PERSIS - Persistent Storage
#define CDOG_RELOAD_RLOAD | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_RELOAD_RLOAD_SHIFT)) & CDOG_RELOAD_RLOAD_MASK) |
RLOAD - Instruction Timer reload value
#define CDOG_RELOAD_RLOAD | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_RELOAD_RLOAD_SHIFT)) & CDOG_RELOAD_RLOAD_MASK) |
RLOAD - Instruction Timer reload value
#define CDOG_RESTART_RSTRT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_RESTART_RSTRT_SHIFT)) & CDOG_RESTART_RSTRT_MASK) |
RSTRT - Restart command
#define CDOG_RESTART_RSTRT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_RESTART_RSTRT_SHIFT)) & CDOG_RESTART_RSTRT_MASK) |
RSTRT - Restart command
#define CDOG_SECURE_COUNTER_SECCNT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_SECURE_COUNTER_SECCNT_SHIFT)) & CDOG_SECURE_COUNTER_SECCNT_MASK) |
SECCNT - Secure Counter
#define CDOG_SECURE_COUNTER_SECCNT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_SECURE_COUNTER_SECCNT_SHIFT)) & CDOG_SECURE_COUNTER_SECCNT_MASK) |
SECCNT - Secure Counter
#define CDOG_START_STRT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_START_STRT_SHIFT)) & CDOG_START_STRT_MASK) |
STRT - Start command
#define CDOG_START_STRT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_START_STRT_SHIFT)) & CDOG_START_STRT_MASK) |
STRT - Start command
#define CDOG_STATUS2_NUMCNTF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS2_NUMCNTF_SHIFT)) & CDOG_STATUS2_NUMCNTF_MASK) |
NUMCNTF - Number of CONTROL faults since the last POR
#define CDOG_STATUS2_NUMCNTF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS2_NUMCNTF_SHIFT)) & CDOG_STATUS2_NUMCNTF_MASK) |
NUMCNTF - Number of CONTROL faults since the last POR
#define CDOG_STATUS2_NUMILLA | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS2_NUMILLA_SHIFT)) & CDOG_STATUS2_NUMILLA_MASK) |
NUMILLA - Number of ADDRESS faults since the last POR
#define CDOG_STATUS2_NUMILLA | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS2_NUMILLA_SHIFT)) & CDOG_STATUS2_NUMILLA_MASK) |
NUMILLA - Number of ADDRESS faults since the last POR
#define CDOG_STATUS2_NUMILLSTF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS2_NUMILLSTF_SHIFT)) & CDOG_STATUS2_NUMILLSTF_MASK) |
NUMILLSTF - Number of STATE faults since the last POR
#define CDOG_STATUS2_NUMILLSTF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS2_NUMILLSTF_SHIFT)) & CDOG_STATUS2_NUMILLSTF_MASK) |
NUMILLSTF - Number of STATE faults since the last POR
#define CDOG_STATUS_CURST | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_CURST_SHIFT)) & CDOG_STATUS_CURST_MASK) |
CURST - Current State
#define CDOG_STATUS_CURST | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_CURST_SHIFT)) & CDOG_STATUS_CURST_MASK) |
CURST - Current State
#define CDOG_STATUS_NUMILSEQF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_NUMILSEQF_SHIFT)) & CDOG_STATUS_NUMILSEQF_MASK) |
NUMILSEQF - Number of SEQUENCE faults since the last POR
#define CDOG_STATUS_NUMILSEQF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_NUMILSEQF_SHIFT)) & CDOG_STATUS_NUMILSEQF_MASK) |
NUMILSEQF - Number of SEQUENCE faults since the last POR
#define CDOG_STATUS_NUMMISCOMPF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_NUMMISCOMPF_SHIFT)) & CDOG_STATUS_NUMMISCOMPF_MASK) |
NUMMISCOMPF - Number of MISCOMPARE faults since the last POR
#define CDOG_STATUS_NUMMISCOMPF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_NUMMISCOMPF_SHIFT)) & CDOG_STATUS_NUMMISCOMPF_MASK) |
NUMMISCOMPF - Number of MISCOMPARE faults since the last POR
#define CDOG_STATUS_NUMTOF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_NUMTOF_SHIFT)) & CDOG_STATUS_NUMTOF_MASK) |
NUMTOF - Number of TIMEOUT faults since the last POR
#define CDOG_STATUS_NUMTOF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STATUS_NUMTOF_SHIFT)) & CDOG_STATUS_NUMTOF_MASK) |
NUMTOF - Number of TIMEOUT faults since the last POR
#define CDOG_STOP_STP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STOP_STP_SHIFT)) & CDOG_STOP_STP_MASK) |
STP - Stop command
#define CDOG_STOP_STP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_STOP_STP_SHIFT)) & CDOG_STOP_STP_MASK) |
STP - Stop command
#define CDOG_SUB16_SB16 | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_SUB16_SB16_SHIFT)) & CDOG_SUB16_SB16_MASK) |
SB16 - Subtract 16
#define CDOG_SUB16_SB16 | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_SUB16_SB16_SHIFT)) & CDOG_SUB16_SB16_MASK) |
SB16 - Subtract 16
#define CDOG_SUB1_S1B | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_SUB1_S1B_SHIFT)) & CDOG_SUB1_S1B_MASK) |
S1B - Subtract 1
#define CDOG_SUB1_S1B | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_SUB1_S1B_SHIFT)) & CDOG_SUB1_S1B_MASK) |
S1B - Subtract 1
#define CDOG_SUB256_SB256 | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_SUB256_SB256_SHIFT)) & CDOG_SUB256_SB256_MASK) |
SB256 - Subtract 256
#define CDOG_SUB256_SB256 | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_SUB256_SB256_SHIFT)) & CDOG_SUB256_SB256_MASK) |
SB256 - Subtract 256
#define CDOG_SUB_S0B | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_SUB_S0B_SHIFT)) & CDOG_SUB_S0B_MASK) |
S0B - Subtract Write Value
#define CDOG_SUB_S0B | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << CDOG_SUB_S0B_SHIFT)) & CDOG_SUB_S0B_MASK) |
S0B - Subtract Write Value