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void | Xil_InitializeExistingMPURegConfig (void) |
| Initializes the MPU configuration table that are setup in the R5 boot code in the Init_Mpu function called before C main.
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void | Xil_SetTlbAttributes (INTPTR addr, u32 attrib) |
| This function sets the memory attributes for a section covering 1MB, of memory in the translation table.
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u32 | Xil_SetMPURegion (INTPTR addr, u64 size, u32 attrib) |
| Set the memory attributes for a section of memory in the translation table.
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void | Xil_EnableMPU (void) |
| Enable MPU for Cortex R5 processor. This function invalidates I cache and flush the D Caches, and then enables the MPU.
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void | Xil_DisableMPU (void) |
| Disable MPU for Cortex R5 processors. This function invalidates I cache and flush the D Caches, and then disabes the MPU.
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u32 | Xil_UpdateMPUConfig (u32 reg_num, INTPTR address, u32 size, u32 attrib) |
| Update the MPU configuration for the requested region number in the global MPU configuration table.
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void | Xil_GetMPUConfig (XMpu_Config mpuconfig) |
| The MPU configuration table is passed to the caller.
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u32 | Xil_GetNumOfFreeRegions (void) |
| Returns the total number of free MPU regions available.
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u16 | Xil_GetMPUFreeRegMask (void) |
| Returns the total number of free MPU regions available in the form of a mask. A bit of 1 in the returned 16 bit value represents the corresponding region number to be available. For example, if this function returns 0xC0000, this would mean, the regions 14 and 15 are available to users.
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u32 | Xil_DisableMPURegionByRegNum (u32 reg_num) |
| Disables the corresponding region number as passed by the user.
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u32 | Xil_SetMPURegionByRegNum (u32 reg_num, INTPTR addr, u64 size, u32 attrib) |
| Enables the corresponding region number as passed by the user.
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u32 | Xil_GetNextMPURegion (void) |
| Returns the next available free MPU region.
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void * | Xil_MemMap (UINTPTR Physaddr, size_t size, u32 flags) |
| Memory mapping for Cortex-R5F. If successful, the mapped region will include all of the memory requested, but may include more. Specifically, it will be a power of 2 in size, aligned on a boundary of that size.
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This file provides APIs for enabling/disabling MPU and setting the memory attributes for sections, in the MPU translation table.
MODIFICATION HISTORY:
Ver Who Date Changes
----- ---- -------- ---------------------------------------------------
5.00 pkp 02/10/14 Initial version
6.2 mus 01/27/17 Updated to support IAR compiler
6.4 asa 08/16/17 Added many APIs for MPU access to make MPU usage
user-friendly. The APIs added are: Xil_UpdateMPUConfig,
Xil_GetMPUConfig, Xil_GetNumOfFreeRegions,
Xil_GetNextMPURegion, Xil_DisableMPURegionByRegNum,
Xil_GetMPUFreeRegMask, Xil_SetMPURegionByRegNum, and
Xil_InitializeExistingMPURegConfig.
Added a new array of structure of type XMpuConfig to
represent the MPU configuration table.
6.8 aru 07/02/18 Returned the pointer instead of address
of that pointer in Xil_MemMap().
7.5 asa 03/01/21 Ensure that Mpu_Config does not stay in .boot/.vector
sections which generally should be executable code
which can be allocated and not written.
Mpu_Config array is populated during boot time, hence
cannot be placed in .bss or .data section. Putting
Mpu_Config in a new .bootdata section.
7.7 sk 01/10/22 Update int to u32 to fix misrac misra_c_2012_directive_4_6
violations.
7.7 sk 01/10/22 Typecast variables from signed to unsigned to fix
misra_c_2012_rule_10_4 violation.
7.7 sk 01/10/22 Add explicit parentheses for region_size and region_size[0]
to fix misra_c_2012_rule_12_1 violation.
7.7 sk 01/10/22 Remove unsigned sign to fix misra_c_2012_rule_10_3 violation.
7.7 sk 01/10/22 Modify if condition to fix misra_c_2012_rule_10_1 violation.
7.7 sk 01/10/22 Typecast to fix wider essential type misra_c_2012_rule_10_7
violation.
7.7 sk 01/10/22 Update conditional expression to fix misra_c_2012_rule_14_4
violation.
7.7 sk 01/10/22 Add braces for the if statement to make it a compound
statement to fix misra_c_2012_rule_15_6 violation.