|
void | Xil_SetTlbAttributes (INTPTR addr, u32 attrib) |
| This function sets the memory attributes for a section covering 1MB, of memory in the translation table.
|
|
void | Xil_EnableMPU (void) |
| Enable MPU for Cortex R5 processor. This function invalidates I cache and flush the D Caches, and then enables the MPU.
|
|
void | Xil_DisableMPU (void) |
| Disable MPU for Cortex R5 processors. This function invalidates I cache and flush the D Caches, and then disabes the MPU.
|
|
u32 | Xil_SetMPURegion (INTPTR addr, u64 size, u32 attrib) |
| Set the memory attributes for a section of memory in the translation table.
|
|
u32 | Xil_UpdateMPUConfig (u32 reg_num, INTPTR address, u32 size, u32 attrib) |
| Update the MPU configuration for the requested region number in the global MPU configuration table.
|
|
void | Xil_GetMPUConfig (XMpu_Config mpuconfig) |
| The MPU configuration table is passed to the caller.
|
|
u32 | Xil_GetNumOfFreeRegions (void) |
| Returns the total number of free MPU regions available.
|
|
u32 | Xil_GetNextMPURegion (void) |
| Returns the next available free MPU region.
|
|
u32 | Xil_DisableMPURegionByRegNum (u32 reg_num) |
| Disables the corresponding region number as passed by the user.
|
|
u16 | Xil_GetMPUFreeRegMask (void) |
| Returns the total number of free MPU regions available in the form of a mask. A bit of 1 in the returned 16 bit value represents the corresponding region number to be available. For example, if this function returns 0xC0000, this would mean, the regions 14 and 15 are available to users.
|
|
u32 | Xil_SetMPURegionByRegNum (u32 reg_num, INTPTR addr, u64 size, u32 attrib) |
| Enables the corresponding region number as passed by the user.
|
|
void * | Xil_MemMap (UINTPTR Physaddr, size_t size, u32 flags) |
| Memory mapping for Cortex-R5F. If successful, the mapped region will include all of the memory requested, but may include more. Specifically, it will be a power of 2 in size, aligned on a boundary of that size.
|
|
MPU functions provides access to MPU operations such as enable MPU, disable MPU and set attribute for section of memory. Boot code invokes Init_MPU function to configure the MPU. A total of 10 MPU regions are allocated with another 6 being free for users. Overview of the memory attributes for different MPU regions is as given below,
| Memory Range | Attributes of MPURegion |
DDR | 0x00000000 - 0x7FFFFFFF | Normal write-back Cacheable |
PL | 0x80000000 - 0xBFFFFFFF | Strongly Ordered |
QSPI | 0xC0000000 - 0xDFFFFFFF | Device Memory |
PCIe | 0xE0000000 - 0xEFFFFFFF | Device Memory |
STM_CORESIGHT | 0xF8000000 - 0xF8FFFFFF | Device Memory |
RPU_R5_GIC | 0xF9000000 - 0xF90FFFFF | Device memory |
FPS | 0xFD000000 - 0xFDFFFFFF | Device Memory |
LPS | 0xFE000000 - 0xFFFFFFFF | Device Memory |
OCM | 0xFFFC0000 - 0xFFFFFFFF | Normal write-back Cacheable |
- Note
- For a system where DDR is less than 2GB, region after DDR and before PL is marked as undefined in translation table. Memory range 0xFE000000-0xFEFFFFFF is allocated for upper LPS slaves, where as memory region 0xFF000000-0xFFFFFFFF is allocated for lower LPS slaves.
MODIFICATION HISTORY:
Ver Who Date Changes
----- ---- -------- ---------------------------------------------------
5.00 pkp 02/10/14 Initial version
6.4 asa 08/16/17 Added many APIs for MPU access to make MPU usage
user-friendly. The APIs added are: Xil_UpdateMPUConfig,
Xil_GetMPUConfig, Xil_GetNumOfFreeRegions,
Xil_GetNextMPURegion, Xil_DisableMPURegionByRegNum,
Xil_GetMPUFreeRegMask, Xil_SetMPURegionByRegNum, and
Xil_InitializeExistingMPURegConfig.
Added a new array of structure of type XMpuConfig to
represent the MPU configuration table.
7.7 sk 01/10/22 Modify Xil_SetTlbAttributes function argument name to fix
misra_c_2012_rule_8_3 violation.
◆ Xil_DisableMPU()
void Xil_DisableMPU |
( |
void |
| ) |
|
Disable MPU for Cortex R5 processors. This function invalidates I cache and flush the D Caches, and then disabes the MPU.
- Returns
- None.
◆ Xil_DisableMPURegionByRegNum()
u32 Xil_DisableMPURegionByRegNum |
( |
u32 |
reg_num | ) |
|
Disables the corresponding region number as passed by the user.
- Parameters
-
reg_num | The region number to be disabled |
- Returns
- XST_SUCCESS: If the region could be disabled successfully XST_FAILURE: If the requested region number is 16 or more.
◆ Xil_EnableMPU()
void Xil_EnableMPU |
( |
void |
| ) |
|
Enable MPU for Cortex R5 processor. This function invalidates I cache and flush the D Caches, and then enables the MPU.
- Returns
- None.
◆ Xil_GetMPUConfig()
void Xil_GetMPUConfig |
( |
XMpu_Config |
mpuconfig | ) |
|
The MPU configuration table is passed to the caller.
- Parameters
-
mpuconfig | This is of type XMpu_Config which is an array of 16 entries of type structure representing the MPU config table |
- Returns
- none
◆ Xil_GetMPUFreeRegMask()
u16 Xil_GetMPUFreeRegMask |
( |
void |
| ) |
|
Returns the total number of free MPU regions available in the form of a mask. A bit of 1 in the returned 16 bit value represents the corresponding region number to be available. For example, if this function returns 0xC0000, this would mean, the regions 14 and 15 are available to users.
- Returns
- The free region mask as a 16 bit value
◆ Xil_GetNextMPURegion()
u32 Xil_GetNextMPURegion |
( |
void |
| ) |
|
Returns the next available free MPU region.
- Returns
- The free MPU region available
◆ Xil_GetNumOfFreeRegions()
u32 Xil_GetNumOfFreeRegions |
( |
void |
| ) |
|
Returns the total number of free MPU regions available.
- Returns
- Number of free regions available to users
◆ Xil_MemMap()
void * Xil_MemMap |
( |
UINTPTR |
Physaddr, |
|
|
size_t |
size, |
|
|
u32 |
flags |
|
) |
| |
Memory mapping for Cortex-R5F. If successful, the mapped region will include all of the memory requested, but may include more. Specifically, it will be a power of 2 in size, aligned on a boundary of that size.
- Parameters
-
Physaddr | is base physical address at which to start mapping. NULL in Physaddr masks possible mapping errors. |
size | of region to be mapped. |
flags | used to set translation table. |
- Returns
- Physaddr on success, NULL on error. Ambiguous if Physaddr==NULL
◆ Xil_SetMPURegion()
u32 Xil_SetMPURegion |
( |
INTPTR |
addr, |
|
|
u64 |
size, |
|
|
u32 |
attrib |
|
) |
| |
Set the memory attributes for a section of memory in the translation table.
- Parameters
-
addr | 32-bit address for which memory attributes need to be set.. |
size | size is the size of the region. |
attrib | Attribute for the given memory region. |
- Returns
- None.
◆ Xil_SetMPURegionByRegNum()
u32 Xil_SetMPURegionByRegNum |
( |
u32 |
reg_num, |
|
|
INTPTR |
addr, |
|
|
u64 |
size, |
|
|
u32 |
attrib |
|
) |
| |
Enables the corresponding region number as passed by the user.
- Parameters
-
reg_num | The region number to be enabled |
addr | 32 bit address for start of the region. |
size | Requested size of the region. |
attrib | Attribute for the corresponding region. |
- Returns
- XST_SUCCESS: If the region could be created successfully XST_FAILURE: If the requested region number is 16 or more.
◆ Xil_SetTlbAttributes()
void Xil_SetTlbAttributes |
( |
INTPTR |
addr, |
|
|
u32 |
attrib |
|
) |
| |
This function sets the memory attributes for a section covering 1MB, of memory in the translation table.
- Parameters
-
addr | 32-bit address for which memory attributes need to be set. |
attrib | Attribute for the given memory region. |
- Returns
- None.
◆ Xil_UpdateMPUConfig()
u32 Xil_UpdateMPUConfig |
( |
u32 |
reg_num, |
|
|
INTPTR |
address, |
|
|
u32 |
size, |
|
|
u32 |
attrib |
|
) |
| |
Update the MPU configuration for the requested region number in the global MPU configuration table.
- Parameters
-
reg_num | The requested region number to be updated information for. |
address | 32 bit address for start of the region. |
size | Requested size of the region. |
attrib | Attribute for the corresponding region. |
- Returns
- XST_FAILURE: When the requested region number if 16 or more. XST_SUCCESS: When the MPU configuration table is updated.