Instruction trace buffer control register 0 (ITBC0)

This group contains register bit definitions. More...

Macros
#define	DSU4_ITBC0_TFILT_SHIFT   28
#define	DSU4_ITBC0_TFILT_MASK   0xf0000000U
#define	DSU4_ITBC0_TFILT_GET(_reg)
#define	DSU4_ITBC0_TFILT_SET(_reg, _val)
#define	DSU4_ITBC0_TFILT(_val)
#define	DSU4_ITBC0_ITPOINTER_SHIFT   0
#define	DSU4_ITBC0_ITPOINTER_MASK   0xffffU
#define	DSU4_ITBC0_ITPOINTER_GET(_reg)
#define	DSU4_ITBC0_ITPOINTER_SET(_reg, _val)
#define	DSU4_ITBC0_ITPOINTER(_val)

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

DSU4_ITBC0_ITPOINTER

#define DSU4_ITBC0_ITPOINTER

(

_val

)

Value:

  ( ( ( _val ) << DSU4_ITBC0_ITPOINTER_SHIFT ) & \
    DSU4_ITBC0_ITPOINTER_MASK )

DSU4_ITBC0_ITPOINTER_GET

#define DSU4_ITBC0_ITPOINTER_GET

(

_reg

)

Value:

  ( ( ( _reg ) & DSU4_ITBC0_ITPOINTER_MASK ) >> \
    DSU4_ITBC0_ITPOINTER_SHIFT )

DSU4_ITBC0_ITPOINTER_SET

#define DSU4_ITBC0_ITPOINTER_SET	(		_reg,
			_val
	)

Value:

  ( ( ( _reg ) & ~DSU4_ITBC0_ITPOINTER_MASK ) | \
    ( ( ( _val ) << DSU4_ITBC0_ITPOINTER_SHIFT ) & \
      DSU4_ITBC0_ITPOINTER_MASK ) )

DSU4_ITBC0_TFILT

#define DSU4_ITBC0_TFILT

(

_val

)

Value:

  ( ( ( _val ) << DSU4_ITBC0_TFILT_SHIFT ) & \
    DSU4_ITBC0_TFILT_MASK )

DSU4_ITBC0_TFILT_GET

#define DSU4_ITBC0_TFILT_GET

(

_reg

)

Value:

  ( ( ( _reg ) & DSU4_ITBC0_TFILT_MASK ) >> \
    DSU4_ITBC0_TFILT_SHIFT )

DSU4_ITBC0_TFILT_SET

#define DSU4_ITBC0_TFILT_SET	(		_reg,
			_val
	)

Value:

  ( ( ( _reg ) & ~DSU4_ITBC0_TFILT_MASK ) | \
    ( ( ( _val ) << DSU4_ITBC0_TFILT_SHIFT ) & \
      DSU4_ITBC0_TFILT_MASK ) )