This group contains register bit definitions.
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This group contains register bit definitions.
◆ DSU4_ATBFM_MMASK_15_0
#define DSU4_ATBFM_MMASK_15_0 |
( |
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_val | ) |
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Value: ( ( ( _val ) << DSU4_ATBFM_MMASK_15_0_SHIFT ) & \
DSU4_ATBFM_MMASK_15_0_MASK )
◆ DSU4_ATBFM_MMASK_15_0_GET
#define DSU4_ATBFM_MMASK_15_0_GET |
( |
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_reg | ) |
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Value: ( ( ( _reg ) & DSU4_ATBFM_MMASK_15_0_MASK ) >> \
DSU4_ATBFM_MMASK_15_0_SHIFT )
◆ DSU4_ATBFM_MMASK_15_0_SET
#define DSU4_ATBFM_MMASK_15_0_SET |
( |
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_reg, |
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|
|
_val |
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) |
| |
Value: ( ( ( _reg ) & ~DSU4_ATBFM_MMASK_15_0_MASK ) | \
( ( ( _val ) << DSU4_ATBFM_MMASK_15_0_SHIFT ) & \
DSU4_ATBFM_MMASK_15_0_MASK ) )
◆ DSU4_ATBFM_SMASK_15_0
#define DSU4_ATBFM_SMASK_15_0 |
( |
|
_val | ) |
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Value: ( ( ( _val ) << DSU4_ATBFM_SMASK_15_0_SHIFT ) & \
DSU4_ATBFM_SMASK_15_0_MASK )
◆ DSU4_ATBFM_SMASK_15_0_GET
#define DSU4_ATBFM_SMASK_15_0_GET |
( |
|
_reg | ) |
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Value: ( ( ( _reg ) & DSU4_ATBFM_SMASK_15_0_MASK ) >> \
DSU4_ATBFM_SMASK_15_0_SHIFT )
◆ DSU4_ATBFM_SMASK_15_0_SET
#define DSU4_ATBFM_SMASK_15_0_SET |
( |
|
_reg, |
|
|
|
_val |
|
) |
| |
Value: ( ( ( _reg ) & ~DSU4_ATBFM_SMASK_15_0_MASK ) | \
( ( ( _val ) << DSU4_ATBFM_SMASK_15_0_SHIFT ) & \
DSU4_ATBFM_SMASK_15_0_MASK ) )