RTEMS 6.1-rc2
|
This header file provides interfaces of the ARM CP15 cache controller suppport. More...
Go to the source code of this file.
Macros | |
#define | ARM_CACHE_L1_CPU_DATA_ALIGNMENT 32 |
#define | ARM_CACHE_L1_CPU_INSTRUCTION_ALIGNMENT 32 |
#define | ARM_CACHE_L1_CSS_ID_DATA (ARM_CP15_CACHE_CSS_ID_DATA | ARM_CP15_CACHE_CSS_LEVEL(0)) |
#define | ARM_CACHE_L1_CSS_ID_INSTRUCTION (ARM_CP15_CACHE_CSS_ID_INSTRUCTION | ARM_CP15_CACHE_CSS_LEVEL(0)) |
#define | ARM_CACHE_L1_DATA_LINE_MASK ( ARM_CACHE_L1_CPU_DATA_ALIGNMENT - 1 ) |
#define | ARM_CACHE_L1_INSTRUCTION_LINE_MASK |
This header file provides interfaces of the ARM CP15 cache controller suppport.
#define ARM_CACHE_L1_INSTRUCTION_LINE_MASK |