This structure defines the GRGPIO register block memory map. More...

Data Fields
uint32_t	data
	See I/O port data register (DATA).

uint32_t	output
	See I/O port output register (OUTPUT).

uint32_t	direction
	See I/O port direction register (DIRECTION).

uint32_t	imask
	See Interrupt mask register (IMASK).

uint32_t	ipol
	See Interrupt polarity register (IPOL).

uint32_t	iedge
	See Interrupt edge register (IEDGE).

uint32_t	bypass
	See Bypass register (BYPASS).

uint32_t	cap
	See Capability register (CAP).

uint32_t	irqmapr [8]
	See Interrupt map register n, where n = 0 .. 3 (IRQMAPR).

uint32_t	iavail
	See Interrupt available register (IAVAIL).

uint32_t	iflag
	See Interrupt flag register (IFLAG).

uint32_t	ipen
	See Interrupt enable register (IPEN).

uint32_t	pulse
	See Pulse register (PULSE).

uint32_t	reserved_50_54

uint32_t	lor_output
	See Logical-OR registers (LOR).

uint32_t	lor_direction
	See Logical-OR registers (LOR).

uint32_t	lor_imask
	See Logical-OR registers (LOR).

uint32_t	reserved_60_64

uint32_t	land_output
	See Logical-AND registers (LAND).

uint32_t	land_direction
	See Logical-AND registers (LAND).

uint32_t	land_imask
	See Logical-AND registers (LAND).

uint32_t	reserved_70_74

uint32_t	lxor_output
	See Logical-XOR registers (LXOR).

uint32_t	lxor_direction
	See Logical-XOR registers (LXOR).

uint32_t	lxor_imask
	See Logical-XOR registers (LXOR).

Detailed Description

This structure defines the GRGPIO register block memory map.

The documentation for this struct was generated from the following file:

Data Fields