RTEMS 6.1-rc1
stm32h7xx_hal_sram.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_SRAM_H
21#define STM32H7xx_HAL_SRAM_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27
28/* Includes ------------------------------------------------------------------*/
29#include "stm32h7xx_ll_fmc.h"
30
38/* Exported typedef ----------------------------------------------------------*/
39
47typedef enum
48{
56
60#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
61typedef struct __SRAM_HandleTypeDef
62#else
63typedef struct
64#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */
65{
66 FMC_NORSRAM_TypeDef *Instance;
68 FMC_NORSRAM_EXTENDED_TypeDef *Extended;
78#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
79 void (* MspInitCallback)(struct __SRAM_HandleTypeDef *hsram);
80 void (* MspDeInitCallback)(struct __SRAM_HandleTypeDef *hsram);
81 void (* DmaXferCpltCallback)(MDMA_HandleTypeDef *hmdma);
82 void (* DmaXferErrorCallback)(MDMA_HandleTypeDef *hmdma);
83#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */
85
86#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
90typedef enum
91{
92 HAL_SRAM_MSP_INIT_CB_ID = 0x00U,
93 HAL_SRAM_MSP_DEINIT_CB_ID = 0x01U,
94 HAL_SRAM_DMA_XFER_CPLT_CB_ID = 0x02U,
95 HAL_SRAM_DMA_XFER_ERR_CB_ID = 0x03U
96} HAL_SRAM_CallbackIDTypeDef;
97
101typedef void (*pSRAM_CallbackTypeDef)(SRAM_HandleTypeDef *hsram);
102typedef void (*pSRAM_DmaCallbackTypeDef)(MDMA_HandleTypeDef *hmdma);
103#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */
108/* Exported constants --------------------------------------------------------*/
109/* Exported macro ------------------------------------------------------------*/
110
120#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
121#define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) do { \
122 (__HANDLE__)->State = HAL_SRAM_STATE_RESET; \
123 (__HANDLE__)->MspInitCallback = NULL; \
124 (__HANDLE__)->MspDeInitCallback = NULL; \
125 } while(0)
126#else
127#define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
128#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */
129
134/* Exported functions --------------------------------------------------------*/
143/* Initialization/de-initialization functions ********************************/
145 FMC_NORSRAM_TimingTypeDef *ExtTiming);
146HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
147void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
148void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
149
158/* I/O operation functions ***************************************************/
159HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer,
160 uint32_t BufferSize);
161HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer,
162 uint32_t BufferSize);
163HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer,
164 uint32_t BufferSize);
165HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer,
166 uint32_t BufferSize);
167HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer,
168 uint32_t BufferSize);
169HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer,
170 uint32_t BufferSize);
171HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer,
172 uint32_t BufferSize);
173HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer,
174 uint32_t BufferSize);
175
176void HAL_SRAM_DMA_XferCpltCallback(MDMA_HandleTypeDef *hmdma);
177void HAL_SRAM_DMA_XferErrorCallback(MDMA_HandleTypeDef *hmdma);
178
179#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
180/* SRAM callback registering/unregistering */
181HAL_StatusTypeDef HAL_SRAM_RegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId,
182 pSRAM_CallbackTypeDef pCallback);
183HAL_StatusTypeDef HAL_SRAM_UnRegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId);
184HAL_StatusTypeDef HAL_SRAM_RegisterDmaCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId,
185 pSRAM_DmaCallbackTypeDef pCallback);
186#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */
187
196/* SRAM Control functions ****************************************************/
197HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
198HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
199
208/* SRAM State functions ******************************************************/
209HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
210
228#ifdef __cplusplus
229}
230#endif
231
232#endif /* STM32H7xx_HAL_SRAM_H */
#define __IO
Definition: core_cm4.h:239
HAL_SRAM_StateTypeDef
HAL SRAM State structures definition.
Definition: stm32h7xx_hal_sram.h:48
@ HAL_SRAM_STATE_PROTECTED
Definition: stm32h7xx_hal_sram.h:53
@ HAL_SRAM_STATE_ERROR
Definition: stm32h7xx_hal_sram.h:52
@ HAL_SRAM_STATE_BUSY
Definition: stm32h7xx_hal_sram.h:51
@ HAL_SRAM_STATE_READY
Definition: stm32h7xx_hal_sram.h:50
@ HAL_SRAM_STATE_RESET
Definition: stm32h7xx_hal_sram.h:49
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58
Header file of FMC HAL module.
FMC NORSRAM Configuration Structure definition.
Definition: stm32h7xx_ll_fmc.h:192
FMC NORSRAM Timing parameters structure definition.
Definition: stm32h7xx_ll_fmc.h:255
SRAM handle Structure definition.
Definition: stm32h7xx_hal_sram.h:65
__IO HAL_SRAM_StateTypeDef State
Definition: stm32h7xx_hal_sram.h:74
FMC_NORSRAM_InitTypeDef Init
Definition: stm32h7xx_hal_sram.h:70
MDMA_HandleTypeDef * hmdma
Definition: stm32h7xx_hal_sram.h:76
HAL_LockTypeDef Lock
Definition: stm32h7xx_hal_sram.h:72
MDMA handle Structure definition.
Definition: stm32h7xx_hal_mdma.h:204