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#define | USBPHY_PWD_RSVD0_MASK (0x3FFU) |
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#define | USBPHY_PWD_RSVD0_SHIFT (0U) |
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#define | USBPHY_PWD_RSVD0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD0_SHIFT)) & USBPHY_PWD_RSVD0_MASK) |
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#define | USBPHY_PWD_TXPWDFS_MASK (0x400U) |
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#define | USBPHY_PWD_TXPWDFS_SHIFT (10U) |
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#define | USBPHY_PWD_TXPWDFS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDFS_SHIFT)) & USBPHY_PWD_TXPWDFS_MASK) |
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#define | USBPHY_PWD_TXPWDIBIAS_MASK (0x800U) |
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#define | USBPHY_PWD_TXPWDIBIAS_SHIFT (11U) |
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#define | USBPHY_PWD_TXPWDIBIAS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TXPWDIBIAS_MASK) |
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#define | USBPHY_PWD_TXPWDV2I_MASK (0x1000U) |
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#define | USBPHY_PWD_TXPWDV2I_SHIFT (12U) |
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#define | USBPHY_PWD_TXPWDV2I(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDV2I_SHIFT)) & USBPHY_PWD_TXPWDV2I_MASK) |
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#define | USBPHY_PWD_RSVD1_MASK (0x1E000U) |
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#define | USBPHY_PWD_RSVD1_SHIFT (13U) |
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#define | USBPHY_PWD_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD1_SHIFT)) & USBPHY_PWD_RSVD1_MASK) |
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#define | USBPHY_PWD_RXPWDENV_MASK (0x20000U) |
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#define | USBPHY_PWD_RXPWDENV_SHIFT (17U) |
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#define | USBPHY_PWD_RXPWDENV(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDENV_SHIFT)) & USBPHY_PWD_RXPWDENV_MASK) |
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#define | USBPHY_PWD_RXPWD1PT1_MASK (0x40000U) |
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#define | USBPHY_PWD_RXPWD1PT1_SHIFT (18U) |
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#define | USBPHY_PWD_RXPWD1PT1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWD1PT1_SHIFT)) & USBPHY_PWD_RXPWD1PT1_MASK) |
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#define | USBPHY_PWD_RXPWDDIFF_MASK (0x80000U) |
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#define | USBPHY_PWD_RXPWDDIFF_SHIFT (19U) |
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#define | USBPHY_PWD_RXPWDDIFF(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDDIFF_SHIFT)) & USBPHY_PWD_RXPWDDIFF_MASK) |
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#define | USBPHY_PWD_RXPWDRX_MASK (0x100000U) |
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#define | USBPHY_PWD_RXPWDRX_SHIFT (20U) |
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#define | USBPHY_PWD_RXPWDRX(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDRX_SHIFT)) & USBPHY_PWD_RXPWDRX_MASK) |
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#define | USBPHY_PWD_RSVD2_MASK (0xFFE00000U) |
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#define | USBPHY_PWD_RSVD2_SHIFT (21U) |
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#define | USBPHY_PWD_RSVD2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD2_SHIFT)) & USBPHY_PWD_RSVD2_MASK) |
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#define | USBPHY_PWD_SET_RSVD0_MASK (0x3FFU) |
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#define | USBPHY_PWD_SET_RSVD0_SHIFT (0U) |
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#define | USBPHY_PWD_SET_RSVD0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD0_SHIFT)) & USBPHY_PWD_SET_RSVD0_MASK) |
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#define | USBPHY_PWD_SET_TXPWDFS_MASK (0x400U) |
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#define | USBPHY_PWD_SET_TXPWDFS_SHIFT (10U) |
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#define | USBPHY_PWD_SET_TXPWDFS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDFS_SHIFT)) & USBPHY_PWD_SET_TXPWDFS_MASK) |
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#define | USBPHY_PWD_SET_TXPWDIBIAS_MASK (0x800U) |
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#define | USBPHY_PWD_SET_TXPWDIBIAS_SHIFT (11U) |
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#define | USBPHY_PWD_SET_TXPWDIBIAS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_SET_TXPWDIBIAS_MASK) |
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#define | USBPHY_PWD_SET_TXPWDV2I_MASK (0x1000U) |
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#define | USBPHY_PWD_SET_TXPWDV2I_SHIFT (12U) |
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#define | USBPHY_PWD_SET_TXPWDV2I(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDV2I_SHIFT)) & USBPHY_PWD_SET_TXPWDV2I_MASK) |
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#define | USBPHY_PWD_SET_RSVD1_MASK (0x1E000U) |
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#define | USBPHY_PWD_SET_RSVD1_SHIFT (13U) |
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#define | USBPHY_PWD_SET_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD1_SHIFT)) & USBPHY_PWD_SET_RSVD1_MASK) |
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#define | USBPHY_PWD_SET_RXPWDENV_MASK (0x20000U) |
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#define | USBPHY_PWD_SET_RXPWDENV_SHIFT (17U) |
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#define | USBPHY_PWD_SET_RXPWDENV(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDENV_SHIFT)) & USBPHY_PWD_SET_RXPWDENV_MASK) |
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#define | USBPHY_PWD_SET_RXPWD1PT1_MASK (0x40000U) |
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#define | USBPHY_PWD_SET_RXPWD1PT1_SHIFT (18U) |
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#define | USBPHY_PWD_SET_RXPWD1PT1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWD1PT1_SHIFT)) & USBPHY_PWD_SET_RXPWD1PT1_MASK) |
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#define | USBPHY_PWD_SET_RXPWDDIFF_MASK (0x80000U) |
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#define | USBPHY_PWD_SET_RXPWDDIFF_SHIFT (19U) |
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#define | USBPHY_PWD_SET_RXPWDDIFF(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDDIFF_SHIFT)) & USBPHY_PWD_SET_RXPWDDIFF_MASK) |
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#define | USBPHY_PWD_SET_RXPWDRX_MASK (0x100000U) |
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#define | USBPHY_PWD_SET_RXPWDRX_SHIFT (20U) |
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#define | USBPHY_PWD_SET_RXPWDRX(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDRX_SHIFT)) & USBPHY_PWD_SET_RXPWDRX_MASK) |
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#define | USBPHY_PWD_SET_RSVD2_MASK (0xFFE00000U) |
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#define | USBPHY_PWD_SET_RSVD2_SHIFT (21U) |
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#define | USBPHY_PWD_SET_RSVD2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD2_SHIFT)) & USBPHY_PWD_SET_RSVD2_MASK) |
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#define | USBPHY_PWD_CLR_RSVD0_MASK (0x3FFU) |
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#define | USBPHY_PWD_CLR_RSVD0_SHIFT (0U) |
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#define | USBPHY_PWD_CLR_RSVD0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK) |
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#define | USBPHY_PWD_CLR_TXPWDFS_MASK (0x400U) |
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#define | USBPHY_PWD_CLR_TXPWDFS_SHIFT (10U) |
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#define | USBPHY_PWD_CLR_TXPWDFS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDFS_SHIFT)) & USBPHY_PWD_CLR_TXPWDFS_MASK) |
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#define | USBPHY_PWD_CLR_TXPWDIBIAS_MASK (0x800U) |
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#define | USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT (11U) |
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#define | USBPHY_PWD_CLR_TXPWDIBIAS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_CLR_TXPWDIBIAS_MASK) |
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#define | USBPHY_PWD_CLR_TXPWDV2I_MASK (0x1000U) |
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#define | USBPHY_PWD_CLR_TXPWDV2I_SHIFT (12U) |
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#define | USBPHY_PWD_CLR_TXPWDV2I(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDV2I_SHIFT)) & USBPHY_PWD_CLR_TXPWDV2I_MASK) |
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#define | USBPHY_PWD_CLR_RSVD1_MASK (0x1E000U) |
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#define | USBPHY_PWD_CLR_RSVD1_SHIFT (13U) |
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#define | USBPHY_PWD_CLR_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD1_SHIFT)) & USBPHY_PWD_CLR_RSVD1_MASK) |
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#define | USBPHY_PWD_CLR_RXPWDENV_MASK (0x20000U) |
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#define | USBPHY_PWD_CLR_RXPWDENV_SHIFT (17U) |
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#define | USBPHY_PWD_CLR_RXPWDENV(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDENV_SHIFT)) & USBPHY_PWD_CLR_RXPWDENV_MASK) |
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#define | USBPHY_PWD_CLR_RXPWD1PT1_MASK (0x40000U) |
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#define | USBPHY_PWD_CLR_RXPWD1PT1_SHIFT (18U) |
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#define | USBPHY_PWD_CLR_RXPWD1PT1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWD1PT1_SHIFT)) & USBPHY_PWD_CLR_RXPWD1PT1_MASK) |
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#define | USBPHY_PWD_CLR_RXPWDDIFF_MASK (0x80000U) |
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#define | USBPHY_PWD_CLR_RXPWDDIFF_SHIFT (19U) |
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#define | USBPHY_PWD_CLR_RXPWDDIFF(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDDIFF_SHIFT)) & USBPHY_PWD_CLR_RXPWDDIFF_MASK) |
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#define | USBPHY_PWD_CLR_RXPWDRX_MASK (0x100000U) |
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#define | USBPHY_PWD_CLR_RXPWDRX_SHIFT (20U) |
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#define | USBPHY_PWD_CLR_RXPWDRX(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDRX_SHIFT)) & USBPHY_PWD_CLR_RXPWDRX_MASK) |
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#define | USBPHY_PWD_CLR_RSVD2_MASK (0xFFE00000U) |
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#define | USBPHY_PWD_CLR_RSVD2_SHIFT (21U) |
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#define | USBPHY_PWD_CLR_RSVD2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD2_SHIFT)) & USBPHY_PWD_CLR_RSVD2_MASK) |
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#define | USBPHY_PWD_TOG_RSVD0_MASK (0x3FFU) |
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#define | USBPHY_PWD_TOG_RSVD0_SHIFT (0U) |
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#define | USBPHY_PWD_TOG_RSVD0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD0_SHIFT)) & USBPHY_PWD_TOG_RSVD0_MASK) |
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#define | USBPHY_PWD_TOG_TXPWDFS_MASK (0x400U) |
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#define | USBPHY_PWD_TOG_TXPWDFS_SHIFT (10U) |
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#define | USBPHY_PWD_TOG_TXPWDFS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDFS_SHIFT)) & USBPHY_PWD_TOG_TXPWDFS_MASK) |
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#define | USBPHY_PWD_TOG_TXPWDIBIAS_MASK (0x800U) |
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#define | USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT (11U) |
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#define | USBPHY_PWD_TOG_TXPWDIBIAS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TOG_TXPWDIBIAS_MASK) |
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#define | USBPHY_PWD_TOG_TXPWDV2I_MASK (0x1000U) |
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#define | USBPHY_PWD_TOG_TXPWDV2I_SHIFT (12U) |
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#define | USBPHY_PWD_TOG_TXPWDV2I(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDV2I_SHIFT)) & USBPHY_PWD_TOG_TXPWDV2I_MASK) |
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#define | USBPHY_PWD_TOG_RSVD1_MASK (0x1E000U) |
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#define | USBPHY_PWD_TOG_RSVD1_SHIFT (13U) |
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#define | USBPHY_PWD_TOG_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD1_SHIFT)) & USBPHY_PWD_TOG_RSVD1_MASK) |
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#define | USBPHY_PWD_TOG_RXPWDENV_MASK (0x20000U) |
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#define | USBPHY_PWD_TOG_RXPWDENV_SHIFT (17U) |
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#define | USBPHY_PWD_TOG_RXPWDENV(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDENV_SHIFT)) & USBPHY_PWD_TOG_RXPWDENV_MASK) |
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#define | USBPHY_PWD_TOG_RXPWD1PT1_MASK (0x40000U) |
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#define | USBPHY_PWD_TOG_RXPWD1PT1_SHIFT (18U) |
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#define | USBPHY_PWD_TOG_RXPWD1PT1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWD1PT1_SHIFT)) & USBPHY_PWD_TOG_RXPWD1PT1_MASK) |
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#define | USBPHY_PWD_TOG_RXPWDDIFF_MASK (0x80000U) |
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#define | USBPHY_PWD_TOG_RXPWDDIFF_SHIFT (19U) |
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#define | USBPHY_PWD_TOG_RXPWDDIFF(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDDIFF_SHIFT)) & USBPHY_PWD_TOG_RXPWDDIFF_MASK) |
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#define | USBPHY_PWD_TOG_RXPWDRX_MASK (0x100000U) |
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#define | USBPHY_PWD_TOG_RXPWDRX_SHIFT (20U) |
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#define | USBPHY_PWD_TOG_RXPWDRX(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDRX_SHIFT)) & USBPHY_PWD_TOG_RXPWDRX_MASK) |
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#define | USBPHY_PWD_TOG_RSVD2_MASK (0xFFE00000U) |
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#define | USBPHY_PWD_TOG_RSVD2_SHIFT (21U) |
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#define | USBPHY_PWD_TOG_RSVD2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD2_SHIFT)) & USBPHY_PWD_TOG_RSVD2_MASK) |
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#define | USBPHY_TX_D_CAL_MASK (0xFU) |
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#define | USBPHY_TX_D_CAL_SHIFT (0U) |
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#define | USBPHY_TX_D_CAL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TX_D_CAL_MASK) |
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#define | USBPHY_TX_RSVD0_MASK (0xF0U) |
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#define | USBPHY_TX_RSVD0_SHIFT (4U) |
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#define | USBPHY_TX_RSVD0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD0_SHIFT)) & USBPHY_TX_RSVD0_MASK) |
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#define | USBPHY_TX_TXCAL45DN_MASK (0xF00U) |
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#define | USBPHY_TX_TXCAL45DN_SHIFT (8U) |
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#define | USBPHY_TX_TXCAL45DN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TXCAL45DN_SHIFT)) & USBPHY_TX_TXCAL45DN_MASK) |
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#define | USBPHY_TX_RSVD1_MASK (0xF000U) |
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#define | USBPHY_TX_RSVD1_SHIFT (12U) |
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#define | USBPHY_TX_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD1_SHIFT)) & USBPHY_TX_RSVD1_MASK) |
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#define | USBPHY_TX_TXCAL45DP_MASK (0xF0000U) |
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#define | USBPHY_TX_TXCAL45DP_SHIFT (16U) |
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#define | USBPHY_TX_TXCAL45DP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TXCAL45DP_SHIFT)) & USBPHY_TX_TXCAL45DP_MASK) |
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#define | USBPHY_TX_RSVD2_MASK (0x3F00000U) |
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#define | USBPHY_TX_RSVD2_SHIFT (20U) |
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#define | USBPHY_TX_RSVD2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD2_SHIFT)) & USBPHY_TX_RSVD2_MASK) |
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#define | USBPHY_TX_USBPHY_TX_EDGECTRL_MASK (0x1C000000U) |
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#define | USBPHY_TX_USBPHY_TX_EDGECTRL_SHIFT (26U) |
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#define | USBPHY_TX_USBPHY_TX_EDGECTRL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_USBPHY_TX_EDGECTRL_MASK) |
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#define | USBPHY_TX_RSVD5_MASK (0xE0000000U) |
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#define | USBPHY_TX_RSVD5_SHIFT (29U) |
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#define | USBPHY_TX_RSVD5(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD5_SHIFT)) & USBPHY_TX_RSVD5_MASK) |
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#define | USBPHY_TX_SET_D_CAL_MASK (0xFU) |
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#define | USBPHY_TX_SET_D_CAL_SHIFT (0U) |
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#define | USBPHY_TX_SET_D_CAL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_D_CAL_SHIFT)) & USBPHY_TX_SET_D_CAL_MASK) |
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#define | USBPHY_TX_SET_RSVD0_MASK (0xF0U) |
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#define | USBPHY_TX_SET_RSVD0_SHIFT (4U) |
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#define | USBPHY_TX_SET_RSVD0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD0_SHIFT)) & USBPHY_TX_SET_RSVD0_MASK) |
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#define | USBPHY_TX_SET_TXCAL45DN_MASK (0xF00U) |
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#define | USBPHY_TX_SET_TXCAL45DN_SHIFT (8U) |
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#define | USBPHY_TX_SET_TXCAL45DN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_TXCAL45DN_SHIFT)) & USBPHY_TX_SET_TXCAL45DN_MASK) |
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#define | USBPHY_TX_SET_RSVD1_MASK (0xF000U) |
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#define | USBPHY_TX_SET_RSVD1_SHIFT (12U) |
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#define | USBPHY_TX_SET_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD1_SHIFT)) & USBPHY_TX_SET_RSVD1_MASK) |
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#define | USBPHY_TX_SET_TXCAL45DP_MASK (0xF0000U) |
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#define | USBPHY_TX_SET_TXCAL45DP_SHIFT (16U) |
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#define | USBPHY_TX_SET_TXCAL45DP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_TXCAL45DP_SHIFT)) & USBPHY_TX_SET_TXCAL45DP_MASK) |
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#define | USBPHY_TX_SET_RSVD2_MASK (0x3F00000U) |
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#define | USBPHY_TX_SET_RSVD2_SHIFT (20U) |
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#define | USBPHY_TX_SET_RSVD2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD2_SHIFT)) & USBPHY_TX_SET_RSVD2_MASK) |
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#define | USBPHY_TX_SET_USBPHY_TX_EDGECTRL_MASK (0x1C000000U) |
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#define | USBPHY_TX_SET_USBPHY_TX_EDGECTRL_SHIFT (26U) |
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#define | USBPHY_TX_SET_USBPHY_TX_EDGECTRL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_SET_USBPHY_TX_EDGECTRL_MASK) |
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#define | USBPHY_TX_SET_RSVD5_MASK (0xE0000000U) |
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#define | USBPHY_TX_SET_RSVD5_SHIFT (29U) |
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#define | USBPHY_TX_SET_RSVD5(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD5_SHIFT)) & USBPHY_TX_SET_RSVD5_MASK) |
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#define | USBPHY_TX_CLR_D_CAL_MASK (0xFU) |
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#define | USBPHY_TX_CLR_D_CAL_SHIFT (0U) |
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#define | USBPHY_TX_CLR_D_CAL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_D_CAL_SHIFT)) & USBPHY_TX_CLR_D_CAL_MASK) |
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#define | USBPHY_TX_CLR_RSVD0_MASK (0xF0U) |
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#define | USBPHY_TX_CLR_RSVD0_SHIFT (4U) |
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#define | USBPHY_TX_CLR_RSVD0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD0_SHIFT)) & USBPHY_TX_CLR_RSVD0_MASK) |
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#define | USBPHY_TX_CLR_TXCAL45DN_MASK (0xF00U) |
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#define | USBPHY_TX_CLR_TXCAL45DN_SHIFT (8U) |
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#define | USBPHY_TX_CLR_TXCAL45DN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_TXCAL45DN_SHIFT)) & USBPHY_TX_CLR_TXCAL45DN_MASK) |
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#define | USBPHY_TX_CLR_RSVD1_MASK (0xF000U) |
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#define | USBPHY_TX_CLR_RSVD1_SHIFT (12U) |
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#define | USBPHY_TX_CLR_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD1_SHIFT)) & USBPHY_TX_CLR_RSVD1_MASK) |
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#define | USBPHY_TX_CLR_TXCAL45DP_MASK (0xF0000U) |
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#define | USBPHY_TX_CLR_TXCAL45DP_SHIFT (16U) |
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#define | USBPHY_TX_CLR_TXCAL45DP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_TXCAL45DP_SHIFT)) & USBPHY_TX_CLR_TXCAL45DP_MASK) |
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#define | USBPHY_TX_CLR_RSVD2_MASK (0x3F00000U) |
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#define | USBPHY_TX_CLR_RSVD2_SHIFT (20U) |
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#define | USBPHY_TX_CLR_RSVD2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD2_SHIFT)) & USBPHY_TX_CLR_RSVD2_MASK) |
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#define | USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_MASK (0x1C000000U) |
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#define | USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_SHIFT (26U) |
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#define | USBPHY_TX_CLR_USBPHY_TX_EDGECTRL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_MASK) |
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#define | USBPHY_TX_CLR_RSVD5_MASK (0xE0000000U) |
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#define | USBPHY_TX_CLR_RSVD5_SHIFT (29U) |
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#define | USBPHY_TX_CLR_RSVD5(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD5_SHIFT)) & USBPHY_TX_CLR_RSVD5_MASK) |
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#define | USBPHY_TX_TOG_D_CAL_MASK (0xFU) |
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#define | USBPHY_TX_TOG_D_CAL_SHIFT (0U) |
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#define | USBPHY_TX_TOG_D_CAL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_D_CAL_SHIFT)) & USBPHY_TX_TOG_D_CAL_MASK) |
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#define | USBPHY_TX_TOG_RSVD0_MASK (0xF0U) |
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#define | USBPHY_TX_TOG_RSVD0_SHIFT (4U) |
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#define | USBPHY_TX_TOG_RSVD0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD0_SHIFT)) & USBPHY_TX_TOG_RSVD0_MASK) |
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#define | USBPHY_TX_TOG_TXCAL45DN_MASK (0xF00U) |
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#define | USBPHY_TX_TOG_TXCAL45DN_SHIFT (8U) |
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#define | USBPHY_TX_TOG_TXCAL45DN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_TXCAL45DN_SHIFT)) & USBPHY_TX_TOG_TXCAL45DN_MASK) |
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#define | USBPHY_TX_TOG_RSVD1_MASK (0xF000U) |
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#define | USBPHY_TX_TOG_RSVD1_SHIFT (12U) |
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#define | USBPHY_TX_TOG_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD1_SHIFT)) & USBPHY_TX_TOG_RSVD1_MASK) |
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#define | USBPHY_TX_TOG_TXCAL45DP_MASK (0xF0000U) |
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#define | USBPHY_TX_TOG_TXCAL45DP_SHIFT (16U) |
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#define | USBPHY_TX_TOG_TXCAL45DP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_TXCAL45DP_SHIFT)) & USBPHY_TX_TOG_TXCAL45DP_MASK) |
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#define | USBPHY_TX_TOG_RSVD2_MASK (0x3F00000U) |
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#define | USBPHY_TX_TOG_RSVD2_SHIFT (20U) |
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#define | USBPHY_TX_TOG_RSVD2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD2_SHIFT)) & USBPHY_TX_TOG_RSVD2_MASK) |
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#define | USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_MASK (0x1C000000U) |
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#define | USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_SHIFT (26U) |
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#define | USBPHY_TX_TOG_USBPHY_TX_EDGECTRL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_MASK) |
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#define | USBPHY_TX_TOG_RSVD5_MASK (0xE0000000U) |
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#define | USBPHY_TX_TOG_RSVD5_SHIFT (29U) |
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#define | USBPHY_TX_TOG_RSVD5(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD5_SHIFT)) & USBPHY_TX_TOG_RSVD5_MASK) |
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#define | USBPHY_CTRL_ENOTG_ID_CHG_IRQ_MASK (0x1U) |
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#define | USBPHY_CTRL_ENOTG_ID_CHG_IRQ_SHIFT (0U) |
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#define | USBPHY_CTRL_ENOTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_ENOTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_ENHOSTDISCONDETECT_MASK (0x2U) |
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#define | USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT (1U) |
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#define | USBPHY_CTRL_ENHOSTDISCONDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_ENHOSTDISCONDETECT_MASK) |
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#define | USBPHY_CTRL_ENIRQHOSTDISCON_MASK (0x4U) |
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#define | USBPHY_CTRL_ENIRQHOSTDISCON_SHIFT (2U) |
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#define | USBPHY_CTRL_ENIRQHOSTDISCON(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_ENIRQHOSTDISCON_MASK) |
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#define | USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK (0x8U) |
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#define | USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT (3U) |
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#define | USBPHY_CTRL_HOSTDISCONDETECT_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK) |
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#define | USBPHY_CTRL_ENDEVPLUGINDETECT_MASK (0x10U) |
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#define | USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT (4U) |
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#define | USBPHY_CTRL_ENDEVPLUGINDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_ENDEVPLUGINDETECT_MASK) |
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#define | USBPHY_CTRL_DEVPLUGIN_POLARITY_MASK (0x20U) |
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#define | USBPHY_CTRL_DEVPLUGIN_POLARITY_SHIFT (5U) |
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#define | USBPHY_CTRL_DEVPLUGIN_POLARITY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_POLARITY_MASK) |
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#define | USBPHY_CTRL_OTG_ID_CHG_IRQ_MASK (0x40U) |
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#define | USBPHY_CTRL_OTG_ID_CHG_IRQ_SHIFT (6U) |
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#define | USBPHY_CTRL_OTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_OTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_ENOTGIDDETECT_MASK (0x80U) |
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#define | USBPHY_CTRL_ENOTGIDDETECT_SHIFT (7U) |
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#define | USBPHY_CTRL_ENOTGIDDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_ENOTGIDDETECT_MASK) |
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#define | USBPHY_CTRL_RESUMEIRQSTICKY_MASK (0x100U) |
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#define | USBPHY_CTRL_RESUMEIRQSTICKY_SHIFT (8U) |
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#define | USBPHY_CTRL_RESUMEIRQSTICKY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_RESUMEIRQSTICKY_MASK) |
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#define | USBPHY_CTRL_ENIRQRESUMEDETECT_MASK (0x200U) |
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#define | USBPHY_CTRL_ENIRQRESUMEDETECT_SHIFT (9U) |
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#define | USBPHY_CTRL_ENIRQRESUMEDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_ENIRQRESUMEDETECT_MASK) |
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#define | USBPHY_CTRL_RESUME_IRQ_MASK (0x400U) |
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#define | USBPHY_CTRL_RESUME_IRQ_SHIFT (10U) |
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#define | USBPHY_CTRL_RESUME_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_RESUME_IRQ_MASK) |
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#define | USBPHY_CTRL_ENIRQDEVPLUGIN_MASK (0x800U) |
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#define | USBPHY_CTRL_ENIRQDEVPLUGIN_SHIFT (11U) |
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#define | USBPHY_CTRL_ENIRQDEVPLUGIN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_ENIRQDEVPLUGIN_MASK) |
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#define | USBPHY_CTRL_DEVPLUGIN_IRQ_MASK (0x1000U) |
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#define | USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT (12U) |
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#define | USBPHY_CTRL_DEVPLUGIN_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_IRQ_MASK) |
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#define | USBPHY_CTRL_DATA_ON_LRADC_MASK (0x2000U) |
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#define | USBPHY_CTRL_DATA_ON_LRADC_SHIFT (13U) |
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#define | USBPHY_CTRL_DATA_ON_LRADC(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_DATA_ON_LRADC_MASK) |
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#define | USBPHY_CTRL_ENUTMILEVEL2_MASK (0x4000U) |
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#define | USBPHY_CTRL_ENUTMILEVEL2_SHIFT (14U) |
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#define | USBPHY_CTRL_ENUTMILEVEL2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL2_MASK) |
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#define | USBPHY_CTRL_ENUTMILEVEL3_MASK (0x8000U) |
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#define | USBPHY_CTRL_ENUTMILEVEL3_SHIFT (15U) |
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#define | USBPHY_CTRL_ENUTMILEVEL3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL3_MASK) |
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#define | USBPHY_CTRL_ENIRQWAKEUP_MASK (0x10000U) |
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#define | USBPHY_CTRL_ENIRQWAKEUP_SHIFT (16U) |
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#define | USBPHY_CTRL_ENIRQWAKEUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_ENIRQWAKEUP_MASK) |
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#define | USBPHY_CTRL_WAKEUP_IRQ_MASK (0x20000U) |
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#define | USBPHY_CTRL_WAKEUP_IRQ_SHIFT (17U) |
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#define | USBPHY_CTRL_WAKEUP_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_WAKEUP_IRQ_MASK) |
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#define | USBPHY_CTRL_ENAUTO_PWRON_PLL_MASK (0x40000U) |
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#define | USBPHY_CTRL_ENAUTO_PWRON_PLL_SHIFT (18U) |
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#define | USBPHY_CTRL_ENAUTO_PWRON_PLL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_ENAUTO_PWRON_PLL_MASK) |
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#define | USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK (0x80000U) |
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#define | USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT (19U) |
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#define | USBPHY_CTRL_ENAUTOCLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK (0x100000U) |
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#define | USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT (20U) |
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#define | USBPHY_CTRL_ENAUTOCLR_PHY_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK) |
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#define | USBPHY_CTRL_ENDPDMCHG_WKUP_MASK (0x200000U) |
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#define | USBPHY_CTRL_ENDPDMCHG_WKUP_SHIFT (21U) |
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#define | USBPHY_CTRL_ENDPDMCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENDPDMCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_ENIDCHG_WKUP_MASK (0x400000U) |
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#define | USBPHY_CTRL_ENIDCHG_WKUP_SHIFT (22U) |
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#define | USBPHY_CTRL_ENIDCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENIDCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_ENVBUSCHG_WKUP_MASK (0x800000U) |
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#define | USBPHY_CTRL_ENVBUSCHG_WKUP_SHIFT (23U) |
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#define | USBPHY_CTRL_ENVBUSCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENVBUSCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_FSDLL_RST_EN_MASK (0x1000000U) |
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#define | USBPHY_CTRL_FSDLL_RST_EN_SHIFT (24U) |
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#define | USBPHY_CTRL_FSDLL_RST_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_FSDLL_RST_EN_MASK) |
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#define | USBPHY_CTRL_RSVD1_MASK (0x6000000U) |
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#define | USBPHY_CTRL_RSVD1_SHIFT (25U) |
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#define | USBPHY_CTRL_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RSVD1_SHIFT)) & USBPHY_CTRL_RSVD1_MASK) |
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#define | USBPHY_CTRL_OTG_ID_VALUE_MASK (0x8000000U) |
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#define | USBPHY_CTRL_OTG_ID_VALUE_SHIFT (27U) |
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#define | USBPHY_CTRL_OTG_ID_VALUE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_OTG_ID_VALUE_MASK) |
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#define | USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK (0x10000000U) |
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#define | USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT (28U) |
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#define | USBPHY_CTRL_HOST_FORCE_LS_SE0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK) |
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#define | USBPHY_CTRL_UTMI_SUSPENDM_MASK (0x20000000U) |
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#define | USBPHY_CTRL_UTMI_SUSPENDM_SHIFT (29U) |
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#define | USBPHY_CTRL_UTMI_SUSPENDM(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_UTMI_SUSPENDM_MASK) |
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#define | USBPHY_CTRL_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_CTRL_CLKGATE_SHIFT (30U) |
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#define | USBPHY_CTRL_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLKGATE_SHIFT)) & USBPHY_CTRL_CLKGATE_MASK) |
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#define | USBPHY_CTRL_SFTRST_MASK (0x80000000U) |
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#define | USBPHY_CTRL_SFTRST_SHIFT (31U) |
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#define | USBPHY_CTRL_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SFTRST_SHIFT)) & USBPHY_CTRL_SFTRST_MASK) |
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#define | USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_MASK (0x1U) |
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#define | USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_SHIFT (0U) |
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#define | USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK (0x2U) |
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#define | USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT (1U) |
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#define | USBPHY_CTRL_SET_ENHOSTDISCONDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK) |
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#define | USBPHY_CTRL_SET_ENIRQHOSTDISCON_MASK (0x4U) |
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#define | USBPHY_CTRL_SET_ENIRQHOSTDISCON_SHIFT (2U) |
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#define | USBPHY_CTRL_SET_ENIRQHOSTDISCON(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_SET_ENIRQHOSTDISCON_MASK) |
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#define | USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK (0x8U) |
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#define | USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT (3U) |
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#define | USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENDEVPLUGINDETECT_MASK (0x10U) |
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#define | USBPHY_CTRL_SET_ENDEVPLUGINDETECT_SHIFT (4U) |
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#define | USBPHY_CTRL_SET_ENDEVPLUGINDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_SET_ENDEVPLUGINDETECT_MASK) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_MASK (0x20U) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_SHIFT (5U) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_POLARITY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_MASK) |
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#define | USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_MASK (0x40U) |
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#define | USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_SHIFT (6U) |
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#define | USBPHY_CTRL_SET_OTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENOTGIDDETECT_MASK (0x80U) |
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#define | USBPHY_CTRL_SET_ENOTGIDDETECT_SHIFT (7U) |
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#define | USBPHY_CTRL_SET_ENOTGIDDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_SET_ENOTGIDDETECT_MASK) |
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#define | USBPHY_CTRL_SET_RESUMEIRQSTICKY_MASK (0x100U) |
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#define | USBPHY_CTRL_SET_RESUMEIRQSTICKY_SHIFT (8U) |
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#define | USBPHY_CTRL_SET_RESUMEIRQSTICKY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_SET_RESUMEIRQSTICKY_MASK) |
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#define | USBPHY_CTRL_SET_ENIRQRESUMEDETECT_MASK (0x200U) |
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#define | USBPHY_CTRL_SET_ENIRQRESUMEDETECT_SHIFT (9U) |
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#define | USBPHY_CTRL_SET_ENIRQRESUMEDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_SET_ENIRQRESUMEDETECT_MASK) |
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#define | USBPHY_CTRL_SET_RESUME_IRQ_MASK (0x400U) |
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#define | USBPHY_CTRL_SET_RESUME_IRQ_SHIFT (10U) |
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#define | USBPHY_CTRL_SET_RESUME_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_SET_RESUME_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENIRQDEVPLUGIN_MASK (0x800U) |
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#define | USBPHY_CTRL_SET_ENIRQDEVPLUGIN_SHIFT (11U) |
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#define | USBPHY_CTRL_SET_ENIRQDEVPLUGIN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_SET_ENIRQDEVPLUGIN_MASK) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK (0x1000U) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT (12U) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_DATA_ON_LRADC_MASK (0x2000U) |
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#define | USBPHY_CTRL_SET_DATA_ON_LRADC_SHIFT (13U) |
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#define | USBPHY_CTRL_SET_DATA_ON_LRADC(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_SET_DATA_ON_LRADC_MASK) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL2_MASK (0x4000U) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT (14U) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL2_MASK) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK (0x8000U) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT (15U) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL3_MASK) |
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#define | USBPHY_CTRL_SET_ENIRQWAKEUP_MASK (0x10000U) |
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#define | USBPHY_CTRL_SET_ENIRQWAKEUP_SHIFT (16U) |
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#define | USBPHY_CTRL_SET_ENIRQWAKEUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_SET_ENIRQWAKEUP_MASK) |
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#define | USBPHY_CTRL_SET_WAKEUP_IRQ_MASK (0x20000U) |
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#define | USBPHY_CTRL_SET_WAKEUP_IRQ_SHIFT (17U) |
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#define | USBPHY_CTRL_SET_WAKEUP_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_SET_WAKEUP_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_MASK (0x40000U) |
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#define | USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_SHIFT (18U) |
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#define | USBPHY_CTRL_SET_ENAUTO_PWRON_PLL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_MASK) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK (0x80000U) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT (19U) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK (0x100000U) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT (20U) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK) |
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#define | USBPHY_CTRL_SET_ENDPDMCHG_WKUP_MASK (0x200000U) |
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#define | USBPHY_CTRL_SET_ENDPDMCHG_WKUP_SHIFT (21U) |
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#define | USBPHY_CTRL_SET_ENDPDMCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENDPDMCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_SET_ENIDCHG_WKUP_MASK (0x400000U) |
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#define | USBPHY_CTRL_SET_ENIDCHG_WKUP_SHIFT (22U) |
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#define | USBPHY_CTRL_SET_ENIDCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENIDCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_SET_ENVBUSCHG_WKUP_MASK (0x800000U) |
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#define | USBPHY_CTRL_SET_ENVBUSCHG_WKUP_SHIFT (23U) |
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#define | USBPHY_CTRL_SET_ENVBUSCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENVBUSCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_SET_FSDLL_RST_EN_MASK (0x1000000U) |
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#define | USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT (24U) |
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#define | USBPHY_CTRL_SET_FSDLL_RST_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_SET_FSDLL_RST_EN_MASK) |
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#define | USBPHY_CTRL_SET_RSVD1_MASK (0x6000000U) |
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#define | USBPHY_CTRL_SET_RSVD1_SHIFT (25U) |
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#define | USBPHY_CTRL_SET_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RSVD1_SHIFT)) & USBPHY_CTRL_SET_RSVD1_MASK) |
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#define | USBPHY_CTRL_SET_OTG_ID_VALUE_MASK (0x8000000U) |
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#define | USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT (27U) |
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#define | USBPHY_CTRL_SET_OTG_ID_VALUE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_VALUE_MASK) |
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#define | USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK (0x10000000U) |
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#define | USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT (28U) |
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#define | USBPHY_CTRL_SET_HOST_FORCE_LS_SE0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK) |
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#define | USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK (0x20000000U) |
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#define | USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT (29U) |
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#define | USBPHY_CTRL_SET_UTMI_SUSPENDM(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK) |
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#define | USBPHY_CTRL_SET_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_CTRL_SET_CLKGATE_SHIFT (30U) |
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#define | USBPHY_CTRL_SET_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_CLKGATE_MASK) |
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#define | USBPHY_CTRL_SET_SFTRST_MASK (0x80000000U) |
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#define | USBPHY_CTRL_SET_SFTRST_SHIFT (31U) |
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#define | USBPHY_CTRL_SET_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_SFTRST_SHIFT)) & USBPHY_CTRL_SET_SFTRST_MASK) |
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#define | USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_MASK (0x1U) |
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#define | USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_SHIFT (0U) |
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#define | USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK (0x2U) |
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#define | USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT (1U) |
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#define | USBPHY_CTRL_CLR_ENHOSTDISCONDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK) |
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#define | USBPHY_CTRL_CLR_ENIRQHOSTDISCON_MASK (0x4U) |
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#define | USBPHY_CTRL_CLR_ENIRQHOSTDISCON_SHIFT (2U) |
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#define | USBPHY_CTRL_CLR_ENIRQHOSTDISCON(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_CLR_ENIRQHOSTDISCON_MASK) |
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#define | USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK (0x8U) |
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#define | USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT (3U) |
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#define | USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_MASK (0x10U) |
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#define | USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_SHIFT (4U) |
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#define | USBPHY_CTRL_CLR_ENDEVPLUGINDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_MASK) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_MASK (0x20U) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_SHIFT (5U) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_MASK) |
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#define | USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_MASK (0x40U) |
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#define | USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_SHIFT (6U) |
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#define | USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENOTGIDDETECT_MASK (0x80U) |
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#define | USBPHY_CTRL_CLR_ENOTGIDDETECT_SHIFT (7U) |
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#define | USBPHY_CTRL_CLR_ENOTGIDDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENOTGIDDETECT_MASK) |
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#define | USBPHY_CTRL_CLR_RESUMEIRQSTICKY_MASK (0x100U) |
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#define | USBPHY_CTRL_CLR_RESUMEIRQSTICKY_SHIFT (8U) |
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#define | USBPHY_CTRL_CLR_RESUMEIRQSTICKY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_CLR_RESUMEIRQSTICKY_MASK) |
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#define | USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_MASK (0x200U) |
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#define | USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_SHIFT (9U) |
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#define | USBPHY_CTRL_CLR_ENIRQRESUMEDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_MASK) |
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#define | USBPHY_CTRL_CLR_RESUME_IRQ_MASK (0x400U) |
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#define | USBPHY_CTRL_CLR_RESUME_IRQ_SHIFT (10U) |
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#define | USBPHY_CTRL_CLR_RESUME_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_CLR_RESUME_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_MASK (0x800U) |
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#define | USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_SHIFT (11U) |
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#define | USBPHY_CTRL_CLR_ENIRQDEVPLUGIN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_MASK) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK (0x1000U) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT (12U) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_DATA_ON_LRADC_MASK (0x2000U) |
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#define | USBPHY_CTRL_CLR_DATA_ON_LRADC_SHIFT (13U) |
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#define | USBPHY_CTRL_CLR_DATA_ON_LRADC(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_CLR_DATA_ON_LRADC_MASK) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK (0x4000U) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT (14U) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK (0x8000U) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT (15U) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK) |
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#define | USBPHY_CTRL_CLR_ENIRQWAKEUP_MASK (0x10000U) |
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#define | USBPHY_CTRL_CLR_ENIRQWAKEUP_SHIFT (16U) |
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#define | USBPHY_CTRL_CLR_ENIRQWAKEUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_CLR_ENIRQWAKEUP_MASK) |
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#define | USBPHY_CTRL_CLR_WAKEUP_IRQ_MASK (0x20000U) |
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#define | USBPHY_CTRL_CLR_WAKEUP_IRQ_SHIFT (17U) |
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#define | USBPHY_CTRL_CLR_WAKEUP_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_CLR_WAKEUP_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_MASK (0x40000U) |
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#define | USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_SHIFT (18U) |
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#define | USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_MASK) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK (0x80000U) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT (19U) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK (0x100000U) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT (20U) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK) |
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#define | USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_MASK (0x200000U) |
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#define | USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_SHIFT (21U) |
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#define | USBPHY_CTRL_CLR_ENDPDMCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_CLR_ENIDCHG_WKUP_MASK (0x400000U) |
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#define | USBPHY_CTRL_CLR_ENIDCHG_WKUP_SHIFT (22U) |
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#define | USBPHY_CTRL_CLR_ENIDCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENIDCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_MASK (0x800000U) |
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#define | USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_SHIFT (23U) |
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#define | USBPHY_CTRL_CLR_ENVBUSCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK (0x1000000U) |
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#define | USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT (24U) |
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#define | USBPHY_CTRL_CLR_FSDLL_RST_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK) |
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#define | USBPHY_CTRL_CLR_RSVD1_MASK (0x6000000U) |
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#define | USBPHY_CTRL_CLR_RSVD1_SHIFT (25U) |
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#define | USBPHY_CTRL_CLR_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RSVD1_SHIFT)) & USBPHY_CTRL_CLR_RSVD1_MASK) |
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#define | USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK (0x8000000U) |
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#define | USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT (27U) |
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#define | USBPHY_CTRL_CLR_OTG_ID_VALUE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK) |
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#define | USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK (0x10000000U) |
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#define | USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT (28U) |
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#define | USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK) |
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#define | USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK (0x20000000U) |
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#define | USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT (29U) |
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#define | USBPHY_CTRL_CLR_UTMI_SUSPENDM(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK) |
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#define | USBPHY_CTRL_CLR_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_CTRL_CLR_CLKGATE_SHIFT (30U) |
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#define | USBPHY_CTRL_CLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_CLR_SFTRST_MASK (0x80000000U) |
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#define | USBPHY_CTRL_CLR_SFTRST_SHIFT (31U) |
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#define | USBPHY_CTRL_CLR_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_SFTRST_SHIFT)) & USBPHY_CTRL_CLR_SFTRST_MASK) |
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#define | USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_MASK (0x1U) |
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#define | USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_SHIFT (0U) |
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#define | USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK (0x2U) |
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#define | USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT (1U) |
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#define | USBPHY_CTRL_TOG_ENHOSTDISCONDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK) |
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#define | USBPHY_CTRL_TOG_ENIRQHOSTDISCON_MASK (0x4U) |
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#define | USBPHY_CTRL_TOG_ENIRQHOSTDISCON_SHIFT (2U) |
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#define | USBPHY_CTRL_TOG_ENIRQHOSTDISCON(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_TOG_ENIRQHOSTDISCON_MASK) |
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#define | USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK (0x8U) |
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#define | USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT (3U) |
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#define | USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_MASK (0x10U) |
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#define | USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_SHIFT (4U) |
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#define | USBPHY_CTRL_TOG_ENDEVPLUGINDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_MASK) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_MASK (0x20U) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_SHIFT (5U) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_MASK) |
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#define | USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_MASK (0x40U) |
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#define | USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_SHIFT (6U) |
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#define | USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENOTGIDDETECT_MASK (0x80U) |
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#define | USBPHY_CTRL_TOG_ENOTGIDDETECT_SHIFT (7U) |
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#define | USBPHY_CTRL_TOG_ENOTGIDDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENOTGIDDETECT_MASK) |
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#define | USBPHY_CTRL_TOG_RESUMEIRQSTICKY_MASK (0x100U) |
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#define | USBPHY_CTRL_TOG_RESUMEIRQSTICKY_SHIFT (8U) |
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#define | USBPHY_CTRL_TOG_RESUMEIRQSTICKY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_TOG_RESUMEIRQSTICKY_MASK) |
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#define | USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_MASK (0x200U) |
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#define | USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_SHIFT (9U) |
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#define | USBPHY_CTRL_TOG_ENIRQRESUMEDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_MASK) |
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#define | USBPHY_CTRL_TOG_RESUME_IRQ_MASK (0x400U) |
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#define | USBPHY_CTRL_TOG_RESUME_IRQ_SHIFT (10U) |
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#define | USBPHY_CTRL_TOG_RESUME_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_TOG_RESUME_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_MASK (0x800U) |
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#define | USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_SHIFT (11U) |
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#define | USBPHY_CTRL_TOG_ENIRQDEVPLUGIN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_MASK) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK (0x1000U) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT (12U) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_DATA_ON_LRADC_MASK (0x2000U) |
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#define | USBPHY_CTRL_TOG_DATA_ON_LRADC_SHIFT (13U) |
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#define | USBPHY_CTRL_TOG_DATA_ON_LRADC(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_TOG_DATA_ON_LRADC_MASK) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK (0x4000U) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT (14U) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK (0x8000U) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT (15U) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK) |
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#define | USBPHY_CTRL_TOG_ENIRQWAKEUP_MASK (0x10000U) |
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#define | USBPHY_CTRL_TOG_ENIRQWAKEUP_SHIFT (16U) |
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#define | USBPHY_CTRL_TOG_ENIRQWAKEUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_TOG_ENIRQWAKEUP_MASK) |
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#define | USBPHY_CTRL_TOG_WAKEUP_IRQ_MASK (0x20000U) |
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#define | USBPHY_CTRL_TOG_WAKEUP_IRQ_SHIFT (17U) |
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#define | USBPHY_CTRL_TOG_WAKEUP_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_TOG_WAKEUP_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_MASK (0x40000U) |
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#define | USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_SHIFT (18U) |
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#define | USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_MASK) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK (0x80000U) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT (19U) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK (0x100000U) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT (20U) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK) |
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#define | USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_MASK (0x200000U) |
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#define | USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_SHIFT (21U) |
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#define | USBPHY_CTRL_TOG_ENDPDMCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_TOG_ENIDCHG_WKUP_MASK (0x400000U) |
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#define | USBPHY_CTRL_TOG_ENIDCHG_WKUP_SHIFT (22U) |
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#define | USBPHY_CTRL_TOG_ENIDCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENIDCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_MASK (0x800000U) |
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#define | USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_SHIFT (23U) |
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#define | USBPHY_CTRL_TOG_ENVBUSCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK (0x1000000U) |
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#define | USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT (24U) |
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#define | USBPHY_CTRL_TOG_FSDLL_RST_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK) |
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#define | USBPHY_CTRL_TOG_RSVD1_MASK (0x6000000U) |
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#define | USBPHY_CTRL_TOG_RSVD1_SHIFT (25U) |
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#define | USBPHY_CTRL_TOG_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RSVD1_SHIFT)) & USBPHY_CTRL_TOG_RSVD1_MASK) |
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#define | USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK (0x8000000U) |
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#define | USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT (27U) |
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#define | USBPHY_CTRL_TOG_OTG_ID_VALUE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK) |
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#define | USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK (0x10000000U) |
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#define | USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT (28U) |
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#define | USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK) |
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#define | USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK (0x20000000U) |
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#define | USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT (29U) |
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#define | USBPHY_CTRL_TOG_UTMI_SUSPENDM(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK) |
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#define | USBPHY_CTRL_TOG_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_CTRL_TOG_CLKGATE_SHIFT (30U) |
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#define | USBPHY_CTRL_TOG_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_CLKGATE_MASK) |
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#define | USBPHY_CTRL_TOG_SFTRST_MASK (0x80000000U) |
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#define | USBPHY_CTRL_TOG_SFTRST_SHIFT (31U) |
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#define | USBPHY_CTRL_TOG_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_SFTRST_SHIFT)) & USBPHY_CTRL_TOG_SFTRST_MASK) |
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#define | USBPHY_STATUS_RSVD0_MASK (0x7U) |
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#define | USBPHY_STATUS_RSVD0_SHIFT (0U) |
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#define | USBPHY_STATUS_RSVD0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD0_SHIFT)) & USBPHY_STATUS_RSVD0_MASK) |
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#define | USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK (0x8U) |
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#define | USBPHY_STATUS_HOSTDISCONDETECT_STATUS_SHIFT (3U) |
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#define | USBPHY_STATUS_HOSTDISCONDETECT_STATUS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_HOSTDISCONDETECT_STATUS_SHIFT)) & USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK) |
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#define | USBPHY_STATUS_RSVD1_MASK (0x30U) |
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#define | USBPHY_STATUS_RSVD1_SHIFT (4U) |
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#define | USBPHY_STATUS_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD1_SHIFT)) & USBPHY_STATUS_RSVD1_MASK) |
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#define | USBPHY_STATUS_DEVPLUGIN_STATUS_MASK (0x40U) |
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#define | USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT (6U) |
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#define | USBPHY_STATUS_DEVPLUGIN_STATUS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT)) & USBPHY_STATUS_DEVPLUGIN_STATUS_MASK) |
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#define | USBPHY_STATUS_RSVD2_MASK (0x80U) |
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#define | USBPHY_STATUS_RSVD2_SHIFT (7U) |
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#define | USBPHY_STATUS_RSVD2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD2_SHIFT)) & USBPHY_STATUS_RSVD2_MASK) |
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#define | USBPHY_STATUS_OTGID_STATUS_MASK (0x100U) |
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#define | USBPHY_STATUS_OTGID_STATUS_SHIFT (8U) |
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#define | USBPHY_STATUS_OTGID_STATUS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_OTGID_STATUS_SHIFT)) & USBPHY_STATUS_OTGID_STATUS_MASK) |
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#define | USBPHY_STATUS_RSVD3_MASK (0x200U) |
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#define | USBPHY_STATUS_RSVD3_SHIFT (9U) |
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#define | USBPHY_STATUS_RSVD3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD3_SHIFT)) & USBPHY_STATUS_RSVD3_MASK) |
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#define | USBPHY_STATUS_RESUME_STATUS_MASK (0x400U) |
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#define | USBPHY_STATUS_RESUME_STATUS_SHIFT (10U) |
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#define | USBPHY_STATUS_RESUME_STATUS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RESUME_STATUS_SHIFT)) & USBPHY_STATUS_RESUME_STATUS_MASK) |
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#define | USBPHY_STATUS_RSVD4_MASK (0xFFFFF800U) |
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#define | USBPHY_STATUS_RSVD4_SHIFT (11U) |
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#define | USBPHY_STATUS_RSVD4(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD4_SHIFT)) & USBPHY_STATUS_RSVD4_MASK) |
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#define | USBPHY_DEBUG_OTGIDPIOLOCK_MASK (0x1U) |
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#define | USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT (0U) |
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#define | USBPHY_DEBUG_OTGIDPIOLOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_OTGIDPIOLOCK_MASK) |
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#define | USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK (0x2U) |
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#define | USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT (1U) |
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#define | USBPHY_DEBUG_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK) |
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#define | USBPHY_DEBUG_HSTPULLDOWN_MASK (0xCU) |
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#define | USBPHY_DEBUG_HSTPULLDOWN_SHIFT (2U) |
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#define | USBPHY_DEBUG_HSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_HSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_ENHSTPULLDOWN_MASK (0x30U) |
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#define | USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT (4U) |
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#define | USBPHY_DEBUG_ENHSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_ENHSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_RSVD0_MASK (0xC0U) |
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#define | USBPHY_DEBUG_RSVD0_SHIFT (6U) |
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#define | USBPHY_DEBUG_RSVD0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD0_SHIFT)) & USBPHY_DEBUG_RSVD0_MASK) |
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#define | USBPHY_DEBUG_TX2RXCOUNT_MASK (0xF00U) |
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#define | USBPHY_DEBUG_TX2RXCOUNT_SHIFT (8U) |
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#define | USBPHY_DEBUG_TX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_ENTX2RXCOUNT_MASK (0x1000U) |
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#define | USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT (12U) |
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#define | USBPHY_DEBUG_ENTX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_ENTX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_RSVD1_MASK (0xE000U) |
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#define | USBPHY_DEBUG_RSVD1_SHIFT (13U) |
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#define | USBPHY_DEBUG_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD1_SHIFT)) & USBPHY_DEBUG_RSVD1_MASK) |
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#define | USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK (0x1F0000U) |
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#define | USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT (16U) |
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#define | USBPHY_DEBUG_SQUELCHRESETCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK) |
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#define | USBPHY_DEBUG_RSVD2_MASK (0xE00000U) |
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#define | USBPHY_DEBUG_RSVD2_SHIFT (21U) |
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#define | USBPHY_DEBUG_RSVD2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD2_SHIFT)) & USBPHY_DEBUG_RSVD2_MASK) |
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#define | USBPHY_DEBUG_ENSQUELCHRESET_MASK (0x1000000U) |
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#define | USBPHY_DEBUG_ENSQUELCHRESET_SHIFT (24U) |
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#define | USBPHY_DEBUG_ENSQUELCHRESET(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_ENSQUELCHRESET_MASK) |
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#define | USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK (0x1E000000U) |
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#define | USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT (25U) |
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#define | USBPHY_DEBUG_SQUELCHRESETLENGTH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK) |
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#define | USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK (0x20000000U) |
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#define | USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT (29U) |
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#define | USBPHY_DEBUG_HOST_RESUME_DEBUG(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK) |
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#define | USBPHY_DEBUG_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_DEBUG_CLKGATE_SHIFT (30U) |
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#define | USBPHY_DEBUG_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLKGATE_MASK) |
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#define | USBPHY_DEBUG_RSVD3_MASK (0x80000000U) |
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#define | USBPHY_DEBUG_RSVD3_SHIFT (31U) |
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#define | USBPHY_DEBUG_RSVD3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD3_SHIFT)) & USBPHY_DEBUG_RSVD3_MASK) |
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#define | USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK (0x1U) |
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#define | USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT (0U) |
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#define | USBPHY_DEBUG_SET_OTGIDPIOLOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK) |
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#define | USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK (0x2U) |
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#define | USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT (1U) |
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#define | USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK) |
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#define | USBPHY_DEBUG_SET_HSTPULLDOWN_MASK (0xCU) |
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#define | USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT (2U) |
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#define | USBPHY_DEBUG_SET_HSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_HSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK (0x30U) |
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#define | USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT (4U) |
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#define | USBPHY_DEBUG_SET_ENHSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_SET_RSVD0_MASK (0xC0U) |
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#define | USBPHY_DEBUG_SET_RSVD0_SHIFT (6U) |
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#define | USBPHY_DEBUG_SET_RSVD0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD0_SHIFT)) & USBPHY_DEBUG_SET_RSVD0_MASK) |
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#define | USBPHY_DEBUG_SET_TX2RXCOUNT_MASK (0xF00U) |
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#define | USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT (8U) |
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#define | USBPHY_DEBUG_SET_TX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_TX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK (0x1000U) |
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#define | USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT (12U) |
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#define | USBPHY_DEBUG_SET_ENTX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_SET_RSVD1_MASK (0xE000U) |
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#define | USBPHY_DEBUG_SET_RSVD1_SHIFT (13U) |
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#define | USBPHY_DEBUG_SET_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD1_SHIFT)) & USBPHY_DEBUG_SET_RSVD1_MASK) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK (0x1F0000U) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT (16U) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK) |
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#define | USBPHY_DEBUG_SET_RSVD2_MASK (0xE00000U) |
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#define | USBPHY_DEBUG_SET_RSVD2_SHIFT (21U) |
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#define | USBPHY_DEBUG_SET_RSVD2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD2_SHIFT)) & USBPHY_DEBUG_SET_RSVD2_MASK) |
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#define | USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK (0x1000000U) |
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#define | USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT (24U) |
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#define | USBPHY_DEBUG_SET_ENSQUELCHRESET(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK (0x1E000000U) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT (25U) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETLENGTH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK) |
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#define | USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK (0x20000000U) |
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#define | USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT (29U) |
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#define | USBPHY_DEBUG_SET_HOST_RESUME_DEBUG(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK) |
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#define | USBPHY_DEBUG_SET_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_DEBUG_SET_CLKGATE_SHIFT (30U) |
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#define | USBPHY_DEBUG_SET_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_CLKGATE_SHIFT)) & USBPHY_DEBUG_SET_CLKGATE_MASK) |
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#define | USBPHY_DEBUG_SET_RSVD3_MASK (0x80000000U) |
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#define | USBPHY_DEBUG_SET_RSVD3_SHIFT (31U) |
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#define | USBPHY_DEBUG_SET_RSVD3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD3_SHIFT)) & USBPHY_DEBUG_SET_RSVD3_MASK) |
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#define | USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK (0x1U) |
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#define | USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT (0U) |
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#define | USBPHY_DEBUG_CLR_OTGIDPIOLOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK) |
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#define | USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK (0x2U) |
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#define | USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT (1U) |
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#define | USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK) |
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#define | USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK (0xCU) |
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#define | USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT (2U) |
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#define | USBPHY_DEBUG_CLR_HSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK (0x30U) |
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#define | USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT (4U) |
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#define | USBPHY_DEBUG_CLR_ENHSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_CLR_RSVD0_MASK (0xC0U) |
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#define | USBPHY_DEBUG_CLR_RSVD0_SHIFT (6U) |
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#define | USBPHY_DEBUG_CLR_RSVD0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD0_SHIFT)) & USBPHY_DEBUG_CLR_RSVD0_MASK) |
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#define | USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK (0xF00U) |
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#define | USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT (8U) |
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#define | USBPHY_DEBUG_CLR_TX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK (0x1000U) |
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#define | USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT (12U) |
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#define | USBPHY_DEBUG_CLR_ENTX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_CLR_RSVD1_MASK (0xE000U) |
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#define | USBPHY_DEBUG_CLR_RSVD1_SHIFT (13U) |
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#define | USBPHY_DEBUG_CLR_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD1_SHIFT)) & USBPHY_DEBUG_CLR_RSVD1_MASK) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT (16U) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK) |
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#define | USBPHY_DEBUG_CLR_RSVD2_MASK (0xE00000U) |
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#define | USBPHY_DEBUG_CLR_RSVD2_SHIFT (21U) |
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#define | USBPHY_DEBUG_CLR_RSVD2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD2_SHIFT)) & USBPHY_DEBUG_CLR_RSVD2_MASK) |
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#define | USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) |
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#define | USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT (24U) |
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#define | USBPHY_DEBUG_CLR_ENSQUELCHRESET(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK (0x1E000000U) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT (25U) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK) |
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#define | USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK (0x20000000U) |
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#define | USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT (29U) |
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#define | USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK) |
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#define | USBPHY_DEBUG_CLR_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_DEBUG_CLR_CLKGATE_SHIFT (30U) |
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#define | USBPHY_DEBUG_CLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLR_CLKGATE_MASK) |
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#define | USBPHY_DEBUG_CLR_RSVD3_MASK (0x80000000U) |
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#define | USBPHY_DEBUG_CLR_RSVD3_SHIFT (31U) |
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#define | USBPHY_DEBUG_CLR_RSVD3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD3_SHIFT)) & USBPHY_DEBUG_CLR_RSVD3_MASK) |
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#define | USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK (0x1U) |
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#define | USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT (0U) |
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#define | USBPHY_DEBUG_TOG_OTGIDPIOLOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK) |
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#define | USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK (0x2U) |
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#define | USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT (1U) |
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#define | USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK) |
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#define | USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK (0xCU) |
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#define | USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT (2U) |
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#define | USBPHY_DEBUG_TOG_HSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK (0x30U) |
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#define | USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT (4U) |
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#define | USBPHY_DEBUG_TOG_ENHSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_TOG_RSVD0_MASK (0xC0U) |
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#define | USBPHY_DEBUG_TOG_RSVD0_SHIFT (6U) |
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#define | USBPHY_DEBUG_TOG_RSVD0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD0_SHIFT)) & USBPHY_DEBUG_TOG_RSVD0_MASK) |
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#define | USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK (0xF00U) |
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#define | USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT (8U) |
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#define | USBPHY_DEBUG_TOG_TX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK (0x1000U) |
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#define | USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT (12U) |
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#define | USBPHY_DEBUG_TOG_ENTX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_TOG_RSVD1_MASK (0xE000U) |
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#define | USBPHY_DEBUG_TOG_RSVD1_SHIFT (13U) |
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#define | USBPHY_DEBUG_TOG_RSVD1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD1_SHIFT)) & USBPHY_DEBUG_TOG_RSVD1_MASK) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK (0x1F0000U) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT (16U) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK) |
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#define | USBPHY_DEBUG_TOG_RSVD2_MASK (0xE00000U) |
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#define | USBPHY_DEBUG_TOG_RSVD2_SHIFT (21U) |
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#define | USBPHY_DEBUG_TOG_RSVD2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD2_SHIFT)) & USBPHY_DEBUG_TOG_RSVD2_MASK) |
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#define | USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK (0x1000000U) |
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#define | USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT (24U) |
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#define | USBPHY_DEBUG_TOG_ENSQUELCHRESET(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK (0x1E000000U) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT (25U) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK) |
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#define | USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK (0x20000000U) |
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#define | USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT (29U) |
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#define | USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK) |
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#define | USBPHY_DEBUG_TOG_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_DEBUG_TOG_CLKGATE_SHIFT (30U) |
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#define | USBPHY_DEBUG_TOG_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_CLKGATE_SHIFT)) & USBPHY_DEBUG_TOG_CLKGATE_MASK) |
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#define | USBPHY_DEBUG_TOG_RSVD3_MASK (0x80000000U) |
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#define | USBPHY_DEBUG_TOG_RSVD3_SHIFT (31U) |
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#define | USBPHY_DEBUG_TOG_RSVD3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD3_SHIFT)) & USBPHY_DEBUG_TOG_RSVD3_MASK) |
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#define | USBPHY_CTRL_ENOTG_ID_CHG_IRQ_MASK (0x1U) |
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#define | USBPHY_CTRL_ENOTG_ID_CHG_IRQ_SHIFT (0U) |
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#define | USBPHY_CTRL_ENOTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_ENOTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_ENHOSTDISCONDETECT_MASK (0x2U) |
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#define | USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT (1U) |
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#define | USBPHY_CTRL_ENHOSTDISCONDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_ENHOSTDISCONDETECT_MASK) |
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#define | USBPHY_CTRL_ENIRQHOSTDISCON_MASK (0x4U) |
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#define | USBPHY_CTRL_ENIRQHOSTDISCON_SHIFT (2U) |
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#define | USBPHY_CTRL_ENIRQHOSTDISCON(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_ENIRQHOSTDISCON_MASK) |
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#define | USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK (0x8U) |
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#define | USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT (3U) |
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#define | USBPHY_CTRL_HOSTDISCONDETECT_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK) |
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#define | USBPHY_CTRL_ENDEVPLUGINDETECT_MASK (0x10U) |
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#define | USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT (4U) |
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#define | USBPHY_CTRL_ENDEVPLUGINDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_ENDEVPLUGINDETECT_MASK) |
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#define | USBPHY_CTRL_DEVPLUGIN_POLARITY_MASK (0x20U) |
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#define | USBPHY_CTRL_DEVPLUGIN_POLARITY_SHIFT (5U) |
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#define | USBPHY_CTRL_DEVPLUGIN_POLARITY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_POLARITY_MASK) |
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#define | USBPHY_CTRL_OTG_ID_CHG_IRQ_MASK (0x40U) |
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#define | USBPHY_CTRL_OTG_ID_CHG_IRQ_SHIFT (6U) |
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#define | USBPHY_CTRL_OTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_OTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_ENOTGIDDETECT_MASK (0x80U) |
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#define | USBPHY_CTRL_ENOTGIDDETECT_SHIFT (7U) |
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#define | USBPHY_CTRL_ENOTGIDDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_ENOTGIDDETECT_MASK) |
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#define | USBPHY_CTRL_RESUMEIRQSTICKY_MASK (0x100U) |
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#define | USBPHY_CTRL_RESUMEIRQSTICKY_SHIFT (8U) |
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#define | USBPHY_CTRL_RESUMEIRQSTICKY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_RESUMEIRQSTICKY_MASK) |
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#define | USBPHY_CTRL_ENIRQRESUMEDETECT_MASK (0x200U) |
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#define | USBPHY_CTRL_ENIRQRESUMEDETECT_SHIFT (9U) |
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#define | USBPHY_CTRL_ENIRQRESUMEDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_ENIRQRESUMEDETECT_MASK) |
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#define | USBPHY_CTRL_RESUME_IRQ_MASK (0x400U) |
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#define | USBPHY_CTRL_RESUME_IRQ_SHIFT (10U) |
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#define | USBPHY_CTRL_RESUME_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_RESUME_IRQ_MASK) |
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#define | USBPHY_CTRL_ENIRQDEVPLUGIN_MASK (0x800U) |
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#define | USBPHY_CTRL_ENIRQDEVPLUGIN_SHIFT (11U) |
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#define | USBPHY_CTRL_ENIRQDEVPLUGIN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_ENIRQDEVPLUGIN_MASK) |
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#define | USBPHY_CTRL_DEVPLUGIN_IRQ_MASK (0x1000U) |
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#define | USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT (12U) |
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#define | USBPHY_CTRL_DEVPLUGIN_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_IRQ_MASK) |
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#define | USBPHY_CTRL_ENUTMILEVEL2_MASK (0x4000U) |
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#define | USBPHY_CTRL_ENUTMILEVEL2_SHIFT (14U) |
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#define | USBPHY_CTRL_ENUTMILEVEL2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL2_MASK) |
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#define | USBPHY_CTRL_ENUTMILEVEL3_MASK (0x8000U) |
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#define | USBPHY_CTRL_ENUTMILEVEL3_SHIFT (15U) |
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#define | USBPHY_CTRL_ENUTMILEVEL3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL3_MASK) |
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#define | USBPHY_CTRL_ENIRQWAKEUP_MASK (0x10000U) |
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#define | USBPHY_CTRL_ENIRQWAKEUP_SHIFT (16U) |
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#define | USBPHY_CTRL_ENIRQWAKEUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_ENIRQWAKEUP_MASK) |
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#define | USBPHY_CTRL_WAKEUP_IRQ_MASK (0x20000U) |
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#define | USBPHY_CTRL_WAKEUP_IRQ_SHIFT (17U) |
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#define | USBPHY_CTRL_WAKEUP_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_WAKEUP_IRQ_MASK) |
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#define | USBPHY_CTRL_AUTORESUME_EN_MASK (0x40000U) |
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#define | USBPHY_CTRL_AUTORESUME_EN_SHIFT (18U) |
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#define | USBPHY_CTRL_AUTORESUME_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_AUTORESUME_EN_MASK) |
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#define | USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK (0x80000U) |
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#define | USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT (19U) |
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#define | USBPHY_CTRL_ENAUTOCLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK (0x100000U) |
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#define | USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT (20U) |
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#define | USBPHY_CTRL_ENAUTOCLR_PHY_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK) |
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#define | USBPHY_CTRL_ENDPDMCHG_WKUP_MASK (0x200000U) |
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#define | USBPHY_CTRL_ENDPDMCHG_WKUP_SHIFT (21U) |
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#define | USBPHY_CTRL_ENDPDMCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENDPDMCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_ENIDCHG_WKUP_MASK (0x400000U) |
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#define | USBPHY_CTRL_ENIDCHG_WKUP_SHIFT (22U) |
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#define | USBPHY_CTRL_ENIDCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENIDCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_ENVBUSCHG_WKUP_MASK (0x800000U) |
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#define | USBPHY_CTRL_ENVBUSCHG_WKUP_SHIFT (23U) |
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#define | USBPHY_CTRL_ENVBUSCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENVBUSCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_FSDLL_RST_EN_MASK (0x1000000U) |
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#define | USBPHY_CTRL_FSDLL_RST_EN_SHIFT (24U) |
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#define | USBPHY_CTRL_FSDLL_RST_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_FSDLL_RST_EN_MASK) |
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#define | USBPHY_CTRL_OTG_ID_VALUE_MASK (0x8000000U) |
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#define | USBPHY_CTRL_OTG_ID_VALUE_SHIFT (27U) |
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#define | USBPHY_CTRL_OTG_ID_VALUE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_OTG_ID_VALUE_MASK) |
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#define | USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK (0x10000000U) |
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#define | USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT (28U) |
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#define | USBPHY_CTRL_HOST_FORCE_LS_SE0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK) |
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#define | USBPHY_CTRL_UTMI_SUSPENDM_MASK (0x20000000U) |
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#define | USBPHY_CTRL_UTMI_SUSPENDM_SHIFT (29U) |
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#define | USBPHY_CTRL_UTMI_SUSPENDM(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_UTMI_SUSPENDM_MASK) |
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#define | USBPHY_CTRL_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_CTRL_CLKGATE_SHIFT (30U) |
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#define | USBPHY_CTRL_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLKGATE_SHIFT)) & USBPHY_CTRL_CLKGATE_MASK) |
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#define | USBPHY_CTRL_SFTRST_MASK (0x80000000U) |
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#define | USBPHY_CTRL_SFTRST_SHIFT (31U) |
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#define | USBPHY_CTRL_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SFTRST_SHIFT)) & USBPHY_CTRL_SFTRST_MASK) |
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#define | USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_MASK (0x1U) |
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#define | USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_SHIFT (0U) |
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#define | USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK (0x2U) |
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#define | USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT (1U) |
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#define | USBPHY_CTRL_SET_ENHOSTDISCONDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK) |
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#define | USBPHY_CTRL_SET_ENIRQHOSTDISCON_MASK (0x4U) |
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#define | USBPHY_CTRL_SET_ENIRQHOSTDISCON_SHIFT (2U) |
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#define | USBPHY_CTRL_SET_ENIRQHOSTDISCON(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_SET_ENIRQHOSTDISCON_MASK) |
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#define | USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK (0x8U) |
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#define | USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT (3U) |
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#define | USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENDEVPLUGINDETECT_MASK (0x10U) |
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#define | USBPHY_CTRL_SET_ENDEVPLUGINDETECT_SHIFT (4U) |
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#define | USBPHY_CTRL_SET_ENDEVPLUGINDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_SET_ENDEVPLUGINDETECT_MASK) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_MASK (0x20U) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_SHIFT (5U) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_POLARITY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_MASK) |
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#define | USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_MASK (0x40U) |
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#define | USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_SHIFT (6U) |
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#define | USBPHY_CTRL_SET_OTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENOTGIDDETECT_MASK (0x80U) |
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#define | USBPHY_CTRL_SET_ENOTGIDDETECT_SHIFT (7U) |
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#define | USBPHY_CTRL_SET_ENOTGIDDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_SET_ENOTGIDDETECT_MASK) |
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#define | USBPHY_CTRL_SET_RESUMEIRQSTICKY_MASK (0x100U) |
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#define | USBPHY_CTRL_SET_RESUMEIRQSTICKY_SHIFT (8U) |
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#define | USBPHY_CTRL_SET_RESUMEIRQSTICKY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_SET_RESUMEIRQSTICKY_MASK) |
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#define | USBPHY_CTRL_SET_ENIRQRESUMEDETECT_MASK (0x200U) |
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#define | USBPHY_CTRL_SET_ENIRQRESUMEDETECT_SHIFT (9U) |
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#define | USBPHY_CTRL_SET_ENIRQRESUMEDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_SET_ENIRQRESUMEDETECT_MASK) |
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#define | USBPHY_CTRL_SET_RESUME_IRQ_MASK (0x400U) |
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#define | USBPHY_CTRL_SET_RESUME_IRQ_SHIFT (10U) |
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#define | USBPHY_CTRL_SET_RESUME_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_SET_RESUME_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENIRQDEVPLUGIN_MASK (0x800U) |
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#define | USBPHY_CTRL_SET_ENIRQDEVPLUGIN_SHIFT (11U) |
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#define | USBPHY_CTRL_SET_ENIRQDEVPLUGIN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_SET_ENIRQDEVPLUGIN_MASK) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK (0x1000U) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT (12U) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL2_MASK (0x4000U) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT (14U) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL2_MASK) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK (0x8000U) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT (15U) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL3_MASK) |
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#define | USBPHY_CTRL_SET_ENIRQWAKEUP_MASK (0x10000U) |
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#define | USBPHY_CTRL_SET_ENIRQWAKEUP_SHIFT (16U) |
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#define | USBPHY_CTRL_SET_ENIRQWAKEUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_SET_ENIRQWAKEUP_MASK) |
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#define | USBPHY_CTRL_SET_WAKEUP_IRQ_MASK (0x20000U) |
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#define | USBPHY_CTRL_SET_WAKEUP_IRQ_SHIFT (17U) |
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#define | USBPHY_CTRL_SET_WAKEUP_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_SET_WAKEUP_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_AUTORESUME_EN_MASK (0x40000U) |
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#define | USBPHY_CTRL_SET_AUTORESUME_EN_SHIFT (18U) |
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#define | USBPHY_CTRL_SET_AUTORESUME_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_SET_AUTORESUME_EN_MASK) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK (0x80000U) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT (19U) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK (0x100000U) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT (20U) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK) |
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#define | USBPHY_CTRL_SET_ENDPDMCHG_WKUP_MASK (0x200000U) |
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#define | USBPHY_CTRL_SET_ENDPDMCHG_WKUP_SHIFT (21U) |
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#define | USBPHY_CTRL_SET_ENDPDMCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENDPDMCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_SET_ENIDCHG_WKUP_MASK (0x400000U) |
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#define | USBPHY_CTRL_SET_ENIDCHG_WKUP_SHIFT (22U) |
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#define | USBPHY_CTRL_SET_ENIDCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENIDCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_SET_ENVBUSCHG_WKUP_MASK (0x800000U) |
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#define | USBPHY_CTRL_SET_ENVBUSCHG_WKUP_SHIFT (23U) |
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#define | USBPHY_CTRL_SET_ENVBUSCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENVBUSCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_SET_FSDLL_RST_EN_MASK (0x1000000U) |
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#define | USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT (24U) |
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#define | USBPHY_CTRL_SET_FSDLL_RST_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_SET_FSDLL_RST_EN_MASK) |
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#define | USBPHY_CTRL_SET_OTG_ID_VALUE_MASK (0x8000000U) |
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#define | USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT (27U) |
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#define | USBPHY_CTRL_SET_OTG_ID_VALUE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_VALUE_MASK) |
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#define | USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK (0x10000000U) |
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#define | USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT (28U) |
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#define | USBPHY_CTRL_SET_HOST_FORCE_LS_SE0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK) |
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#define | USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK (0x20000000U) |
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#define | USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT (29U) |
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#define | USBPHY_CTRL_SET_UTMI_SUSPENDM(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK) |
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#define | USBPHY_CTRL_SET_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_CTRL_SET_CLKGATE_SHIFT (30U) |
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#define | USBPHY_CTRL_SET_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_CLKGATE_MASK) |
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#define | USBPHY_CTRL_SET_SFTRST_MASK (0x80000000U) |
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#define | USBPHY_CTRL_SET_SFTRST_SHIFT (31U) |
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#define | USBPHY_CTRL_SET_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_SFTRST_SHIFT)) & USBPHY_CTRL_SET_SFTRST_MASK) |
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#define | USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_MASK (0x1U) |
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#define | USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_SHIFT (0U) |
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#define | USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK (0x2U) |
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#define | USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT (1U) |
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#define | USBPHY_CTRL_CLR_ENHOSTDISCONDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK) |
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#define | USBPHY_CTRL_CLR_ENIRQHOSTDISCON_MASK (0x4U) |
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#define | USBPHY_CTRL_CLR_ENIRQHOSTDISCON_SHIFT (2U) |
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#define | USBPHY_CTRL_CLR_ENIRQHOSTDISCON(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_CLR_ENIRQHOSTDISCON_MASK) |
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#define | USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK (0x8U) |
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#define | USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT (3U) |
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#define | USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_MASK (0x10U) |
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#define | USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_SHIFT (4U) |
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#define | USBPHY_CTRL_CLR_ENDEVPLUGINDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_MASK) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_MASK (0x20U) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_SHIFT (5U) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_MASK) |
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#define | USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_MASK (0x40U) |
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#define | USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_SHIFT (6U) |
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#define | USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENOTGIDDETECT_MASK (0x80U) |
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#define | USBPHY_CTRL_CLR_ENOTGIDDETECT_SHIFT (7U) |
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#define | USBPHY_CTRL_CLR_ENOTGIDDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENOTGIDDETECT_MASK) |
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#define | USBPHY_CTRL_CLR_RESUMEIRQSTICKY_MASK (0x100U) |
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#define | USBPHY_CTRL_CLR_RESUMEIRQSTICKY_SHIFT (8U) |
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#define | USBPHY_CTRL_CLR_RESUMEIRQSTICKY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_CLR_RESUMEIRQSTICKY_MASK) |
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#define | USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_MASK (0x200U) |
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#define | USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_SHIFT (9U) |
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#define | USBPHY_CTRL_CLR_ENIRQRESUMEDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_MASK) |
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#define | USBPHY_CTRL_CLR_RESUME_IRQ_MASK (0x400U) |
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#define | USBPHY_CTRL_CLR_RESUME_IRQ_SHIFT (10U) |
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#define | USBPHY_CTRL_CLR_RESUME_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_CLR_RESUME_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_MASK (0x800U) |
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#define | USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_SHIFT (11U) |
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#define | USBPHY_CTRL_CLR_ENIRQDEVPLUGIN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_MASK) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK (0x1000U) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT (12U) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK (0x4000U) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT (14U) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK (0x8000U) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT (15U) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK) |
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#define | USBPHY_CTRL_CLR_ENIRQWAKEUP_MASK (0x10000U) |
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#define | USBPHY_CTRL_CLR_ENIRQWAKEUP_SHIFT (16U) |
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#define | USBPHY_CTRL_CLR_ENIRQWAKEUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_CLR_ENIRQWAKEUP_MASK) |
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#define | USBPHY_CTRL_CLR_WAKEUP_IRQ_MASK (0x20000U) |
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#define | USBPHY_CTRL_CLR_WAKEUP_IRQ_SHIFT (17U) |
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#define | USBPHY_CTRL_CLR_WAKEUP_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_CLR_WAKEUP_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_AUTORESUME_EN_MASK (0x40000U) |
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#define | USBPHY_CTRL_CLR_AUTORESUME_EN_SHIFT (18U) |
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#define | USBPHY_CTRL_CLR_AUTORESUME_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_CLR_AUTORESUME_EN_MASK) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK (0x80000U) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT (19U) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK (0x100000U) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT (20U) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK) |
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#define | USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_MASK (0x200000U) |
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#define | USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_SHIFT (21U) |
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#define | USBPHY_CTRL_CLR_ENDPDMCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_CLR_ENIDCHG_WKUP_MASK (0x400000U) |
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#define | USBPHY_CTRL_CLR_ENIDCHG_WKUP_SHIFT (22U) |
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#define | USBPHY_CTRL_CLR_ENIDCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENIDCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_MASK (0x800000U) |
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#define | USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_SHIFT (23U) |
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#define | USBPHY_CTRL_CLR_ENVBUSCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK (0x1000000U) |
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#define | USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT (24U) |
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#define | USBPHY_CTRL_CLR_FSDLL_RST_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK) |
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#define | USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK (0x8000000U) |
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#define | USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT (27U) |
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#define | USBPHY_CTRL_CLR_OTG_ID_VALUE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK) |
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#define | USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK (0x10000000U) |
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#define | USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT (28U) |
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#define | USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK) |
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#define | USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK (0x20000000U) |
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#define | USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT (29U) |
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#define | USBPHY_CTRL_CLR_UTMI_SUSPENDM(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK) |
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#define | USBPHY_CTRL_CLR_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_CTRL_CLR_CLKGATE_SHIFT (30U) |
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#define | USBPHY_CTRL_CLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_CLR_SFTRST_MASK (0x80000000U) |
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#define | USBPHY_CTRL_CLR_SFTRST_SHIFT (31U) |
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#define | USBPHY_CTRL_CLR_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_SFTRST_SHIFT)) & USBPHY_CTRL_CLR_SFTRST_MASK) |
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#define | USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_MASK (0x1U) |
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#define | USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_SHIFT (0U) |
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#define | USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK (0x2U) |
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#define | USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT (1U) |
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#define | USBPHY_CTRL_TOG_ENHOSTDISCONDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK) |
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#define | USBPHY_CTRL_TOG_ENIRQHOSTDISCON_MASK (0x4U) |
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#define | USBPHY_CTRL_TOG_ENIRQHOSTDISCON_SHIFT (2U) |
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#define | USBPHY_CTRL_TOG_ENIRQHOSTDISCON(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_TOG_ENIRQHOSTDISCON_MASK) |
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#define | USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK (0x8U) |
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#define | USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT (3U) |
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#define | USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_MASK (0x10U) |
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#define | USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_SHIFT (4U) |
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#define | USBPHY_CTRL_TOG_ENDEVPLUGINDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_MASK) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_MASK (0x20U) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_SHIFT (5U) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_MASK) |
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#define | USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_MASK (0x40U) |
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#define | USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_SHIFT (6U) |
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#define | USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENOTGIDDETECT_MASK (0x80U) |
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#define | USBPHY_CTRL_TOG_ENOTGIDDETECT_SHIFT (7U) |
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#define | USBPHY_CTRL_TOG_ENOTGIDDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENOTGIDDETECT_MASK) |
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#define | USBPHY_CTRL_TOG_RESUMEIRQSTICKY_MASK (0x100U) |
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#define | USBPHY_CTRL_TOG_RESUMEIRQSTICKY_SHIFT (8U) |
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#define | USBPHY_CTRL_TOG_RESUMEIRQSTICKY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_TOG_RESUMEIRQSTICKY_MASK) |
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#define | USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_MASK (0x200U) |
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#define | USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_SHIFT (9U) |
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#define | USBPHY_CTRL_TOG_ENIRQRESUMEDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_MASK) |
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#define | USBPHY_CTRL_TOG_RESUME_IRQ_MASK (0x400U) |
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#define | USBPHY_CTRL_TOG_RESUME_IRQ_SHIFT (10U) |
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#define | USBPHY_CTRL_TOG_RESUME_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_TOG_RESUME_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_MASK (0x800U) |
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#define | USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_SHIFT (11U) |
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#define | USBPHY_CTRL_TOG_ENIRQDEVPLUGIN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_MASK) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK (0x1000U) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT (12U) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK (0x4000U) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT (14U) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK (0x8000U) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT (15U) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK) |
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#define | USBPHY_CTRL_TOG_ENIRQWAKEUP_MASK (0x10000U) |
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#define | USBPHY_CTRL_TOG_ENIRQWAKEUP_SHIFT (16U) |
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#define | USBPHY_CTRL_TOG_ENIRQWAKEUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_TOG_ENIRQWAKEUP_MASK) |
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#define | USBPHY_CTRL_TOG_WAKEUP_IRQ_MASK (0x20000U) |
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#define | USBPHY_CTRL_TOG_WAKEUP_IRQ_SHIFT (17U) |
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#define | USBPHY_CTRL_TOG_WAKEUP_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_TOG_WAKEUP_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_AUTORESUME_EN_MASK (0x40000U) |
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#define | USBPHY_CTRL_TOG_AUTORESUME_EN_SHIFT (18U) |
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#define | USBPHY_CTRL_TOG_AUTORESUME_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_TOG_AUTORESUME_EN_MASK) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK (0x80000U) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT (19U) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK (0x100000U) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT (20U) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK) |
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#define | USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_MASK (0x200000U) |
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#define | USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_SHIFT (21U) |
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#define | USBPHY_CTRL_TOG_ENDPDMCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_TOG_ENIDCHG_WKUP_MASK (0x400000U) |
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#define | USBPHY_CTRL_TOG_ENIDCHG_WKUP_SHIFT (22U) |
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#define | USBPHY_CTRL_TOG_ENIDCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENIDCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_MASK (0x800000U) |
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#define | USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_SHIFT (23U) |
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#define | USBPHY_CTRL_TOG_ENVBUSCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK (0x1000000U) |
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#define | USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT (24U) |
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#define | USBPHY_CTRL_TOG_FSDLL_RST_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK) |
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#define | USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK (0x8000000U) |
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#define | USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT (27U) |
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#define | USBPHY_CTRL_TOG_OTG_ID_VALUE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK) |
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#define | USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK (0x10000000U) |
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#define | USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT (28U) |
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#define | USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK) |
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#define | USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK (0x20000000U) |
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#define | USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT (29U) |
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#define | USBPHY_CTRL_TOG_UTMI_SUSPENDM(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK) |
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#define | USBPHY_CTRL_TOG_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_CTRL_TOG_CLKGATE_SHIFT (30U) |
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#define | USBPHY_CTRL_TOG_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_CLKGATE_MASK) |
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#define | USBPHY_CTRL_TOG_SFTRST_MASK (0x80000000U) |
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#define | USBPHY_CTRL_TOG_SFTRST_SHIFT (31U) |
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#define | USBPHY_CTRL_TOG_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_SFTRST_SHIFT)) & USBPHY_CTRL_TOG_SFTRST_MASK) |
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#define | USBPHY_DEBUG_OTGIDPIOLOCK_MASK (0x1U) |
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#define | USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT (0U) |
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#define | USBPHY_DEBUG_OTGIDPIOLOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_OTGIDPIOLOCK_MASK) |
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#define | USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK (0x2U) |
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#define | USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT (1U) |
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#define | USBPHY_DEBUG_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK) |
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#define | USBPHY_DEBUG_HSTPULLDOWN_MASK (0xCU) |
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#define | USBPHY_DEBUG_HSTPULLDOWN_SHIFT (2U) |
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#define | USBPHY_DEBUG_HSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_HSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_ENHSTPULLDOWN_MASK (0x30U) |
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#define | USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT (4U) |
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#define | USBPHY_DEBUG_ENHSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_ENHSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_TX2RXCOUNT_MASK (0xF00U) |
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#define | USBPHY_DEBUG_TX2RXCOUNT_SHIFT (8U) |
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#define | USBPHY_DEBUG_TX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_ENTX2RXCOUNT_MASK (0x1000U) |
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#define | USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT (12U) |
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#define | USBPHY_DEBUG_ENTX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_ENTX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK (0x1F0000U) |
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#define | USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT (16U) |
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#define | USBPHY_DEBUG_SQUELCHRESETCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK) |
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#define | USBPHY_DEBUG_ENSQUELCHRESET_MASK (0x1000000U) |
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#define | USBPHY_DEBUG_ENSQUELCHRESET_SHIFT (24U) |
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#define | USBPHY_DEBUG_ENSQUELCHRESET(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_ENSQUELCHRESET_MASK) |
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#define | USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK (0x1E000000U) |
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#define | USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT (25U) |
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#define | USBPHY_DEBUG_SQUELCHRESETLENGTH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK) |
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#define | USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK (0x20000000U) |
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#define | USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT (29U) |
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#define | USBPHY_DEBUG_HOST_RESUME_DEBUG(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK) |
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#define | USBPHY_DEBUG_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_DEBUG_CLKGATE_SHIFT (30U) |
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#define | USBPHY_DEBUG_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLKGATE_MASK) |
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#define | USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK (0x1U) |
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#define | USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT (0U) |
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#define | USBPHY_DEBUG_SET_OTGIDPIOLOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK) |
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#define | USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK (0x2U) |
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#define | USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT (1U) |
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#define | USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK) |
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#define | USBPHY_DEBUG_SET_HSTPULLDOWN_MASK (0xCU) |
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#define | USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT (2U) |
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#define | USBPHY_DEBUG_SET_HSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_HSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK (0x30U) |
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#define | USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT (4U) |
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#define | USBPHY_DEBUG_SET_ENHSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_SET_TX2RXCOUNT_MASK (0xF00U) |
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#define | USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT (8U) |
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#define | USBPHY_DEBUG_SET_TX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_TX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK (0x1000U) |
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#define | USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT (12U) |
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#define | USBPHY_DEBUG_SET_ENTX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK (0x1F0000U) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT (16U) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK) |
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#define | USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK (0x1000000U) |
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#define | USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT (24U) |
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#define | USBPHY_DEBUG_SET_ENSQUELCHRESET(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK (0x1E000000U) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT (25U) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETLENGTH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK) |
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#define | USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK (0x20000000U) |
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#define | USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT (29U) |
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#define | USBPHY_DEBUG_SET_HOST_RESUME_DEBUG(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK) |
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#define | USBPHY_DEBUG_SET_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_DEBUG_SET_CLKGATE_SHIFT (30U) |
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#define | USBPHY_DEBUG_SET_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_CLKGATE_SHIFT)) & USBPHY_DEBUG_SET_CLKGATE_MASK) |
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#define | USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK (0x1U) |
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#define | USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT (0U) |
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#define | USBPHY_DEBUG_CLR_OTGIDPIOLOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK) |
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#define | USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK (0x2U) |
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#define | USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT (1U) |
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#define | USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK) |
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#define | USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK (0xCU) |
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#define | USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT (2U) |
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#define | USBPHY_DEBUG_CLR_HSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK (0x30U) |
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#define | USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT (4U) |
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#define | USBPHY_DEBUG_CLR_ENHSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK (0xF00U) |
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#define | USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT (8U) |
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#define | USBPHY_DEBUG_CLR_TX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK (0x1000U) |
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#define | USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT (12U) |
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#define | USBPHY_DEBUG_CLR_ENTX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT (16U) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK) |
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#define | USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) |
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#define | USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT (24U) |
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#define | USBPHY_DEBUG_CLR_ENSQUELCHRESET(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK (0x1E000000U) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT (25U) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK) |
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#define | USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK (0x20000000U) |
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#define | USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT (29U) |
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#define | USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK) |
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#define | USBPHY_DEBUG_CLR_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_DEBUG_CLR_CLKGATE_SHIFT (30U) |
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#define | USBPHY_DEBUG_CLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLR_CLKGATE_MASK) |
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#define | USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK (0x1U) |
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#define | USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT (0U) |
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#define | USBPHY_DEBUG_TOG_OTGIDPIOLOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK) |
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#define | USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK (0x2U) |
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#define | USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT (1U) |
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#define | USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK) |
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#define | USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK (0xCU) |
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#define | USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT (2U) |
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#define | USBPHY_DEBUG_TOG_HSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK (0x30U) |
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#define | USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT (4U) |
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#define | USBPHY_DEBUG_TOG_ENHSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK (0xF00U) |
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#define | USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT (8U) |
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#define | USBPHY_DEBUG_TOG_TX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK (0x1000U) |
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#define | USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT (12U) |
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#define | USBPHY_DEBUG_TOG_ENTX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK (0x1F0000U) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT (16U) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK) |
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#define | USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK (0x1000000U) |
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#define | USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT (24U) |
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#define | USBPHY_DEBUG_TOG_ENSQUELCHRESET(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK (0x1E000000U) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT (25U) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK) |
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#define | USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK (0x20000000U) |
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#define | USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT (29U) |
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#define | USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK) |
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#define | USBPHY_DEBUG_TOG_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_DEBUG_TOG_CLKGATE_SHIFT (30U) |
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#define | USBPHY_DEBUG_TOG_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_CLKGATE_SHIFT)) & USBPHY_DEBUG_TOG_CLKGATE_MASK) |
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#define | USBPHY_PLL_SIC_PLL_POSTDIV_MASK (0x1CU) |
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#define | USBPHY_PLL_SIC_PLL_POSTDIV_SHIFT (2U) |
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#define | USBPHY_PLL_SIC_PLL_POSTDIV(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_POSTDIV_SHIFT)) & USBPHY_PLL_SIC_PLL_POSTDIV_MASK) |
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#define | USBPHY_PLL_SIC_PLL_EN_USB_CLKS_MASK (0x40U) |
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#define | USBPHY_PLL_SIC_PLL_EN_USB_CLKS_SHIFT (6U) |
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#define | USBPHY_PLL_SIC_PLL_EN_USB_CLKS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_PLL_EN_USB_CLKS_MASK) |
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#define | USBPHY_PLL_SIC_PLL_POWER_MASK (0x1000U) |
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#define | USBPHY_PLL_SIC_PLL_POWER_SHIFT (12U) |
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#define | USBPHY_PLL_SIC_PLL_POWER(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_PLL_POWER_MASK) |
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#define | USBPHY_PLL_SIC_PLL_ENABLE_MASK (0x2000U) |
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#define | USBPHY_PLL_SIC_PLL_ENABLE_SHIFT (13U) |
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#define | USBPHY_PLL_SIC_PLL_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_PLL_BYPASS_MASK (0x10000U) |
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#define | USBPHY_PLL_SIC_PLL_BYPASS_SHIFT (16U) |
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#define | USBPHY_PLL_SIC_PLL_BYPASS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_PLL_BYPASS_MASK) |
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#define | USBPHY_PLL_SIC_REFBIAS_PWD_SEL_MASK (0x80000U) |
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#define | USBPHY_PLL_SIC_REFBIAS_PWD_SEL_SHIFT (19U) |
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#define | USBPHY_PLL_SIC_REFBIAS_PWD_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_REFBIAS_PWD_SEL_SHIFT)) & USBPHY_PLL_SIC_REFBIAS_PWD_SEL_MASK) |
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#define | USBPHY_PLL_SIC_REFBIAS_PWD_MASK (0x100000U) |
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#define | USBPHY_PLL_SIC_REFBIAS_PWD_SHIFT (20U) |
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#define | USBPHY_PLL_SIC_REFBIAS_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_REFBIAS_PWD_SHIFT)) & USBPHY_PLL_SIC_REFBIAS_PWD_MASK) |
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#define | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) |
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#define | USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT (21U) |
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#define | USBPHY_PLL_SIC_PLL_REG_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_PLL_DIV_SEL_MASK (0x1C00000U) |
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#define | USBPHY_PLL_SIC_PLL_DIV_SEL_SHIFT (22U) |
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#define | USBPHY_PLL_SIC_PLL_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_PLL_DIV_SEL_MASK) |
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#define | USBPHY_PLL_SIC_PLL_LOCK_MASK (0x80000000U) |
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#define | USBPHY_PLL_SIC_PLL_LOCK_SHIFT (31U) |
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#define | USBPHY_PLL_SIC_PLL_LOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_PLL_LOCK_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_POSTDIV_MASK (0x1CU) |
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#define | USBPHY_PLL_SIC_SET_PLL_POSTDIV_SHIFT (2U) |
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#define | USBPHY_PLL_SIC_SET_PLL_POSTDIV(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_POSTDIV_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_POSTDIV_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_MASK (0x40U) |
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#define | USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_SHIFT (6U) |
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#define | USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_POWER_MASK (0x1000U) |
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#define | USBPHY_PLL_SIC_SET_PLL_POWER_SHIFT (12U) |
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#define | USBPHY_PLL_SIC_SET_PLL_POWER(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_POWER_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_ENABLE_MASK (0x2000U) |
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#define | USBPHY_PLL_SIC_SET_PLL_ENABLE_SHIFT (13U) |
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#define | USBPHY_PLL_SIC_SET_PLL_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_BYPASS_MASK (0x10000U) |
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#define | USBPHY_PLL_SIC_SET_PLL_BYPASS_SHIFT (16U) |
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#define | USBPHY_PLL_SIC_SET_PLL_BYPASS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_BYPASS_MASK) |
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#define | USBPHY_PLL_SIC_SET_REFBIAS_PWD_SEL_MASK (0x80000U) |
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#define | USBPHY_PLL_SIC_SET_REFBIAS_PWD_SEL_SHIFT (19U) |
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#define | USBPHY_PLL_SIC_SET_REFBIAS_PWD_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_REFBIAS_PWD_SEL_SHIFT)) & USBPHY_PLL_SIC_SET_REFBIAS_PWD_SEL_MASK) |
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#define | USBPHY_PLL_SIC_SET_REFBIAS_PWD_MASK (0x100000U) |
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#define | USBPHY_PLL_SIC_SET_REFBIAS_PWD_SHIFT (20U) |
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#define | USBPHY_PLL_SIC_SET_REFBIAS_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_REFBIAS_PWD_SHIFT)) & USBPHY_PLL_SIC_SET_REFBIAS_PWD_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_REG_ENABLE_MASK (0x200000U) |
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#define | USBPHY_PLL_SIC_SET_PLL_REG_ENABLE_SHIFT (21U) |
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#define | USBPHY_PLL_SIC_SET_PLL_REG_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_REG_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_DIV_SEL_MASK (0x1C00000U) |
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#define | USBPHY_PLL_SIC_SET_PLL_DIV_SEL_SHIFT (22U) |
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#define | USBPHY_PLL_SIC_SET_PLL_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_DIV_SEL_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_LOCK_MASK (0x80000000U) |
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#define | USBPHY_PLL_SIC_SET_PLL_LOCK_SHIFT (31U) |
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#define | USBPHY_PLL_SIC_SET_PLL_LOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_LOCK_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_POSTDIV_MASK (0x1CU) |
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#define | USBPHY_PLL_SIC_CLR_PLL_POSTDIV_SHIFT (2U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_POSTDIV(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_POSTDIV_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_POSTDIV_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_MASK (0x40U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_SHIFT (6U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_POWER_MASK (0x1000U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_POWER_SHIFT (12U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_POWER(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_POWER_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_ENABLE_MASK (0x2000U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_ENABLE_SHIFT (13U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_BYPASS_MASK (0x10000U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_BYPASS_SHIFT (16U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_BYPASS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_BYPASS_MASK) |
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#define | USBPHY_PLL_SIC_CLR_REFBIAS_PWD_SEL_MASK (0x80000U) |
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#define | USBPHY_PLL_SIC_CLR_REFBIAS_PWD_SEL_SHIFT (19U) |
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#define | USBPHY_PLL_SIC_CLR_REFBIAS_PWD_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_REFBIAS_PWD_SEL_SHIFT)) & USBPHY_PLL_SIC_CLR_REFBIAS_PWD_SEL_MASK) |
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#define | USBPHY_PLL_SIC_CLR_REFBIAS_PWD_MASK (0x100000U) |
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#define | USBPHY_PLL_SIC_CLR_REFBIAS_PWD_SHIFT (20U) |
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#define | USBPHY_PLL_SIC_CLR_REFBIAS_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_REFBIAS_PWD_SHIFT)) & USBPHY_PLL_SIC_CLR_REFBIAS_PWD_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_REG_ENABLE_MASK (0x200000U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_REG_ENABLE_SHIFT (21U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_REG_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_REG_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_MASK (0x1C00000U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_SHIFT (22U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_LOCK_MASK (0x80000000U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_LOCK_SHIFT (31U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_LOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_LOCK_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_POSTDIV_MASK (0x1CU) |
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#define | USBPHY_PLL_SIC_TOG_PLL_POSTDIV_SHIFT (2U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_POSTDIV(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_POSTDIV_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_POSTDIV_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_MASK (0x40U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_SHIFT (6U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_POWER_MASK (0x1000U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_POWER_SHIFT (12U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_POWER(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_POWER_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_ENABLE_MASK (0x2000U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_ENABLE_SHIFT (13U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_BYPASS_MASK (0x10000U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_BYPASS_SHIFT (16U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_BYPASS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_BYPASS_MASK) |
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#define | USBPHY_PLL_SIC_TOG_REFBIAS_PWD_SEL_MASK (0x80000U) |
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#define | USBPHY_PLL_SIC_TOG_REFBIAS_PWD_SEL_SHIFT (19U) |
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#define | USBPHY_PLL_SIC_TOG_REFBIAS_PWD_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_REFBIAS_PWD_SEL_SHIFT)) & USBPHY_PLL_SIC_TOG_REFBIAS_PWD_SEL_MASK) |
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#define | USBPHY_PLL_SIC_TOG_REFBIAS_PWD_MASK (0x100000U) |
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#define | USBPHY_PLL_SIC_TOG_REFBIAS_PWD_SHIFT (20U) |
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#define | USBPHY_PLL_SIC_TOG_REFBIAS_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_REFBIAS_PWD_SHIFT)) & USBPHY_PLL_SIC_TOG_REFBIAS_PWD_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_REG_ENABLE_MASK (0x200000U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_REG_ENABLE_SHIFT (21U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_REG_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_REG_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_MASK (0x1C00000U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_SHIFT (22U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_LOCK_MASK (0x80000000U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_LOCK_SHIFT (31U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_LOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_LOCK_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_MASK (0x7U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_SHIFT (0U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_MASK (0x8U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_SHIFT (3U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_MASK (0x80U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_SHIFT (7U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_MASK (0x100U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_SHIFT (8U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_MASK (0x600U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_SHIFT (9U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_EN_MASK (0x800U) |
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#define | USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_EN_SHIFT (11U) |
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#define | USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_MASK (0x1000U) |
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#define | USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_SHIFT (12U) |
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#define | USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_MASK (0x40000U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_SHIFT (18U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_MASK (0x700000U) |
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#define | USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_SHIFT (20U) |
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#define | USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_MASK (0x4000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_SHIFT (26U) |
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#define | USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_MASK (0x80000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_SHIFT (31U) |
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#define | USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK (0x7U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT (0U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_MASK (0x8U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_SHIFT (3U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_MASK (0x80U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_SHIFT (7U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_MASK (0x100U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_SHIFT (8U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_MASK (0x600U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_SHIFT (9U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_EN_MASK (0x800U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_EN_SHIFT (11U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_MASK (0x1000U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_SHIFT (12U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_MASK (0x40000U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_SHIFT (18U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_MASK (0x700000U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_SHIFT (20U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK (0x4000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT (26U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_MASK (0x80000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_SHIFT (31U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK (0x7U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT (0U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_MASK (0x8U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_SHIFT (3U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_MASK (0x80U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_SHIFT (7U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_MASK (0x100U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_SHIFT (8U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_MASK (0x600U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_SHIFT (9U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_EN_MASK (0x800U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_EN_SHIFT (11U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_MASK (0x1000U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_SHIFT (12U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_MASK (0x40000U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_SHIFT (18U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_MASK (0x700000U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_SHIFT (20U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK (0x4000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT (26U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_MASK (0x80000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_SHIFT (31U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK (0x7U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT (0U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_MASK (0x8U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_SHIFT (3U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_MASK (0x80U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_SHIFT (7U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_MASK (0x100U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_SHIFT (8U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_MASK (0x600U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_SHIFT (9U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_EN_MASK (0x800U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_EN_SHIFT (11U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_MASK (0x1000U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_SHIFT (12U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_MASK (0x40000U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_SHIFT (18U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_MASK (0x700000U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_SHIFT (20U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK (0x4000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT (26U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_MASK (0x80000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_SHIFT (31U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_MASK) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_MASK (0x1U) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_SHIFT (0U) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_MASK) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_MASK (0x2U) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_SHIFT (1U) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_MASK (0x4U) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_SHIFT (2U) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_MASK (0x8U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_SHIFT (3U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_MASK (0x10U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_SHIFT (4U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_EN_MASK (0x20U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_EN_SHIFT (5U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_MASK (0x40U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_SHIFT (6U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_MASK) |
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#define | USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_MASK (0x80U) |
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#define | USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_SHIFT (7U) |
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#define | USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_MASK (0x100U) |
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#define | USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_SHIFT (8U) |
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#define | USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_MASK (0x8000U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_SHIFT (15U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TSTPKT_MASK (0xFF0000U) |
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#define | USBPHY_USB1_LOOPBACK_TSTPKT_SHIFT (16U) |
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#define | USBPHY_USB1_LOOPBACK_TSTPKT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTPKT_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_MASK (0x1U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_SHIFT (0U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_MASK (0x2U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_SHIFT (1U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_MASK (0x4U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_SHIFT (2U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_MASK (0x8U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_SHIFT (3U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_MASK (0x10U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_SHIFT (4U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_MASK (0x20U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_SHIFT (5U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_MASK (0x40U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_SHIFT (6U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_MASK (0x80U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_SHIFT (7U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_MASK (0x100U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_SHIFT (8U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_MASK (0x8000U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_SHIFT (15U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTPKT_MASK (0xFF0000U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTPKT_SHIFT (16U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTPKT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTPKT_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_MASK (0x1U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_SHIFT (0U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_MASK (0x2U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_SHIFT (1U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_MASK (0x4U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_SHIFT (2U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_MASK (0x8U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_SHIFT (3U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_MASK (0x10U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_SHIFT (4U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_MASK (0x20U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_SHIFT (5U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_MASK (0x40U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_SHIFT (6U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_MASK (0x80U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_SHIFT (7U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_MASK (0x100U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_SHIFT (8U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_MASK (0x8000U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_SHIFT (15U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTPKT_MASK (0xFF0000U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTPKT_SHIFT (16U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTPKT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTPKT_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_MASK (0x1U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_SHIFT (0U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_MASK (0x2U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_SHIFT (1U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_MASK (0x4U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_SHIFT (2U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_MASK (0x8U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_SHIFT (3U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_MASK (0x10U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_SHIFT (4U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_MASK (0x20U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_SHIFT (5U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_MASK (0x40U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_SHIFT (6U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_MASK (0x80U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_SHIFT (7U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_MASK (0x100U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_SHIFT (8U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_MASK (0x8000U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_SHIFT (15U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTPKT_MASK (0xFF0000U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTPKT_SHIFT (16U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTPKT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTPKT_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_MASK (0x1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_SHIFT (0U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK (0x2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT (1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_MASK (0x4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_SHIFT (2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_MASK (0x8U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_SHIFT (3U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DN_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DN_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DN_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DN_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DN_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_VBGADJ_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_TST_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_TST_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_TST_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_TST_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_TST_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_VBGADJ_MASK (0x1C00U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_VBGADJ_SHIFT (10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_VBGADJ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_VBGADJ_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_VBGADJ_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_TST_MASK (0x6000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_TST_SHIFT (13U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_TST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_TST_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_TST_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_MASK (0x38000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_SHIFT (15U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK (0xC0000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT (18U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_MASK (0xF00000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_SHIFT (20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_MASK (0xF000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_SHIFT (24U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DN_MASK (0xF0000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DN_SHIFT (28U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DN_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DN_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_MASK (0x1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_SHIFT (0U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK (0x2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT (1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_MASK (0x4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_SHIFT (2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_MASK (0x8U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_SHIFT (3U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DN_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DN_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DN_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DN_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DN_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_VBGADJ_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_TST_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_TST_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_TST_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_TST_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_TST_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_VBGADJ_MASK (0x1C00U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_VBGADJ_SHIFT (10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_VBGADJ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_VBGADJ_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_VBGADJ_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_TST_MASK (0x6000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_TST_SHIFT (13U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_TST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_TST_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_TST_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_MASK (0x38000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_SHIFT (15U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK (0xC0000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT (18U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_MASK (0xF00000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_SHIFT (20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_MASK (0xF000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_SHIFT (24U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DN_MASK (0xF0000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DN_SHIFT (28U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DN_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DN_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_MASK (0x1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_SHIFT (0U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK (0x2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT (1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_MASK (0x4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_SHIFT (2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_MASK (0x8U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_SHIFT (3U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DN_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DN_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DN_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DN_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DN_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_VBGADJ_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_TST_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_TST_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_TST_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_TST_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_TST_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_VBGADJ_MASK (0x1C00U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_VBGADJ_SHIFT (10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_VBGADJ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_VBGADJ_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_VBGADJ_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_TST_MASK (0x6000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_TST_SHIFT (13U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_TST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_TST_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_TST_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_MASK (0x38000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_SHIFT (15U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK (0xC0000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT (18U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_MASK (0xF00000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_SHIFT (20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_MASK (0xF000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_SHIFT (24U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DN_MASK (0xF0000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DN_SHIFT (28U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DN_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DN_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_MASK (0x1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_SHIFT (0U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK (0x2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT (1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_MASK (0x4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_SHIFT (2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_MASK (0x8U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_SHIFT (3U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DN_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DN_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DN_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DN_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DN_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_VBGADJ_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_TST_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_TST_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_TST_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_TST_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_TST_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_VBGADJ_MASK (0x1C00U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_VBGADJ_SHIFT (10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_VBGADJ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_VBGADJ_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_VBGADJ_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_TST_MASK (0x6000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_TST_SHIFT (13U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_TST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_TST_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_TST_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_MASK (0x38000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_SHIFT (15U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK (0xC0000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT (18U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_MASK (0xF00000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_SHIFT (20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_MASK (0xF000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_SHIFT (24U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DN_MASK (0xF0000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DN_SHIFT (28U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DN_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DN_MASK) |
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#define | USBPHY_CTRL_ENOTG_ID_CHG_IRQ_MASK (0x1U) |
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#define | USBPHY_CTRL_ENOTG_ID_CHG_IRQ_SHIFT (0U) |
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#define | USBPHY_CTRL_ENOTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_ENOTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_ENHOSTDISCONDETECT_MASK (0x2U) |
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#define | USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT (1U) |
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#define | USBPHY_CTRL_ENHOSTDISCONDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_ENHOSTDISCONDETECT_MASK) |
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#define | USBPHY_CTRL_ENIRQHOSTDISCON_MASK (0x4U) |
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#define | USBPHY_CTRL_ENIRQHOSTDISCON_SHIFT (2U) |
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#define | USBPHY_CTRL_ENIRQHOSTDISCON(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_ENIRQHOSTDISCON_MASK) |
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#define | USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK (0x8U) |
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#define | USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT (3U) |
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#define | USBPHY_CTRL_HOSTDISCONDETECT_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK) |
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#define | USBPHY_CTRL_ENDEVPLUGINDETECT_MASK (0x10U) |
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#define | USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT (4U) |
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#define | USBPHY_CTRL_ENDEVPLUGINDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_ENDEVPLUGINDETECT_MASK) |
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#define | USBPHY_CTRL_DEVPLUGIN_POLARITY_MASK (0x20U) |
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#define | USBPHY_CTRL_DEVPLUGIN_POLARITY_SHIFT (5U) |
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#define | USBPHY_CTRL_DEVPLUGIN_POLARITY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_POLARITY_MASK) |
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#define | USBPHY_CTRL_OTG_ID_CHG_IRQ_MASK (0x40U) |
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#define | USBPHY_CTRL_OTG_ID_CHG_IRQ_SHIFT (6U) |
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#define | USBPHY_CTRL_OTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_OTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_ENOTGIDDETECT_MASK (0x80U) |
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#define | USBPHY_CTRL_ENOTGIDDETECT_SHIFT (7U) |
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#define | USBPHY_CTRL_ENOTGIDDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_ENOTGIDDETECT_MASK) |
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#define | USBPHY_CTRL_RESUMEIRQSTICKY_MASK (0x100U) |
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#define | USBPHY_CTRL_RESUMEIRQSTICKY_SHIFT (8U) |
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#define | USBPHY_CTRL_RESUMEIRQSTICKY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_RESUMEIRQSTICKY_MASK) |
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#define | USBPHY_CTRL_ENIRQRESUMEDETECT_MASK (0x200U) |
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#define | USBPHY_CTRL_ENIRQRESUMEDETECT_SHIFT (9U) |
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#define | USBPHY_CTRL_ENIRQRESUMEDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_ENIRQRESUMEDETECT_MASK) |
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#define | USBPHY_CTRL_RESUME_IRQ_MASK (0x400U) |
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#define | USBPHY_CTRL_RESUME_IRQ_SHIFT (10U) |
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#define | USBPHY_CTRL_RESUME_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_RESUME_IRQ_MASK) |
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#define | USBPHY_CTRL_ENIRQDEVPLUGIN_MASK (0x800U) |
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#define | USBPHY_CTRL_ENIRQDEVPLUGIN_SHIFT (11U) |
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#define | USBPHY_CTRL_ENIRQDEVPLUGIN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_ENIRQDEVPLUGIN_MASK) |
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#define | USBPHY_CTRL_DEVPLUGIN_IRQ_MASK (0x1000U) |
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#define | USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT (12U) |
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#define | USBPHY_CTRL_DEVPLUGIN_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_IRQ_MASK) |
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#define | USBPHY_CTRL_ENUTMILEVEL2_MASK (0x4000U) |
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#define | USBPHY_CTRL_ENUTMILEVEL2_SHIFT (14U) |
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#define | USBPHY_CTRL_ENUTMILEVEL2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL2_MASK) |
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#define | USBPHY_CTRL_ENUTMILEVEL3_MASK (0x8000U) |
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#define | USBPHY_CTRL_ENUTMILEVEL3_SHIFT (15U) |
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#define | USBPHY_CTRL_ENUTMILEVEL3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL3_MASK) |
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#define | USBPHY_CTRL_ENIRQWAKEUP_MASK (0x10000U) |
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#define | USBPHY_CTRL_ENIRQWAKEUP_SHIFT (16U) |
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#define | USBPHY_CTRL_ENIRQWAKEUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_ENIRQWAKEUP_MASK) |
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#define | USBPHY_CTRL_WAKEUP_IRQ_MASK (0x20000U) |
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#define | USBPHY_CTRL_WAKEUP_IRQ_SHIFT (17U) |
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#define | USBPHY_CTRL_WAKEUP_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_WAKEUP_IRQ_MASK) |
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#define | USBPHY_CTRL_AUTORESUME_EN_MASK (0x40000U) |
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#define | USBPHY_CTRL_AUTORESUME_EN_SHIFT (18U) |
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#define | USBPHY_CTRL_AUTORESUME_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_AUTORESUME_EN_MASK) |
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#define | USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK (0x80000U) |
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#define | USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT (19U) |
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#define | USBPHY_CTRL_ENAUTOCLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK (0x100000U) |
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#define | USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT (20U) |
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#define | USBPHY_CTRL_ENAUTOCLR_PHY_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK) |
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#define | USBPHY_CTRL_ENDPDMCHG_WKUP_MASK (0x200000U) |
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#define | USBPHY_CTRL_ENDPDMCHG_WKUP_SHIFT (21U) |
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#define | USBPHY_CTRL_ENDPDMCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENDPDMCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_ENIDCHG_WKUP_MASK (0x400000U) |
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#define | USBPHY_CTRL_ENIDCHG_WKUP_SHIFT (22U) |
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#define | USBPHY_CTRL_ENIDCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENIDCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_ENVBUSCHG_WKUP_MASK (0x800000U) |
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#define | USBPHY_CTRL_ENVBUSCHG_WKUP_SHIFT (23U) |
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#define | USBPHY_CTRL_ENVBUSCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENVBUSCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_FSDLL_RST_EN_MASK (0x1000000U) |
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#define | USBPHY_CTRL_FSDLL_RST_EN_SHIFT (24U) |
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#define | USBPHY_CTRL_FSDLL_RST_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_FSDLL_RST_EN_MASK) |
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#define | USBPHY_CTRL_OTG_ID_VALUE_MASK (0x8000000U) |
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#define | USBPHY_CTRL_OTG_ID_VALUE_SHIFT (27U) |
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#define | USBPHY_CTRL_OTG_ID_VALUE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_OTG_ID_VALUE_MASK) |
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#define | USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK (0x10000000U) |
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#define | USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT (28U) |
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#define | USBPHY_CTRL_HOST_FORCE_LS_SE0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK) |
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#define | USBPHY_CTRL_UTMI_SUSPENDM_MASK (0x20000000U) |
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#define | USBPHY_CTRL_UTMI_SUSPENDM_SHIFT (29U) |
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#define | USBPHY_CTRL_UTMI_SUSPENDM(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_UTMI_SUSPENDM_MASK) |
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#define | USBPHY_CTRL_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_CTRL_CLKGATE_SHIFT (30U) |
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#define | USBPHY_CTRL_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLKGATE_SHIFT)) & USBPHY_CTRL_CLKGATE_MASK) |
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#define | USBPHY_CTRL_SFTRST_MASK (0x80000000U) |
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#define | USBPHY_CTRL_SFTRST_SHIFT (31U) |
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#define | USBPHY_CTRL_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SFTRST_SHIFT)) & USBPHY_CTRL_SFTRST_MASK) |
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#define | USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_MASK (0x1U) |
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#define | USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_SHIFT (0U) |
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#define | USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK (0x2U) |
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#define | USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT (1U) |
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#define | USBPHY_CTRL_SET_ENHOSTDISCONDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK) |
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#define | USBPHY_CTRL_SET_ENIRQHOSTDISCON_MASK (0x4U) |
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#define | USBPHY_CTRL_SET_ENIRQHOSTDISCON_SHIFT (2U) |
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#define | USBPHY_CTRL_SET_ENIRQHOSTDISCON(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_SET_ENIRQHOSTDISCON_MASK) |
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#define | USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK (0x8U) |
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#define | USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT (3U) |
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#define | USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENDEVPLUGINDETECT_MASK (0x10U) |
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#define | USBPHY_CTRL_SET_ENDEVPLUGINDETECT_SHIFT (4U) |
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#define | USBPHY_CTRL_SET_ENDEVPLUGINDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_SET_ENDEVPLUGINDETECT_MASK) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_MASK (0x20U) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_SHIFT (5U) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_POLARITY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_MASK) |
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#define | USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_MASK (0x40U) |
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#define | USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_SHIFT (6U) |
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#define | USBPHY_CTRL_SET_OTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENOTGIDDETECT_MASK (0x80U) |
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#define | USBPHY_CTRL_SET_ENOTGIDDETECT_SHIFT (7U) |
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#define | USBPHY_CTRL_SET_ENOTGIDDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_SET_ENOTGIDDETECT_MASK) |
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#define | USBPHY_CTRL_SET_RESUMEIRQSTICKY_MASK (0x100U) |
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#define | USBPHY_CTRL_SET_RESUMEIRQSTICKY_SHIFT (8U) |
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#define | USBPHY_CTRL_SET_RESUMEIRQSTICKY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_SET_RESUMEIRQSTICKY_MASK) |
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#define | USBPHY_CTRL_SET_ENIRQRESUMEDETECT_MASK (0x200U) |
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#define | USBPHY_CTRL_SET_ENIRQRESUMEDETECT_SHIFT (9U) |
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#define | USBPHY_CTRL_SET_ENIRQRESUMEDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_SET_ENIRQRESUMEDETECT_MASK) |
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#define | USBPHY_CTRL_SET_RESUME_IRQ_MASK (0x400U) |
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#define | USBPHY_CTRL_SET_RESUME_IRQ_SHIFT (10U) |
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#define | USBPHY_CTRL_SET_RESUME_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_SET_RESUME_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENIRQDEVPLUGIN_MASK (0x800U) |
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#define | USBPHY_CTRL_SET_ENIRQDEVPLUGIN_SHIFT (11U) |
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#define | USBPHY_CTRL_SET_ENIRQDEVPLUGIN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_SET_ENIRQDEVPLUGIN_MASK) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK (0x1000U) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT (12U) |
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#define | USBPHY_CTRL_SET_DEVPLUGIN_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL2_MASK (0x4000U) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT (14U) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL2_MASK) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK (0x8000U) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT (15U) |
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#define | USBPHY_CTRL_SET_ENUTMILEVEL3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL3_MASK) |
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#define | USBPHY_CTRL_SET_ENIRQWAKEUP_MASK (0x10000U) |
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#define | USBPHY_CTRL_SET_ENIRQWAKEUP_SHIFT (16U) |
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#define | USBPHY_CTRL_SET_ENIRQWAKEUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_SET_ENIRQWAKEUP_MASK) |
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#define | USBPHY_CTRL_SET_WAKEUP_IRQ_MASK (0x20000U) |
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#define | USBPHY_CTRL_SET_WAKEUP_IRQ_SHIFT (17U) |
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#define | USBPHY_CTRL_SET_WAKEUP_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_SET_WAKEUP_IRQ_MASK) |
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#define | USBPHY_CTRL_SET_AUTORESUME_EN_MASK (0x40000U) |
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#define | USBPHY_CTRL_SET_AUTORESUME_EN_SHIFT (18U) |
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#define | USBPHY_CTRL_SET_AUTORESUME_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_SET_AUTORESUME_EN_MASK) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK (0x80000U) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT (19U) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK (0x100000U) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT (20U) |
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#define | USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK) |
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#define | USBPHY_CTRL_SET_ENDPDMCHG_WKUP_MASK (0x200000U) |
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#define | USBPHY_CTRL_SET_ENDPDMCHG_WKUP_SHIFT (21U) |
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#define | USBPHY_CTRL_SET_ENDPDMCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENDPDMCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_SET_ENIDCHG_WKUP_MASK (0x400000U) |
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#define | USBPHY_CTRL_SET_ENIDCHG_WKUP_SHIFT (22U) |
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#define | USBPHY_CTRL_SET_ENIDCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENIDCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_SET_ENVBUSCHG_WKUP_MASK (0x800000U) |
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#define | USBPHY_CTRL_SET_ENVBUSCHG_WKUP_SHIFT (23U) |
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#define | USBPHY_CTRL_SET_ENVBUSCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENVBUSCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_SET_FSDLL_RST_EN_MASK (0x1000000U) |
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#define | USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT (24U) |
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#define | USBPHY_CTRL_SET_FSDLL_RST_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_SET_FSDLL_RST_EN_MASK) |
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#define | USBPHY_CTRL_SET_OTG_ID_VALUE_MASK (0x8000000U) |
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#define | USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT (27U) |
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#define | USBPHY_CTRL_SET_OTG_ID_VALUE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_VALUE_MASK) |
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#define | USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK (0x10000000U) |
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#define | USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT (28U) |
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#define | USBPHY_CTRL_SET_HOST_FORCE_LS_SE0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK) |
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#define | USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK (0x20000000U) |
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#define | USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT (29U) |
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#define | USBPHY_CTRL_SET_UTMI_SUSPENDM(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK) |
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#define | USBPHY_CTRL_SET_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_CTRL_SET_CLKGATE_SHIFT (30U) |
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#define | USBPHY_CTRL_SET_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_CLKGATE_MASK) |
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#define | USBPHY_CTRL_SET_SFTRST_MASK (0x80000000U) |
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#define | USBPHY_CTRL_SET_SFTRST_SHIFT (31U) |
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#define | USBPHY_CTRL_SET_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_SFTRST_SHIFT)) & USBPHY_CTRL_SET_SFTRST_MASK) |
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#define | USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_MASK (0x1U) |
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#define | USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_SHIFT (0U) |
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#define | USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK (0x2U) |
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#define | USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT (1U) |
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#define | USBPHY_CTRL_CLR_ENHOSTDISCONDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK) |
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#define | USBPHY_CTRL_CLR_ENIRQHOSTDISCON_MASK (0x4U) |
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#define | USBPHY_CTRL_CLR_ENIRQHOSTDISCON_SHIFT (2U) |
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#define | USBPHY_CTRL_CLR_ENIRQHOSTDISCON(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_CLR_ENIRQHOSTDISCON_MASK) |
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#define | USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK (0x8U) |
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#define | USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT (3U) |
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#define | USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_MASK (0x10U) |
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#define | USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_SHIFT (4U) |
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#define | USBPHY_CTRL_CLR_ENDEVPLUGINDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_MASK) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_MASK (0x20U) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_SHIFT (5U) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_MASK) |
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#define | USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_MASK (0x40U) |
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#define | USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_SHIFT (6U) |
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#define | USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENOTGIDDETECT_MASK (0x80U) |
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#define | USBPHY_CTRL_CLR_ENOTGIDDETECT_SHIFT (7U) |
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#define | USBPHY_CTRL_CLR_ENOTGIDDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENOTGIDDETECT_MASK) |
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#define | USBPHY_CTRL_CLR_RESUMEIRQSTICKY_MASK (0x100U) |
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#define | USBPHY_CTRL_CLR_RESUMEIRQSTICKY_SHIFT (8U) |
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#define | USBPHY_CTRL_CLR_RESUMEIRQSTICKY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_CLR_RESUMEIRQSTICKY_MASK) |
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#define | USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_MASK (0x200U) |
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#define | USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_SHIFT (9U) |
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#define | USBPHY_CTRL_CLR_ENIRQRESUMEDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_MASK) |
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#define | USBPHY_CTRL_CLR_RESUME_IRQ_MASK (0x400U) |
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#define | USBPHY_CTRL_CLR_RESUME_IRQ_SHIFT (10U) |
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#define | USBPHY_CTRL_CLR_RESUME_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_CLR_RESUME_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_MASK (0x800U) |
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#define | USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_SHIFT (11U) |
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#define | USBPHY_CTRL_CLR_ENIRQDEVPLUGIN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_MASK) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK (0x1000U) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT (12U) |
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#define | USBPHY_CTRL_CLR_DEVPLUGIN_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK (0x4000U) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT (14U) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK (0x8000U) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT (15U) |
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#define | USBPHY_CTRL_CLR_ENUTMILEVEL3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK) |
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#define | USBPHY_CTRL_CLR_ENIRQWAKEUP_MASK (0x10000U) |
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#define | USBPHY_CTRL_CLR_ENIRQWAKEUP_SHIFT (16U) |
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#define | USBPHY_CTRL_CLR_ENIRQWAKEUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_CLR_ENIRQWAKEUP_MASK) |
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#define | USBPHY_CTRL_CLR_WAKEUP_IRQ_MASK (0x20000U) |
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#define | USBPHY_CTRL_CLR_WAKEUP_IRQ_SHIFT (17U) |
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#define | USBPHY_CTRL_CLR_WAKEUP_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_CLR_WAKEUP_IRQ_MASK) |
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#define | USBPHY_CTRL_CLR_AUTORESUME_EN_MASK (0x40000U) |
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#define | USBPHY_CTRL_CLR_AUTORESUME_EN_SHIFT (18U) |
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#define | USBPHY_CTRL_CLR_AUTORESUME_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_CLR_AUTORESUME_EN_MASK) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK (0x80000U) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT (19U) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK (0x100000U) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT (20U) |
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#define | USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK) |
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#define | USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_MASK (0x200000U) |
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#define | USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_SHIFT (21U) |
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#define | USBPHY_CTRL_CLR_ENDPDMCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_CLR_ENIDCHG_WKUP_MASK (0x400000U) |
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#define | USBPHY_CTRL_CLR_ENIDCHG_WKUP_SHIFT (22U) |
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#define | USBPHY_CTRL_CLR_ENIDCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENIDCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_MASK (0x800000U) |
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#define | USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_SHIFT (23U) |
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#define | USBPHY_CTRL_CLR_ENVBUSCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK (0x1000000U) |
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#define | USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT (24U) |
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#define | USBPHY_CTRL_CLR_FSDLL_RST_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK) |
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#define | USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK (0x8000000U) |
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#define | USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT (27U) |
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#define | USBPHY_CTRL_CLR_OTG_ID_VALUE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK) |
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#define | USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK (0x10000000U) |
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#define | USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT (28U) |
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#define | USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK) |
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#define | USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK (0x20000000U) |
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#define | USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT (29U) |
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#define | USBPHY_CTRL_CLR_UTMI_SUSPENDM(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK) |
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#define | USBPHY_CTRL_CLR_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_CTRL_CLR_CLKGATE_SHIFT (30U) |
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#define | USBPHY_CTRL_CLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_CLR_SFTRST_MASK (0x80000000U) |
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#define | USBPHY_CTRL_CLR_SFTRST_SHIFT (31U) |
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#define | USBPHY_CTRL_CLR_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_SFTRST_SHIFT)) & USBPHY_CTRL_CLR_SFTRST_MASK) |
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#define | USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_MASK (0x1U) |
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#define | USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_SHIFT (0U) |
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#define | USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK (0x2U) |
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#define | USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT (1U) |
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#define | USBPHY_CTRL_TOG_ENHOSTDISCONDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK) |
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#define | USBPHY_CTRL_TOG_ENIRQHOSTDISCON_MASK (0x4U) |
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#define | USBPHY_CTRL_TOG_ENIRQHOSTDISCON_SHIFT (2U) |
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#define | USBPHY_CTRL_TOG_ENIRQHOSTDISCON(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_TOG_ENIRQHOSTDISCON_MASK) |
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#define | USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK (0x8U) |
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#define | USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT (3U) |
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#define | USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_MASK (0x10U) |
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#define | USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_SHIFT (4U) |
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#define | USBPHY_CTRL_TOG_ENDEVPLUGINDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_MASK) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_MASK (0x20U) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_SHIFT (5U) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_MASK) |
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#define | USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_MASK (0x40U) |
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#define | USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_SHIFT (6U) |
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#define | USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENOTGIDDETECT_MASK (0x80U) |
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#define | USBPHY_CTRL_TOG_ENOTGIDDETECT_SHIFT (7U) |
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#define | USBPHY_CTRL_TOG_ENOTGIDDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENOTGIDDETECT_MASK) |
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#define | USBPHY_CTRL_TOG_RESUMEIRQSTICKY_MASK (0x100U) |
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#define | USBPHY_CTRL_TOG_RESUMEIRQSTICKY_SHIFT (8U) |
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#define | USBPHY_CTRL_TOG_RESUMEIRQSTICKY(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_TOG_RESUMEIRQSTICKY_MASK) |
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#define | USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_MASK (0x200U) |
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#define | USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_SHIFT (9U) |
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#define | USBPHY_CTRL_TOG_ENIRQRESUMEDETECT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_MASK) |
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#define | USBPHY_CTRL_TOG_RESUME_IRQ_MASK (0x400U) |
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#define | USBPHY_CTRL_TOG_RESUME_IRQ_SHIFT (10U) |
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#define | USBPHY_CTRL_TOG_RESUME_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_TOG_RESUME_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_MASK (0x800U) |
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#define | USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_SHIFT (11U) |
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#define | USBPHY_CTRL_TOG_ENIRQDEVPLUGIN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_MASK) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK (0x1000U) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT (12U) |
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#define | USBPHY_CTRL_TOG_DEVPLUGIN_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK (0x4000U) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT (14U) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL2(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK (0x8000U) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT (15U) |
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#define | USBPHY_CTRL_TOG_ENUTMILEVEL3(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK) |
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#define | USBPHY_CTRL_TOG_ENIRQWAKEUP_MASK (0x10000U) |
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#define | USBPHY_CTRL_TOG_ENIRQWAKEUP_SHIFT (16U) |
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#define | USBPHY_CTRL_TOG_ENIRQWAKEUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_TOG_ENIRQWAKEUP_MASK) |
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#define | USBPHY_CTRL_TOG_WAKEUP_IRQ_MASK (0x20000U) |
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#define | USBPHY_CTRL_TOG_WAKEUP_IRQ_SHIFT (17U) |
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#define | USBPHY_CTRL_TOG_WAKEUP_IRQ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_TOG_WAKEUP_IRQ_MASK) |
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#define | USBPHY_CTRL_TOG_AUTORESUME_EN_MASK (0x40000U) |
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#define | USBPHY_CTRL_TOG_AUTORESUME_EN_SHIFT (18U) |
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#define | USBPHY_CTRL_TOG_AUTORESUME_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_TOG_AUTORESUME_EN_MASK) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK (0x80000U) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT (19U) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK (0x100000U) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT (20U) |
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#define | USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK) |
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#define | USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_MASK (0x200000U) |
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#define | USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_SHIFT (21U) |
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#define | USBPHY_CTRL_TOG_ENDPDMCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_TOG_ENIDCHG_WKUP_MASK (0x400000U) |
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#define | USBPHY_CTRL_TOG_ENIDCHG_WKUP_SHIFT (22U) |
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#define | USBPHY_CTRL_TOG_ENIDCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENIDCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_MASK (0x800000U) |
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#define | USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_SHIFT (23U) |
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#define | USBPHY_CTRL_TOG_ENVBUSCHG_WKUP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_MASK) |
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#define | USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK (0x1000000U) |
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#define | USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT (24U) |
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#define | USBPHY_CTRL_TOG_FSDLL_RST_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK) |
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#define | USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK (0x8000000U) |
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#define | USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT (27U) |
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#define | USBPHY_CTRL_TOG_OTG_ID_VALUE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK) |
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#define | USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK (0x10000000U) |
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#define | USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT (28U) |
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#define | USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK) |
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#define | USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK (0x20000000U) |
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#define | USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT (29U) |
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#define | USBPHY_CTRL_TOG_UTMI_SUSPENDM(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK) |
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#define | USBPHY_CTRL_TOG_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_CTRL_TOG_CLKGATE_SHIFT (30U) |
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#define | USBPHY_CTRL_TOG_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_CLKGATE_MASK) |
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#define | USBPHY_CTRL_TOG_SFTRST_MASK (0x80000000U) |
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#define | USBPHY_CTRL_TOG_SFTRST_SHIFT (31U) |
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#define | USBPHY_CTRL_TOG_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_SFTRST_SHIFT)) & USBPHY_CTRL_TOG_SFTRST_MASK) |
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#define | USBPHY_DEBUG_OTGIDPIOLOCK_MASK (0x1U) |
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#define | USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT (0U) |
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#define | USBPHY_DEBUG_OTGIDPIOLOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_OTGIDPIOLOCK_MASK) |
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#define | USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK (0x2U) |
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#define | USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT (1U) |
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#define | USBPHY_DEBUG_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK) |
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#define | USBPHY_DEBUG_HSTPULLDOWN_MASK (0xCU) |
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#define | USBPHY_DEBUG_HSTPULLDOWN_SHIFT (2U) |
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#define | USBPHY_DEBUG_HSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_HSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_ENHSTPULLDOWN_MASK (0x30U) |
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#define | USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT (4U) |
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#define | USBPHY_DEBUG_ENHSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_ENHSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_TX2RXCOUNT_MASK (0xF00U) |
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#define | USBPHY_DEBUG_TX2RXCOUNT_SHIFT (8U) |
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#define | USBPHY_DEBUG_TX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_ENTX2RXCOUNT_MASK (0x1000U) |
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#define | USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT (12U) |
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#define | USBPHY_DEBUG_ENTX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_ENTX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK (0x1F0000U) |
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#define | USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT (16U) |
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#define | USBPHY_DEBUG_SQUELCHRESETCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK) |
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#define | USBPHY_DEBUG_ENSQUELCHRESET_MASK (0x1000000U) |
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#define | USBPHY_DEBUG_ENSQUELCHRESET_SHIFT (24U) |
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#define | USBPHY_DEBUG_ENSQUELCHRESET(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_ENSQUELCHRESET_MASK) |
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#define | USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK (0x1E000000U) |
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#define | USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT (25U) |
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#define | USBPHY_DEBUG_SQUELCHRESETLENGTH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK) |
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#define | USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK (0x20000000U) |
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#define | USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT (29U) |
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#define | USBPHY_DEBUG_HOST_RESUME_DEBUG(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK) |
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#define | USBPHY_DEBUG_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_DEBUG_CLKGATE_SHIFT (30U) |
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#define | USBPHY_DEBUG_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLKGATE_MASK) |
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#define | USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK (0x1U) |
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#define | USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT (0U) |
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#define | USBPHY_DEBUG_SET_OTGIDPIOLOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK) |
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#define | USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK (0x2U) |
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#define | USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT (1U) |
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#define | USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK) |
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#define | USBPHY_DEBUG_SET_HSTPULLDOWN_MASK (0xCU) |
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#define | USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT (2U) |
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#define | USBPHY_DEBUG_SET_HSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_HSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK (0x30U) |
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#define | USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT (4U) |
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#define | USBPHY_DEBUG_SET_ENHSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_SET_TX2RXCOUNT_MASK (0xF00U) |
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#define | USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT (8U) |
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#define | USBPHY_DEBUG_SET_TX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_TX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK (0x1000U) |
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#define | USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT (12U) |
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#define | USBPHY_DEBUG_SET_ENTX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK (0x1F0000U) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT (16U) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK) |
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#define | USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK (0x1000000U) |
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#define | USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT (24U) |
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#define | USBPHY_DEBUG_SET_ENSQUELCHRESET(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK (0x1E000000U) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT (25U) |
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#define | USBPHY_DEBUG_SET_SQUELCHRESETLENGTH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK) |
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#define | USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK (0x20000000U) |
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#define | USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT (29U) |
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#define | USBPHY_DEBUG_SET_HOST_RESUME_DEBUG(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK) |
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#define | USBPHY_DEBUG_SET_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_DEBUG_SET_CLKGATE_SHIFT (30U) |
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#define | USBPHY_DEBUG_SET_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_CLKGATE_SHIFT)) & USBPHY_DEBUG_SET_CLKGATE_MASK) |
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#define | USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK (0x1U) |
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#define | USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT (0U) |
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#define | USBPHY_DEBUG_CLR_OTGIDPIOLOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK) |
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#define | USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK (0x2U) |
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#define | USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT (1U) |
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#define | USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK) |
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#define | USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK (0xCU) |
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#define | USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT (2U) |
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#define | USBPHY_DEBUG_CLR_HSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK (0x30U) |
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#define | USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT (4U) |
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#define | USBPHY_DEBUG_CLR_ENHSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK (0xF00U) |
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#define | USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT (8U) |
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#define | USBPHY_DEBUG_CLR_TX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK (0x1000U) |
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#define | USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT (12U) |
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#define | USBPHY_DEBUG_CLR_ENTX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT (16U) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK) |
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#define | USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) |
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#define | USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT (24U) |
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#define | USBPHY_DEBUG_CLR_ENSQUELCHRESET(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK (0x1E000000U) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT (25U) |
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#define | USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK) |
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#define | USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK (0x20000000U) |
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#define | USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT (29U) |
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#define | USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK) |
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#define | USBPHY_DEBUG_CLR_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_DEBUG_CLR_CLKGATE_SHIFT (30U) |
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#define | USBPHY_DEBUG_CLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLR_CLKGATE_MASK) |
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#define | USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK (0x1U) |
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#define | USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT (0U) |
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#define | USBPHY_DEBUG_TOG_OTGIDPIOLOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK) |
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#define | USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK (0x2U) |
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#define | USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT (1U) |
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#define | USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK) |
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#define | USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK (0xCU) |
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#define | USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT (2U) |
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#define | USBPHY_DEBUG_TOG_HSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK (0x30U) |
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#define | USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT (4U) |
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#define | USBPHY_DEBUG_TOG_ENHSTPULLDOWN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK) |
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#define | USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK (0xF00U) |
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#define | USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT (8U) |
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#define | USBPHY_DEBUG_TOG_TX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK (0x1000U) |
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#define | USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT (12U) |
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#define | USBPHY_DEBUG_TOG_ENTX2RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK (0x1F0000U) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT (16U) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK) |
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#define | USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK (0x1000000U) |
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#define | USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT (24U) |
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#define | USBPHY_DEBUG_TOG_ENSQUELCHRESET(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK (0x1E000000U) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT (25U) |
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#define | USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK) |
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#define | USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK (0x20000000U) |
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#define | USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT (29U) |
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#define | USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK) |
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#define | USBPHY_DEBUG_TOG_CLKGATE_MASK (0x40000000U) |
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#define | USBPHY_DEBUG_TOG_CLKGATE_SHIFT (30U) |
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#define | USBPHY_DEBUG_TOG_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_CLKGATE_SHIFT)) & USBPHY_DEBUG_TOG_CLKGATE_MASK) |
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#define | USBPHY_PLL_SIC_PLL_POSTDIV_MASK (0x1CU) |
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#define | USBPHY_PLL_SIC_PLL_POSTDIV_SHIFT (2U) |
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#define | USBPHY_PLL_SIC_PLL_POSTDIV(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_POSTDIV_SHIFT)) & USBPHY_PLL_SIC_PLL_POSTDIV_MASK) |
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#define | USBPHY_PLL_SIC_PLL_EN_USB_CLKS_MASK (0x40U) |
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#define | USBPHY_PLL_SIC_PLL_EN_USB_CLKS_SHIFT (6U) |
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#define | USBPHY_PLL_SIC_PLL_EN_USB_CLKS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_PLL_EN_USB_CLKS_MASK) |
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#define | USBPHY_PLL_SIC_PLL_POWER_MASK (0x1000U) |
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#define | USBPHY_PLL_SIC_PLL_POWER_SHIFT (12U) |
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#define | USBPHY_PLL_SIC_PLL_POWER(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_PLL_POWER_MASK) |
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#define | USBPHY_PLL_SIC_PLL_ENABLE_MASK (0x2000U) |
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#define | USBPHY_PLL_SIC_PLL_ENABLE_SHIFT (13U) |
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#define | USBPHY_PLL_SIC_PLL_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_PLL_BYPASS_MASK (0x10000U) |
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#define | USBPHY_PLL_SIC_PLL_BYPASS_SHIFT (16U) |
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#define | USBPHY_PLL_SIC_PLL_BYPASS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_PLL_BYPASS_MASK) |
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#define | USBPHY_PLL_SIC_REFBIAS_PWD_SEL_MASK (0x80000U) |
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#define | USBPHY_PLL_SIC_REFBIAS_PWD_SEL_SHIFT (19U) |
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#define | USBPHY_PLL_SIC_REFBIAS_PWD_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_REFBIAS_PWD_SEL_SHIFT)) & USBPHY_PLL_SIC_REFBIAS_PWD_SEL_MASK) |
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#define | USBPHY_PLL_SIC_REFBIAS_PWD_MASK (0x100000U) |
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#define | USBPHY_PLL_SIC_REFBIAS_PWD_SHIFT (20U) |
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#define | USBPHY_PLL_SIC_REFBIAS_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_REFBIAS_PWD_SHIFT)) & USBPHY_PLL_SIC_REFBIAS_PWD_MASK) |
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#define | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) |
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#define | USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT (21U) |
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#define | USBPHY_PLL_SIC_PLL_REG_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_PLL_DIV_SEL_MASK (0x1C00000U) |
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#define | USBPHY_PLL_SIC_PLL_DIV_SEL_SHIFT (22U) |
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#define | USBPHY_PLL_SIC_PLL_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_PLL_DIV_SEL_MASK) |
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#define | USBPHY_PLL_SIC_PLL_LOCK_MASK (0x80000000U) |
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#define | USBPHY_PLL_SIC_PLL_LOCK_SHIFT (31U) |
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#define | USBPHY_PLL_SIC_PLL_LOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_PLL_LOCK_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_POSTDIV_MASK (0x1CU) |
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#define | USBPHY_PLL_SIC_SET_PLL_POSTDIV_SHIFT (2U) |
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#define | USBPHY_PLL_SIC_SET_PLL_POSTDIV(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_POSTDIV_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_POSTDIV_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_MASK (0x40U) |
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#define | USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_SHIFT (6U) |
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#define | USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_POWER_MASK (0x1000U) |
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#define | USBPHY_PLL_SIC_SET_PLL_POWER_SHIFT (12U) |
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#define | USBPHY_PLL_SIC_SET_PLL_POWER(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_POWER_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_ENABLE_MASK (0x2000U) |
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#define | USBPHY_PLL_SIC_SET_PLL_ENABLE_SHIFT (13U) |
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#define | USBPHY_PLL_SIC_SET_PLL_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_BYPASS_MASK (0x10000U) |
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#define | USBPHY_PLL_SIC_SET_PLL_BYPASS_SHIFT (16U) |
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#define | USBPHY_PLL_SIC_SET_PLL_BYPASS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_BYPASS_MASK) |
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#define | USBPHY_PLL_SIC_SET_REFBIAS_PWD_SEL_MASK (0x80000U) |
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#define | USBPHY_PLL_SIC_SET_REFBIAS_PWD_SEL_SHIFT (19U) |
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#define | USBPHY_PLL_SIC_SET_REFBIAS_PWD_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_REFBIAS_PWD_SEL_SHIFT)) & USBPHY_PLL_SIC_SET_REFBIAS_PWD_SEL_MASK) |
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#define | USBPHY_PLL_SIC_SET_REFBIAS_PWD_MASK (0x100000U) |
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#define | USBPHY_PLL_SIC_SET_REFBIAS_PWD_SHIFT (20U) |
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#define | USBPHY_PLL_SIC_SET_REFBIAS_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_REFBIAS_PWD_SHIFT)) & USBPHY_PLL_SIC_SET_REFBIAS_PWD_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_REG_ENABLE_MASK (0x200000U) |
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#define | USBPHY_PLL_SIC_SET_PLL_REG_ENABLE_SHIFT (21U) |
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#define | USBPHY_PLL_SIC_SET_PLL_REG_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_REG_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_DIV_SEL_MASK (0x1C00000U) |
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#define | USBPHY_PLL_SIC_SET_PLL_DIV_SEL_SHIFT (22U) |
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#define | USBPHY_PLL_SIC_SET_PLL_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_DIV_SEL_MASK) |
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#define | USBPHY_PLL_SIC_SET_PLL_LOCK_MASK (0x80000000U) |
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#define | USBPHY_PLL_SIC_SET_PLL_LOCK_SHIFT (31U) |
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#define | USBPHY_PLL_SIC_SET_PLL_LOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_LOCK_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_POSTDIV_MASK (0x1CU) |
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#define | USBPHY_PLL_SIC_CLR_PLL_POSTDIV_SHIFT (2U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_POSTDIV(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_POSTDIV_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_POSTDIV_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_MASK (0x40U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_SHIFT (6U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_POWER_MASK (0x1000U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_POWER_SHIFT (12U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_POWER(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_POWER_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_ENABLE_MASK (0x2000U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_ENABLE_SHIFT (13U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_BYPASS_MASK (0x10000U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_BYPASS_SHIFT (16U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_BYPASS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_BYPASS_MASK) |
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#define | USBPHY_PLL_SIC_CLR_REFBIAS_PWD_SEL_MASK (0x80000U) |
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#define | USBPHY_PLL_SIC_CLR_REFBIAS_PWD_SEL_SHIFT (19U) |
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#define | USBPHY_PLL_SIC_CLR_REFBIAS_PWD_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_REFBIAS_PWD_SEL_SHIFT)) & USBPHY_PLL_SIC_CLR_REFBIAS_PWD_SEL_MASK) |
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#define | USBPHY_PLL_SIC_CLR_REFBIAS_PWD_MASK (0x100000U) |
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#define | USBPHY_PLL_SIC_CLR_REFBIAS_PWD_SHIFT (20U) |
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#define | USBPHY_PLL_SIC_CLR_REFBIAS_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_REFBIAS_PWD_SHIFT)) & USBPHY_PLL_SIC_CLR_REFBIAS_PWD_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_REG_ENABLE_MASK (0x200000U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_REG_ENABLE_SHIFT (21U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_REG_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_REG_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_MASK (0x1C00000U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_SHIFT (22U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_MASK) |
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#define | USBPHY_PLL_SIC_CLR_PLL_LOCK_MASK (0x80000000U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_LOCK_SHIFT (31U) |
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#define | USBPHY_PLL_SIC_CLR_PLL_LOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_LOCK_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_POSTDIV_MASK (0x1CU) |
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#define | USBPHY_PLL_SIC_TOG_PLL_POSTDIV_SHIFT (2U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_POSTDIV(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_POSTDIV_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_POSTDIV_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_MASK (0x40U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_SHIFT (6U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_POWER_MASK (0x1000U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_POWER_SHIFT (12U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_POWER(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_POWER_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_ENABLE_MASK (0x2000U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_ENABLE_SHIFT (13U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_BYPASS_MASK (0x10000U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_BYPASS_SHIFT (16U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_BYPASS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_BYPASS_MASK) |
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#define | USBPHY_PLL_SIC_TOG_REFBIAS_PWD_SEL_MASK (0x80000U) |
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#define | USBPHY_PLL_SIC_TOG_REFBIAS_PWD_SEL_SHIFT (19U) |
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#define | USBPHY_PLL_SIC_TOG_REFBIAS_PWD_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_REFBIAS_PWD_SEL_SHIFT)) & USBPHY_PLL_SIC_TOG_REFBIAS_PWD_SEL_MASK) |
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#define | USBPHY_PLL_SIC_TOG_REFBIAS_PWD_MASK (0x100000U) |
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#define | USBPHY_PLL_SIC_TOG_REFBIAS_PWD_SHIFT (20U) |
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#define | USBPHY_PLL_SIC_TOG_REFBIAS_PWD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_REFBIAS_PWD_SHIFT)) & USBPHY_PLL_SIC_TOG_REFBIAS_PWD_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_REG_ENABLE_MASK (0x200000U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_REG_ENABLE_SHIFT (21U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_REG_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_REG_ENABLE_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_MASK (0x1C00000U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_SHIFT (22U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_MASK) |
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#define | USBPHY_PLL_SIC_TOG_PLL_LOCK_MASK (0x80000000U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_LOCK_SHIFT (31U) |
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#define | USBPHY_PLL_SIC_TOG_PLL_LOCK(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_LOCK_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_MASK (0x7U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_SHIFT (0U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_MASK (0x8U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_SHIFT (3U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_MASK (0x80U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_SHIFT (7U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_MASK (0x100U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_SHIFT (8U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_MASK (0x600U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_SHIFT (9U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_EN_MASK (0x800U) |
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#define | USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_EN_SHIFT (11U) |
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#define | USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_MASK (0x1000U) |
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#define | USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_SHIFT (12U) |
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#define | USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_ID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_MASK (0x40000U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_SHIFT (18U) |
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#define | USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_MASK (0x700000U) |
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#define | USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_SHIFT (20U) |
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#define | USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_MASK (0x4000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_SHIFT (26U) |
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#define | USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_MASK (0x80000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_SHIFT (31U) |
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#define | USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK (0x7U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT (0U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_MASK (0x8U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_SHIFT (3U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_MASK (0x80U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_SHIFT (7U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_MASK (0x100U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_SHIFT (8U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_MASK (0x600U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_SHIFT (9U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_EN_MASK (0x800U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_EN_SHIFT (11U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_MASK (0x1000U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_SHIFT (12U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_ID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_MASK (0x40000U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_SHIFT (18U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_MASK (0x700000U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_SHIFT (20U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK (0x4000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT (26U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_MASK (0x80000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_SHIFT (31U) |
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#define | USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK (0x7U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT (0U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_MASK (0x8U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_SHIFT (3U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_MASK (0x80U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_SHIFT (7U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_MASK (0x100U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_SHIFT (8U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_MASK (0x600U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_SHIFT (9U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_EN_MASK (0x800U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_EN_SHIFT (11U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_MASK (0x1000U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_SHIFT (12U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_ID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_MASK (0x40000U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_SHIFT (18U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_MASK (0x700000U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_SHIFT (20U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK (0x4000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT (26U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_MASK (0x80000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_SHIFT (31U) |
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#define | USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK (0x7U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT (0U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_MASK (0x8U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_SHIFT (3U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_MASK (0x80U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_SHIFT (7U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_MASK (0x100U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_SHIFT (8U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_MASK (0x600U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_SHIFT (9U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_EN_MASK (0x800U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_EN_SHIFT (11U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_EN_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_MASK (0x1000U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_SHIFT (12U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_ID_OVERRIDE_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_MASK (0x40000U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_SHIFT (18U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_MASK (0x700000U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_SHIFT (20U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK (0x4000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT (26U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_MASK (0x80000000U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_SHIFT (31U) |
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#define | USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_MASK) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_MASK (0x1U) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_SHIFT (0U) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_MASK) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_MASK (0x2U) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_SHIFT (1U) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_MASK (0x4U) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_SHIFT (2U) |
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#define | USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_MASK (0x8U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_SHIFT (3U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_MASK (0x10U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_SHIFT (4U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_EN_MASK (0x20U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_EN_SHIFT (5U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_MASK (0x40U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_SHIFT (6U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_MASK) |
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#define | USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_MASK (0x80U) |
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#define | USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_SHIFT (7U) |
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#define | USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_MASK (0x100U) |
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#define | USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_SHIFT (8U) |
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#define | USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_MASK (0x8000U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_SHIFT (15U) |
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#define | USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TSTPKT_MASK (0xFF0000U) |
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#define | USBPHY_USB1_LOOPBACK_TSTPKT_SHIFT (16U) |
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#define | USBPHY_USB1_LOOPBACK_TSTPKT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTPKT_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_MASK (0x1U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_SHIFT (0U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_MASK (0x2U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_SHIFT (1U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_MASK (0x4U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_SHIFT (2U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_MASK (0x8U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_SHIFT (3U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_MASK (0x10U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_SHIFT (4U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_MASK (0x20U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_SHIFT (5U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_MASK (0x40U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_SHIFT (6U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_MASK (0x80U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_SHIFT (7U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_MASK (0x100U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_SHIFT (8U) |
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#define | USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_MASK (0x8000U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_SHIFT (15U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTPKT_MASK (0xFF0000U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTPKT_SHIFT (16U) |
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#define | USBPHY_USB1_LOOPBACK_SET_TSTPKT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTPKT_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_MASK (0x1U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_SHIFT (0U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_MASK (0x2U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_SHIFT (1U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_MASK (0x4U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_SHIFT (2U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_MASK (0x8U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_SHIFT (3U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_MASK (0x10U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_SHIFT (4U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_MASK (0x20U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_SHIFT (5U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_MASK (0x40U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_SHIFT (6U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_MASK (0x80U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_SHIFT (7U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_MASK (0x100U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_SHIFT (8U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_MASK (0x8000U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_SHIFT (15U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTPKT_MASK (0xFF0000U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTPKT_SHIFT (16U) |
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#define | USBPHY_USB1_LOOPBACK_CLR_TSTPKT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTPKT_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_MASK (0x1U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_SHIFT (0U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_MASK (0x2U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_SHIFT (1U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_MASK (0x4U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_SHIFT (2U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_MASK (0x8U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_SHIFT (3U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_MASK (0x10U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_SHIFT (4U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_MASK (0x20U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_SHIFT (5U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_MASK (0x40U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_SHIFT (6U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_MASK (0x80U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_SHIFT (7U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_MASK (0x100U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_SHIFT (8U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_MASK (0x8000U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_SHIFT (15U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_MASK) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTPKT_MASK (0xFF0000U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTPKT_SHIFT (16U) |
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#define | USBPHY_USB1_LOOPBACK_TOG_TSTPKT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTPKT_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_MASK (0x1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_SHIFT (0U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK (0x2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT (1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_MASK (0x4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_SHIFT (2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_MASK (0x8U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_SHIFT (3U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DN_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DN_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DN_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DN_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DN_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_VBGADJ_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_TST_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_TST_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_TST_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_TST_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_REFBIAS_TST_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_VBGADJ_MASK (0x1C00U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_VBGADJ_SHIFT (10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_VBGADJ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_VBGADJ_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_VBGADJ_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_TST_MASK (0x6000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_TST_SHIFT (13U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_TST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_TST_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USB2_REFBIAS_TST_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_MASK (0x38000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_SHIFT (15U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK (0xC0000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT (18U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_MASK (0xF00000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_SHIFT (20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_MASK (0xF000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_SHIFT (24U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DN_MASK (0xF0000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DN_SHIFT (28U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DN_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DN_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_MASK (0x1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_SHIFT (0U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK (0x2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT (1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_MASK (0x4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_SHIFT (2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_MASK (0x8U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_SHIFT (3U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DN_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DN_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DN_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DN_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DN_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_VBGADJ_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_TST_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_TST_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_TST_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_TST_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_REFBIAS_TST_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_VBGADJ_MASK (0x1C00U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_VBGADJ_SHIFT (10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_VBGADJ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_VBGADJ_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_VBGADJ_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_TST_MASK (0x6000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_TST_SHIFT (13U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_TST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_TST_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB2_REFBIAS_TST_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_MASK (0x38000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_SHIFT (15U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK (0xC0000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT (18U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_MASK (0xF00000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_SHIFT (20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_MASK (0xF000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_SHIFT (24U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DN_MASK (0xF0000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DN_SHIFT (28U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DN_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DN_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_MASK (0x1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_SHIFT (0U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK (0x2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT (1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_MASK (0x4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_SHIFT (2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_MASK (0x8U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_SHIFT (3U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DN_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DN_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DN_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DN_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DN_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_VBGADJ_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_TST_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_TST_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_TST_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_TST_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_REFBIAS_TST_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_VBGADJ_MASK (0x1C00U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_VBGADJ_SHIFT (10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_VBGADJ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_VBGADJ_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_VBGADJ_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_TST_MASK (0x6000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_TST_SHIFT (13U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_TST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_TST_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB2_REFBIAS_TST_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_MASK (0x38000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_SHIFT (15U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK (0xC0000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT (18U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_MASK (0xF00000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_SHIFT (20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_MASK (0xF000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_SHIFT (24U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DN_MASK (0xF0000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DN_SHIFT (28U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DN_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DN_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_MASK (0x1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_SHIFT (0U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK (0x2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT (1U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_MASK (0x4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_SHIFT (2U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_MASK (0x8U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_SHIFT (3U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DN_OVERRIDE_MASK (0x10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DN_OVERRIDE_SHIFT (4U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DN_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DN_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DN_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK (0x20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT (5U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_VBGADJ_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_VBGADJ_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_VBGADJ_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_TST_OVERRIDE_MASK (0x40U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_TST_OVERRIDE_SHIFT (6U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_TST_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_TST_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_REFBIAS_TST_OVERRIDE_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_VBGADJ_MASK (0x1C00U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_VBGADJ_SHIFT (10U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_VBGADJ(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_VBGADJ_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_VBGADJ_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_TST_MASK (0x6000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_TST_SHIFT (13U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_TST(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_TST_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB2_REFBIAS_TST_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_MASK (0x38000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_SHIFT (15U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK (0xC0000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT (18U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_MASK (0xF00000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_SHIFT (20U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_MASK (0xF000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_SHIFT (24U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_MASK) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DN_MASK (0xF0000000U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DN_SHIFT (28U) |
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#define | USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DN(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DN_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DN_MASK) |
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