Example CPU Architecture Support. More...

Modules
	CPUEndian
	CPUEndian.

	Example Assembler Support

	Management
	Management.

	Processor Dependent Bitfield Manipulation

	Processor Dependent Context Management
	Destroys the context of the thread.

	Processor Dependent Interrupt Management

Data Structures
struct	CPU_Per_CPU_control
	The CPU specific per-CPU control. More...

Macros
#define	CPU_PER_CPU_CONTROL_SIZE 0
	The size of the CPU specific per-CPU control. More...

#define	CPU_THREAD_LOCAL_STORAGE_VARIANT 10
	Defines the thread-local storage (TLS) variant. More...

#define	_CPU_Get_current_per_CPU_control() ( _CPU_Per_CPU_current )
	Optional method to obtain the per-CPU control of the current processor. More...

#define	_CPU_Get_thread_executing() ( _CPU_Per_CPU_current->executing )
	Optional method to get the executing thread. More...

Functions
register struct Per_CPU_Control *_CPU_Per_CPU_current	asm ("rX")
	Special register pointing to the per-CPU control of the current processor. More...

RTEMS_NO_RETURN void	_CPU_Fatal_halt (uint32_t source, CPU_Uint32ptr error)

void	_CPU_Context_volatile_clobber (uintptr_t pattern)

void	_CPU_Context_validate (uintptr_t pattern)

Detailed Description

Example CPU Architecture Support.

Macro Definition Documentation

◆ _CPU_Get_current_per_CPU_control

#define _CPU_Get_current_per_CPU_control ( ) ( _CPU_Per_CPU_current )

Optional method to obtain the per-CPU control of the current processor.

This is optional. Not every CPU port needs this. It is only an optional optimization variant. In case this macro is undefined, the default implementation using the current processor index will be used.

◆ _CPU_Get_thread_executing

#define _CPU_Get_thread_executing ( ) ( _CPU_Per_CPU_current->executing )

Optional method to get the executing thread.

This is optional. Not every CPU port needs this. It is only an optional optimization variant. In case this macro is undefined, the default implementation uses the per-CPU information and the current processor index to get the executing thread.

◆ CPU_PER_CPU_CONTROL_SIZE

#define CPU_PER_CPU_CONTROL_SIZE 0

The size of the CPU specific per-CPU control.

This define must be visible to assember files since it is used to derive structure offsets.

◆ CPU_THREAD_LOCAL_STORAGE_VARIANT

#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10

Defines the thread-local storage (TLS) variant.

Use one of the following values:

10: The architecture uses Variant I and the TLS offsets emitted by the linker neglect the TCB (examples: nios2, m68k, microblaze, powerpc, riscv). The thread pointer directly references the thread-local data area.

11: The architecture uses Variant I and the TLS offsets emitted by the linker take the TCB into account (examples: arm, aarch64). The thread pointer references the TCB.

20: The architecture uses Variant II (examples: i386, sparc).

Function Documentation

◆ _CPU_Fatal_halt()

RTEMS_NO_RETURN void _CPU_Fatal_halt	(	uint32_t	source,
		CPU_Uint32ptr	error
	)

This routine copies _error into a known place – typically a stack location or a register, optionally disables interrupts, and halts/stops the CPU.

Port Specific Information:

XXX document implementation including references if appropriate

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

◆ asm()

register struct Per_CPU_Control *_CPU_Per_CPU_current asm ( "rX" )

Special register pointing to the per-CPU control of the current processor.

This is optional. Not every CPU port needs this. It is only an optional optimization variant.

Modules

Data Structures

Macros

Functions