PCI trace PCI Ctrl signal state register (TCS)

This group contains register bit definitions. More...

Macros
#define	GRPCI2_TCS_CBE_3_0_SHIFT   16
#define	GRPCI2_TCS_CBE_3_0_MASK   0xf0000U
#define	GRPCI2_TCS_CBE_3_0_GET(_reg)
#define	GRPCI2_TCS_CBE_3_0_SET(_reg, _val)
#define	GRPCI2_TCS_CBE_3_0(_val)
#define	GRPCI2_TCS_FRAME   0x8000U
#define	GRPCI2_TCS_IRDY   0x4000U
#define	GRPCI2_TCS_TRDY   0x2000U
#define	GRPCI2_TCS_STOP   0x1000U
#define	GRPCI2_TCS_DEVSEL   0x800U
#define	GRPCI2_TCS_PAR   0x400U
#define	GRPCI2_TCS_PERR   0x200U
#define	GRPCI2_TCS_SERR   0x100U
#define	GRPCI2_TCS_IDSEL   0x80U
#define	GRPCI2_TCS_REQ   0x40U
#define	GRPCI2_TCS_GNT   0x20U
#define	GRPCI2_TCS_LOCK   0x10U
#define	GRPCI2_TCS_RST   0x8U

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

GRPCI2_TCS_CBE_3_0

#define GRPCI2_TCS_CBE_3_0

(

_val

)

Value:

  ( ( ( _val ) << GRPCI2_TCS_CBE_3_0_SHIFT ) & \
    GRPCI2_TCS_CBE_3_0_MASK )

GRPCI2_TCS_CBE_3_0_GET

#define GRPCI2_TCS_CBE_3_0_GET

(

_reg

)

Value:

  ( ( ( _reg ) & GRPCI2_TCS_CBE_3_0_MASK ) >> \
    GRPCI2_TCS_CBE_3_0_SHIFT )

GRPCI2_TCS_CBE_3_0_SET

#define GRPCI2_TCS_CBE_3_0_SET	(		_reg,
			_val
	)

Value:

  ( ( ( _reg ) & ~GRPCI2_TCS_CBE_3_0_MASK ) | \
    ( ( ( _val ) << GRPCI2_TCS_CBE_3_0_SHIFT ) & \
      GRPCI2_TCS_CBE_3_0_MASK ) )