LPUART Peripheral Access Layer

Modules
	LPUART Register Masks

Data Structures
struct	LPUART_Type

Macros
#define	LPUART1_BASE   (0x40184000u)
#define	LPUART1   ((LPUART_Type *)LPUART1_BASE)
#define	LPUART2_BASE   (0x40188000u)
#define	LPUART2   ((LPUART_Type *)LPUART2_BASE)
#define	LPUART3_BASE   (0x4018C000u)
#define	LPUART3   ((LPUART_Type *)LPUART3_BASE)
#define	LPUART4_BASE   (0x40190000u)
#define	LPUART4   ((LPUART_Type *)LPUART4_BASE)
#define	LPUART5_BASE   (0x40194000u)
#define	LPUART5   ((LPUART_Type *)LPUART5_BASE)
#define	LPUART6_BASE   (0x40198000u)
#define	LPUART6   ((LPUART_Type *)LPUART6_BASE)
#define	LPUART7_BASE   (0x4019C000u)
#define	LPUART7   ((LPUART_Type *)LPUART7_BASE)
#define	LPUART8_BASE   (0x401A0000u)
#define	LPUART8   ((LPUART_Type *)LPUART8_BASE)
#define	LPUART_BASE_ADDRS   { 0u, LPUART1_BASE, LPUART2_BASE, LPUART3_BASE, LPUART4_BASE, LPUART5_BASE, LPUART6_BASE, LPUART7_BASE, LPUART8_BASE }
#define	LPUART_BASE_PTRS   { (LPUART_Type *)0u, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 }
#define	LPUART_RX_TX_IRQS   { NotAvail_IRQn, LPUART1_IRQn, LPUART2_IRQn, LPUART3_IRQn, LPUART4_IRQn, LPUART5_IRQn, LPUART6_IRQn, LPUART7_IRQn, LPUART8_IRQn }
#define	LPUART1_BASE   (0x4007C000u)
#define	LPUART1   ((LPUART_Type *)LPUART1_BASE)
#define	LPUART2_BASE   (0x40080000u)
#define	LPUART2   ((LPUART_Type *)LPUART2_BASE)
#define	LPUART3_BASE   (0x40084000u)
#define	LPUART3   ((LPUART_Type *)LPUART3_BASE)
#define	LPUART4_BASE   (0x40088000u)
#define	LPUART4   ((LPUART_Type *)LPUART4_BASE)
#define	LPUART5_BASE   (0x4008C000u)
#define	LPUART5   ((LPUART_Type *)LPUART5_BASE)
#define	LPUART6_BASE   (0x40090000u)
#define	LPUART6   ((LPUART_Type *)LPUART6_BASE)
#define	LPUART7_BASE   (0x40094000u)
#define	LPUART7   ((LPUART_Type *)LPUART7_BASE)
#define	LPUART8_BASE   (0x40098000u)
#define	LPUART8   ((LPUART_Type *)LPUART8_BASE)
#define	LPUART9_BASE   (0x4009C000u)
#define	LPUART9   ((LPUART_Type *)LPUART9_BASE)
#define	LPUART10_BASE   (0x400A0000u)
#define	LPUART10   ((LPUART_Type *)LPUART10_BASE)
#define	LPUART11_BASE   (0x40C24000u)
#define	LPUART11   ((LPUART_Type *)LPUART11_BASE)
#define	LPUART12_BASE   (0x40C28000u)
#define	LPUART12   ((LPUART_Type *)LPUART12_BASE)
#define	LPUART_BASE_ADDRS   { 0u, LPUART1_BASE, LPUART2_BASE, LPUART3_BASE, LPUART4_BASE, LPUART5_BASE, LPUART6_BASE, LPUART7_BASE, LPUART8_BASE, LPUART9_BASE, LPUART10_BASE, LPUART11_BASE, LPUART12_BASE }
#define	LPUART_BASE_PTRS   { (LPUART_Type *)0u, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, LPUART9, LPUART10, LPUART11, LPUART12 }
#define	LPUART_RX_TX_IRQS   { NotAvail_IRQn, LPUART1_IRQn, LPUART2_IRQn, LPUART3_IRQn, LPUART4_IRQn, LPUART5_IRQn, LPUART6_IRQn, LPUART7_IRQn, LPUART8_IRQn, LPUART9_IRQn, LPUART10_IRQn, LPUART11_IRQn, LPUART12_IRQn }
#define	LPUART1_BASE   (0x4007C000u)
#define	LPUART1   ((LPUART_Type *)LPUART1_BASE)
#define	LPUART2_BASE   (0x40080000u)
#define	LPUART2   ((LPUART_Type *)LPUART2_BASE)
#define	LPUART3_BASE   (0x40084000u)
#define	LPUART3   ((LPUART_Type *)LPUART3_BASE)
#define	LPUART4_BASE   (0x40088000u)
#define	LPUART4   ((LPUART_Type *)LPUART4_BASE)
#define	LPUART5_BASE   (0x4008C000u)
#define	LPUART5   ((LPUART_Type *)LPUART5_BASE)
#define	LPUART6_BASE   (0x40090000u)
#define	LPUART6   ((LPUART_Type *)LPUART6_BASE)
#define	LPUART7_BASE   (0x40094000u)
#define	LPUART7   ((LPUART_Type *)LPUART7_BASE)
#define	LPUART8_BASE   (0x40098000u)
#define	LPUART8   ((LPUART_Type *)LPUART8_BASE)
#define	LPUART9_BASE   (0x4009C000u)
#define	LPUART9   ((LPUART_Type *)LPUART9_BASE)
#define	LPUART10_BASE   (0x400A0000u)
#define	LPUART10   ((LPUART_Type *)LPUART10_BASE)
#define	LPUART11_BASE   (0x40C24000u)
#define	LPUART11   ((LPUART_Type *)LPUART11_BASE)
#define	LPUART12_BASE   (0x40C28000u)
#define	LPUART12   ((LPUART_Type *)LPUART12_BASE)
#define	LPUART_BASE_ADDRS   { 0u, LPUART1_BASE, LPUART2_BASE, LPUART3_BASE, LPUART4_BASE, LPUART5_BASE, LPUART6_BASE, LPUART7_BASE, LPUART8_BASE, LPUART9_BASE, LPUART10_BASE, LPUART11_BASE, LPUART12_BASE }
#define	LPUART_BASE_PTRS   { (LPUART_Type *)0u, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, LPUART9, LPUART10, LPUART11, LPUART12 }
#define	LPUART_RX_TX_IRQS   { NotAvail_IRQn, LPUART1_IRQn, LPUART2_IRQn, LPUART3_IRQn, LPUART4_IRQn, LPUART5_IRQn, LPUART6_IRQn, LPUART7_IRQn, LPUART8_IRQn, LPUART9_IRQn, LPUART10_IRQn, LPUART11_IRQn, LPUART12_IRQn }

Detailed Description

Macro Definition Documentation

LPUART1 [1/3]

#define LPUART1   ((LPUART_Type *)LPUART1_BASE)

Peripheral LPUART1 base pointer

LPUART1 [2/3]

#define LPUART1   ((LPUART_Type *)LPUART1_BASE)

Peripheral LPUART1 base pointer

LPUART1 [3/3]

#define LPUART1   ((LPUART_Type *)LPUART1_BASE)

Peripheral LPUART1 base pointer

LPUART10 [1/2]

#define LPUART10   ((LPUART_Type *)LPUART10_BASE)

Peripheral LPUART10 base pointer

LPUART10 [2/2]

#define LPUART10   ((LPUART_Type *)LPUART10_BASE)

Peripheral LPUART10 base pointer

LPUART10_BASE [1/2]

#define LPUART10_BASE   (0x400A0000u)

Peripheral LPUART10 base address

LPUART10_BASE [2/2]

#define LPUART10_BASE   (0x400A0000u)

Peripheral LPUART10 base address

LPUART11 [1/2]

#define LPUART11   ((LPUART_Type *)LPUART11_BASE)

Peripheral LPUART11 base pointer

LPUART11 [2/2]

#define LPUART11   ((LPUART_Type *)LPUART11_BASE)

Peripheral LPUART11 base pointer

LPUART11_BASE [1/2]

#define LPUART11_BASE   (0x40C24000u)

Peripheral LPUART11 base address

LPUART11_BASE [2/2]

#define LPUART11_BASE   (0x40C24000u)

Peripheral LPUART11 base address

LPUART12 [1/2]

#define LPUART12   ((LPUART_Type *)LPUART12_BASE)

Peripheral LPUART12 base pointer

LPUART12 [2/2]

#define LPUART12   ((LPUART_Type *)LPUART12_BASE)

Peripheral LPUART12 base pointer

LPUART12_BASE [1/2]

#define LPUART12_BASE   (0x40C28000u)

Peripheral LPUART12 base address

LPUART12_BASE [2/2]

#define LPUART12_BASE   (0x40C28000u)

Peripheral LPUART12 base address

LPUART1_BASE [1/3]

#define LPUART1_BASE   (0x40184000u)

Peripheral LPUART1 base address

LPUART1_BASE [2/3]

#define LPUART1_BASE   (0x4007C000u)

Peripheral LPUART1 base address

LPUART1_BASE [3/3]

#define LPUART1_BASE   (0x4007C000u)

Peripheral LPUART1 base address

LPUART2 [1/3]

#define LPUART2   ((LPUART_Type *)LPUART2_BASE)

Peripheral LPUART2 base pointer

LPUART2 [2/3]

#define LPUART2   ((LPUART_Type *)LPUART2_BASE)

Peripheral LPUART2 base pointer

LPUART2 [3/3]

#define LPUART2   ((LPUART_Type *)LPUART2_BASE)

Peripheral LPUART2 base pointer

LPUART2_BASE [1/3]

#define LPUART2_BASE   (0x40188000u)

Peripheral LPUART2 base address

LPUART2_BASE [2/3]

#define LPUART2_BASE   (0x40080000u)

Peripheral LPUART2 base address

LPUART2_BASE [3/3]

#define LPUART2_BASE   (0x40080000u)

Peripheral LPUART2 base address

LPUART3 [1/3]

#define LPUART3   ((LPUART_Type *)LPUART3_BASE)

Peripheral LPUART3 base pointer

LPUART3 [2/3]

#define LPUART3   ((LPUART_Type *)LPUART3_BASE)

Peripheral LPUART3 base pointer

LPUART3 [3/3]

#define LPUART3   ((LPUART_Type *)LPUART3_BASE)

Peripheral LPUART3 base pointer

LPUART3_BASE [1/3]

#define LPUART3_BASE   (0x4018C000u)

Peripheral LPUART3 base address

LPUART3_BASE [2/3]

#define LPUART3_BASE   (0x40084000u)

Peripheral LPUART3 base address

LPUART3_BASE [3/3]

#define LPUART3_BASE   (0x40084000u)

Peripheral LPUART3 base address

LPUART4 [1/3]

#define LPUART4   ((LPUART_Type *)LPUART4_BASE)

Peripheral LPUART4 base pointer

LPUART4 [2/3]

#define LPUART4   ((LPUART_Type *)LPUART4_BASE)

Peripheral LPUART4 base pointer

LPUART4 [3/3]

#define LPUART4   ((LPUART_Type *)LPUART4_BASE)

Peripheral LPUART4 base pointer

LPUART4_BASE [1/3]

#define LPUART4_BASE   (0x40190000u)

Peripheral LPUART4 base address

LPUART4_BASE [2/3]

#define LPUART4_BASE   (0x40088000u)

Peripheral LPUART4 base address

LPUART4_BASE [3/3]

#define LPUART4_BASE   (0x40088000u)

Peripheral LPUART4 base address

LPUART5 [1/3]

#define LPUART5   ((LPUART_Type *)LPUART5_BASE)

Peripheral LPUART5 base pointer

LPUART5 [2/3]

#define LPUART5   ((LPUART_Type *)LPUART5_BASE)

Peripheral LPUART5 base pointer

LPUART5 [3/3]

#define LPUART5   ((LPUART_Type *)LPUART5_BASE)

Peripheral LPUART5 base pointer

LPUART5_BASE [1/3]

#define LPUART5_BASE   (0x40194000u)

Peripheral LPUART5 base address

LPUART5_BASE [2/3]

#define LPUART5_BASE   (0x4008C000u)

Peripheral LPUART5 base address

LPUART5_BASE [3/3]

#define LPUART5_BASE   (0x4008C000u)

Peripheral LPUART5 base address

LPUART6 [1/3]

#define LPUART6   ((LPUART_Type *)LPUART6_BASE)

Peripheral LPUART6 base pointer

LPUART6 [2/3]

#define LPUART6   ((LPUART_Type *)LPUART6_BASE)

Peripheral LPUART6 base pointer

LPUART6 [3/3]

#define LPUART6   ((LPUART_Type *)LPUART6_BASE)

Peripheral LPUART6 base pointer

LPUART6_BASE [1/3]

#define LPUART6_BASE   (0x40198000u)

Peripheral LPUART6 base address

LPUART6_BASE [2/3]

#define LPUART6_BASE   (0x40090000u)

Peripheral LPUART6 base address

LPUART6_BASE [3/3]

#define LPUART6_BASE   (0x40090000u)

Peripheral LPUART6 base address

LPUART7 [1/3]

#define LPUART7   ((LPUART_Type *)LPUART7_BASE)

Peripheral LPUART7 base pointer

LPUART7 [2/3]

#define LPUART7   ((LPUART_Type *)LPUART7_BASE)

Peripheral LPUART7 base pointer

LPUART7 [3/3]

#define LPUART7   ((LPUART_Type *)LPUART7_BASE)

Peripheral LPUART7 base pointer

LPUART7_BASE [1/3]

#define LPUART7_BASE   (0x4019C000u)

Peripheral LPUART7 base address

LPUART7_BASE [2/3]

#define LPUART7_BASE   (0x40094000u)

Peripheral LPUART7 base address

LPUART7_BASE [3/3]

#define LPUART7_BASE   (0x40094000u)

Peripheral LPUART7 base address

LPUART8 [1/3]

#define LPUART8   ((LPUART_Type *)LPUART8_BASE)

Peripheral LPUART8 base pointer

LPUART8 [2/3]

#define LPUART8   ((LPUART_Type *)LPUART8_BASE)

Peripheral LPUART8 base pointer

LPUART8 [3/3]

#define LPUART8   ((LPUART_Type *)LPUART8_BASE)

Peripheral LPUART8 base pointer

LPUART8_BASE [1/3]

#define LPUART8_BASE   (0x401A0000u)

Peripheral LPUART8 base address

LPUART8_BASE [2/3]

#define LPUART8_BASE   (0x40098000u)

Peripheral LPUART8 base address

LPUART8_BASE [3/3]

#define LPUART8_BASE   (0x40098000u)

Peripheral LPUART8 base address

LPUART9 [1/2]

#define LPUART9   ((LPUART_Type *)LPUART9_BASE)

Peripheral LPUART9 base pointer

LPUART9 [2/2]

#define LPUART9   ((LPUART_Type *)LPUART9_BASE)

Peripheral LPUART9 base pointer

LPUART9_BASE [1/2]

#define LPUART9_BASE   (0x4009C000u)

Peripheral LPUART9 base address

LPUART9_BASE [2/2]

#define LPUART9_BASE   (0x4009C000u)

Peripheral LPUART9 base address

LPUART_BASE_ADDRS [1/3]

#define LPUART_BASE_ADDRS   { 0u, LPUART1_BASE, LPUART2_BASE, LPUART3_BASE, LPUART4_BASE, LPUART5_BASE, LPUART6_BASE, LPUART7_BASE, LPUART8_BASE }

Array initializer of LPUART peripheral base addresses

LPUART_BASE_ADDRS [2/3]

#define LPUART_BASE_ADDRS   { 0u, LPUART1_BASE, LPUART2_BASE, LPUART3_BASE, LPUART4_BASE, LPUART5_BASE, LPUART6_BASE, LPUART7_BASE, LPUART8_BASE, LPUART9_BASE, LPUART10_BASE, LPUART11_BASE, LPUART12_BASE }

Array initializer of LPUART peripheral base addresses

LPUART_BASE_ADDRS [3/3]

#define LPUART_BASE_ADDRS   { 0u, LPUART1_BASE, LPUART2_BASE, LPUART3_BASE, LPUART4_BASE, LPUART5_BASE, LPUART6_BASE, LPUART7_BASE, LPUART8_BASE, LPUART9_BASE, LPUART10_BASE, LPUART11_BASE, LPUART12_BASE }

Array initializer of LPUART peripheral base addresses

LPUART_BASE_PTRS [1/3]

#define LPUART_BASE_PTRS   { (LPUART_Type *)0u, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 }

Array initializer of LPUART peripheral base pointers

LPUART_BASE_PTRS [2/3]

#define LPUART_BASE_PTRS   { (LPUART_Type *)0u, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, LPUART9, LPUART10, LPUART11, LPUART12 }

Array initializer of LPUART peripheral base pointers

LPUART_BASE_PTRS [3/3]

#define LPUART_BASE_PTRS   { (LPUART_Type *)0u, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, LPUART9, LPUART10, LPUART11, LPUART12 }

Array initializer of LPUART peripheral base pointers

LPUART_RX_TX_IRQS [1/3]

#define LPUART_RX_TX_IRQS   { NotAvail_IRQn, LPUART1_IRQn, LPUART2_IRQn, LPUART3_IRQn, LPUART4_IRQn, LPUART5_IRQn, LPUART6_IRQn, LPUART7_IRQn, LPUART8_IRQn }

Interrupt vectors for the LPUART peripheral type

LPUART_RX_TX_IRQS [2/3]

#define LPUART_RX_TX_IRQS   { NotAvail_IRQn, LPUART1_IRQn, LPUART2_IRQn, LPUART3_IRQn, LPUART4_IRQn, LPUART5_IRQn, LPUART6_IRQn, LPUART7_IRQn, LPUART8_IRQn, LPUART9_IRQn, LPUART10_IRQn, LPUART11_IRQn, LPUART12_IRQn }

Interrupt vectors for the LPUART peripheral type

LPUART_RX_TX_IRQS [3/3]

#define LPUART_RX_TX_IRQS   { NotAvail_IRQn, LPUART1_IRQn, LPUART2_IRQn, LPUART3_IRQn, LPUART4_IRQn, LPUART5_IRQn, LPUART6_IRQn, LPUART7_IRQn, LPUART8_IRQn, LPUART9_IRQn, LPUART10_IRQn, LPUART11_IRQn, LPUART12_IRQn }

Interrupt vectors for the LPUART peripheral type