Atmel AT91RM9200_DBGU Register definitions.
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#define | DBGU_CR 0x00 |
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#define | DBGU_MR 0x04 |
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#define | DBGU_IER 0x08 |
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#define | DBGU_IDR 0x0C |
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#define | DBGU_IMR 0x10 |
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#define | DBGU_SR 0x14 |
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#define | DBGU_RHR 0x18 |
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#define | DBGU_THR 0x1C |
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#define | DBGU_BRGR 0x20 |
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#define | DBGU_C1R 0x40 |
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#define | DBGU_C2R 0x44 |
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#define | DBGU_FNTR 0x48 |
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#define | DBGU_CR_RSTRX BIT2 |
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#define | DBGU_CR_RSTTX BIT3 |
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#define | DBGU_CR_RXEN BIT4 |
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#define | DBGU_CR_RXDIS BIT5 |
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#define | DBGU_CR_TXEN BIT6 |
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#define | DBGU_CR_TXDIS BIT7 |
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#define | DBGU_CR_RSTSTA BIT8 |
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#define | DBGU_MR_PAR_EVEN (0x0 << 9) |
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#define | DBGU_MR_PAR_ODD (0x1 << 9) |
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#define | DBGU_MR_PAR_SPACE (0x2 << 9) |
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#define | DBGU_MR_PAR_MARK (0x3 << 9) |
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#define | DBGU_MR_PAR_NONE (0x4 << 9) |
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#define | DBGU_MR_PAR_MDROP (0x6 << 9) |
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#define | DBGU_MR_CHMODE_NORM (0x0 << 14) |
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#define | DBGU_MR_CHMODE_AUTO (0x1 << 14) |
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#define | DBGU_MR_CHMODE_LOC (0x2 << 14) |
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#define | DBGU_MR_CHMODE_REM (0x3 << 14) |
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#define | DBGU_INT_RXRDY BIT0 |
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#define | DBGU_INT_TXRDY BIT1 |
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#define | DBGU_INT_ENDRX BIT3 |
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#define | DBGU_INT_ENDTX BIT4 |
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#define | DBGU_INT_OVRE BIT5 |
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#define | DBGU_INT_FRAME BIT6 |
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#define | DBGU_INT_PARE BIT7 |
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#define | DBGU_INT_TXEMPTY BIT9 |
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#define | DBGU_INT_TXBUFE BIT11 |
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#define | DBGU_INT_RXBUFF BIT12 |
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#define | DBGU_INT_COMM_TX BIT30 |
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#define | DBGU_INT_COMM_RX BIT31 |
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#define | DBGU_INT_ALL 0xC0001AFB |
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#define | DBGU_FNTR_NTRST BIT0 |
Atmel AT91RM9200_DBGU Register definitions.