arm-gic-regs.h File Reference

This header file provides interfaces of the ARM Generic Interrupt Controller (GIC) memory-mapped registers. More...

#include <bsp/utility.h>

Go to the source code of this file.

Data Structures
struct	gic_cpuif
struct	gic_dist
struct	gic_redist
struct	gic_sgi_ppi

Macros
#define	GIC_CPUIF_ICCICR_CBPR   BSP_BIT32(4)
#define	GIC_CPUIF_ICCICR_FIQ_EN   BSP_BIT32(3)
#define	GIC_CPUIF_ICCICR_ACK_CTL   BSP_BIT32(2)
#define	GIC_CPUIF_ICCICR_ENABLE_GRP_1   BSP_BIT32(1)
#define	GIC_CPUIF_ICCICR_ENABLE   BSP_BIT32(0)
#define	GIC_CPUIF_ICCPMR_PRIORITY(val)
#define	GIC_CPUIF_ICCPMR_PRIORITY_GET(reg)
#define	GIC_CPUIF_ICCPMR_PRIORITY_SET(reg, val)
#define	GIC_CPUIF_ICCBPR_BINARY_POINT(val)
#define	GIC_CPUIF_ICCBPR_BINARY_POINT_GET(reg)
#define	GIC_CPUIF_ICCBPR_BINARY_POINT_SET(reg, val)
#define	GIC_CPUIF_ICCIAR_CPUID(val)
#define	GIC_CPUIF_ICCIAR_CPUID_GET(reg)
#define	GIC_CPUIF_ICCIAR_CPUID_SET(reg, val)
#define	GIC_CPUIF_ICCIAR_ACKINTID(val)
#define	GIC_CPUIF_ICCIAR_ACKINTID_GET(reg)
#define	GIC_CPUIF_ICCIAR_ACKINTID_SET(reg, val)
#define	GIC_CPUIF_ICCEOIR_CPUID(val)
#define	GIC_CPUIF_ICCEOIR_CPUID_GET(reg)
#define	GIC_CPUIF_ICCEOIR_CPUID_SET(reg, val)
#define	GIC_CPUIF_ICCEOIR_EOIINTID(val)
#define	GIC_CPUIF_ICCEOIR_EOIINTID_GET(reg)
#define	GIC_CPUIF_ICCEOIR_EOIINTID_SET(reg, val)
#define	GIC_CPUIF_ICCRPR_PRIORITY(val)
#define	GIC_CPUIF_ICCRPR_PRIORITY_GET(reg)
#define	GIC_CPUIF_ICCRPR_PRIORITY_SET(reg, val)
#define	GIC_CPUIF_ICCHPIR_CPUID(val)
#define	GIC_CPUIF_ICCHPIR_CPUID_GET(reg)
#define	GIC_CPUIF_ICCHPIR_CPUID_SET(reg, val)
#define	GIC_CPUIF_ICCHPIR_PENDINTID(val)
#define	GIC_CPUIF_ICCHPIR_PENDINTID_GET(reg)
#define	GIC_CPUIF_ICCHPIR_PENDINTID_SET(reg, val)
#define	GIC_CPUIF_ICCABPR_BINARY_POINT(val)
#define	GIC_CPUIF_ICCABPR_BINARY_POINT_GET(reg)
#define	GIC_CPUIF_ICCABPR_BINARY_POINT_SET(reg, val)
#define	GIC_CPUIF_ICCIIDR_PRODUCT_ID(val)
#define	GIC_CPUIF_ICCIIDR_PRODUCT_ID_GET(reg)
#define	GIC_CPUIF_ICCIIDR_PRODUCT_ID_SET(reg, val)
#define	GIC_CPUIF_ICCIIDR_ARCH_VERSION(val)
#define	GIC_CPUIF_ICCIIDR_ARCH_VERSION_GET(reg)
#define	GIC_CPUIF_ICCIIDR_ARCH_VERSION_SET(reg, val)
#define	GIC_CPUIF_ICCIIDR_REVISION(val)
#define	GIC_CPUIF_ICCIIDR_REVISION_GET(reg)
#define	GIC_CPUIF_ICCIIDR_REVISION_SET(reg, val)
#define	GIC_CPUIF_ICCIIDR_IMPLEMENTER(val)
#define	GIC_CPUIF_ICCIIDR_IMPLEMENTER_GET(reg)
#define	GIC_CPUIF_ICCIIDR_IMPLEMENTER_SET(reg, val)
#define	GIC_DIST_ICDDCR_RWP   BSP_BIT32(31)
#define	GIC_DIST_ICDDCR_E1NWF   BSP_BIT32(7)
#define	GIC_DIST_ICDDCR_DS   BSP_BIT32(6)
#define	GIC_DIST_ICDDCR_ARE_NS   BSP_BIT32(5)
#define	GIC_DIST_ICDDCR_ARE_S   BSP_BIT32(4)
#define	GIC_DIST_ICDDCR_ENABLE_GRP1S   BSP_BIT32(2)
#define	GIC_DIST_ICDDCR_ENABLE_GRP1NS   BSP_BIT32(1)
#define	GIC_DIST_ICDDCR_ENABLE_GRP0   BSP_BIT32(0)
#define	GIC_DIST_ICDDCR_ENABLE_GRP_1   BSP_BIT32(1)
#define	GIC_DIST_ICDDCR_ENABLE   BSP_BIT32(0)
#define	GIC_DIST_ICDICTR_LSPI(val)
#define	GIC_DIST_ICDICTR_LSPI_GET(reg)
#define	GIC_DIST_ICDICTR_LSPI_SET(reg, val)
#define	GIC_DIST_ICDICTR_SECURITY_EXTN   BSP_BIT32(10)
#define	GIC_DIST_ICDICTR_CPU_NUMBER(val)
#define	GIC_DIST_ICDICTR_CPU_NUMBER_GET(reg)
#define	GIC_DIST_ICDICTR_CPU_NUMBER_SET(reg, val)
#define	GIC_DIST_ICDICTR_IT_LINES_NUMBER(val)
#define	GIC_DIST_ICDICTR_IT_LINES_NUMBER_GET(reg)
#define	GIC_DIST_ICDICTR_IT_LINES_NUMBER_SET(reg, val)
#define	GIC_DIST_ICDIIDR_PRODUCT_ID(val)
#define	GIC_DIST_ICDIIDR_PRODUCT_ID_GET(reg)
#define	GIC_DIST_ICDIIDR_PRODUCT_ID_SET(reg, val)
#define	GIC_DIST_ICDIIDR_VARIANT(val)
#define	GIC_DIST_ICDIIDR_VARIANT_GET(reg)
#define	GIC_DIST_ICDIIDR_VARIANT_SET(reg, val)
#define	GIC_DIST_ICDIIDR_REVISION(val)
#define	GIC_DIST_ICDIIDR_REVISION_GET(reg)
#define	GIC_DIST_ICDIIDR_REVISION_SET(reg, val)
#define	GIC_DIST_ICDIIDR_IMPLEMENTER(val)
#define	GIC_DIST_ICDIIDR_IMPLEMENTER_GET(reg)
#define	GIC_DIST_ICDIIDR_IMPLEMENTER_SET(reg, val)
#define	GIC_DIST_ICDSGIR_TARGET_LIST_FILTER(val)
#define	GIC_DIST_ICDSGIR_TARGET_LIST_FILTER_GET(reg)
#define	GIC_DIST_ICDSGIR_TARGET_LIST_FILTER_SET(reg, val)
#define	GIC_DIST_ICDSGIR_CPU_TARGET_LIST(val)
#define	GIC_DIST_ICDSGIR_CPU_TARGET_LIST_GET(reg)
#define	GIC_DIST_ICDSGIR_CPU_TARGET_LIST_SET(reg, val)
#define	GIC_DIST_ICDSGIR_NSATT   BSP_BIT32(15)
#define	GIC_DIST_ICDSGIR_SGIINTID(val)
#define	GIC_DIST_ICDSGIR_SGIINTID_GET(reg)
#define	GIC_DIST_ICDSGIR_SGIINTID_SET(reg, val)
#define	GIC_REDIST_ICRRCR_UWP   BSP_BIT32(31)
#define	GIC_REDIST_ICRRCR_DPG1S   BSP_BIT32(26)
#define	GIC_REDIST_ICRRCR_DPG1NS   BSP_BIT32(25)
#define	GIC_REDIST_ICRRCR_DPG0   BSP_BIT32(24)
#define	GIC_REDIST_ICRRCR_RWP   BSP_BIT32(4)
#define	GIC_REDIST_ICRRCR_ENABLE_LPI   BSP_BIT32(0)
#define	GIC_REDIST_ICRTYPER_AFFINITY_VALUE(val)
#define	GIC_REDIST_ICRTYPER_AFFINITY_VALUE_GET(reg)
#define	GIC_REDIST_ICRTYPER_AFFINITY_VALUE_SET(reg, val)
#define	GIC_REDIST_ICRTYPER_COMMON_LPI_AFFINITY(val)
#define	GIC_REDIST_ICRTYPER_COMMON_LPI_AFFINITY_GET(reg)
#define	GIC_REDIST_ICRTYPER_COMMON_LPI_AFFINITY_SET(reg, val)
#define	GIC_REDIST_ICRTYPER_CPU_NUMBER(val)
#define	GIC_REDIST_ICRTYPER_CPU_NUMBER_GET(reg)
#define	GIC_REDIST_ICRTYPER_CPU_NUMBER_SET(reg, val)
#define	GIC_REDIST_ICRTYPER_DPGS   BSP_BIT64(5)
#define	GIC_REDIST_ICRTYPER_LAST   BSP_BIT64(4)
#define	GIC_REDIST_ICRTYPER_DIRECT_LPI   BSP_BIT64(3)
#define	GIC_REDIST_ICRTYPER_VLPIS   BSP_BIT64(1)
#define	GIC_REDIST_ICRTYPER_PLPIS   BSP_BIT64(0)
#define	GIC_REDIST_ICRWAKER_CHILDREN_ASLEEP   BSP_BIT32(2)
#define	GIC_REDIST_ICRWAKER_PROCESSOR_SLEEP   BSP_BIT32(1)

Detailed Description

This header file provides interfaces of the ARM Generic Interrupt Controller (GIC) memory-mapped registers.

Macro Definition Documentation

GIC_CPUIF_ICCABPR_BINARY_POINT

#define GIC_CPUIF_ICCABPR_BINARY_POINT

(

val

)

Value:

BSP_FLD32(val, 0, 2)

GIC_CPUIF_ICCABPR_BINARY_POINT_GET

#define GIC_CPUIF_ICCABPR_BINARY_POINT_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 0, 2)

GIC_CPUIF_ICCABPR_BINARY_POINT_SET

#define GIC_CPUIF_ICCABPR_BINARY_POINT_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 0, 2)

GIC_CPUIF_ICCBPR_BINARY_POINT

#define GIC_CPUIF_ICCBPR_BINARY_POINT

(

val

)

Value:

BSP_FLD32(val, 0, 2)

GIC_CPUIF_ICCBPR_BINARY_POINT_GET

#define GIC_CPUIF_ICCBPR_BINARY_POINT_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 0, 2)

GIC_CPUIF_ICCBPR_BINARY_POINT_SET

#define GIC_CPUIF_ICCBPR_BINARY_POINT_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 0, 2)

GIC_CPUIF_ICCEOIR_CPUID

#define GIC_CPUIF_ICCEOIR_CPUID

(

val

)

Value:

BSP_FLD32(val, 10, 12)

GIC_CPUIF_ICCEOIR_CPUID_GET

#define GIC_CPUIF_ICCEOIR_CPUID_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 10, 12)

GIC_CPUIF_ICCEOIR_CPUID_SET

#define GIC_CPUIF_ICCEOIR_CPUID_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 10, 12)

GIC_CPUIF_ICCEOIR_EOIINTID

#define GIC_CPUIF_ICCEOIR_EOIINTID

(

val

)

Value:

BSP_FLD32(val, 0, 9)

GIC_CPUIF_ICCEOIR_EOIINTID_GET

#define GIC_CPUIF_ICCEOIR_EOIINTID_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 0, 9)

GIC_CPUIF_ICCEOIR_EOIINTID_SET

#define GIC_CPUIF_ICCEOIR_EOIINTID_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 0, 9)

GIC_CPUIF_ICCHPIR_CPUID

#define GIC_CPUIF_ICCHPIR_CPUID

(

val

)

Value:

BSP_FLD32(val, 10, 12)

GIC_CPUIF_ICCHPIR_CPUID_GET

#define GIC_CPUIF_ICCHPIR_CPUID_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 10, 12)

GIC_CPUIF_ICCHPIR_CPUID_SET

#define GIC_CPUIF_ICCHPIR_CPUID_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 10, 12)

GIC_CPUIF_ICCHPIR_PENDINTID

#define GIC_CPUIF_ICCHPIR_PENDINTID

(

val

)

Value:

BSP_FLD32(val, 0, 9)

GIC_CPUIF_ICCHPIR_PENDINTID_GET

#define GIC_CPUIF_ICCHPIR_PENDINTID_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 0, 9)

GIC_CPUIF_ICCHPIR_PENDINTID_SET

#define GIC_CPUIF_ICCHPIR_PENDINTID_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 0, 9)

GIC_CPUIF_ICCIAR_ACKINTID

#define GIC_CPUIF_ICCIAR_ACKINTID

(

val

)

Value:

BSP_FLD32(val, 0, 9)

GIC_CPUIF_ICCIAR_ACKINTID_GET

#define GIC_CPUIF_ICCIAR_ACKINTID_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 0, 9)

GIC_CPUIF_ICCIAR_ACKINTID_SET

#define GIC_CPUIF_ICCIAR_ACKINTID_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 0, 9)

GIC_CPUIF_ICCIAR_CPUID

#define GIC_CPUIF_ICCIAR_CPUID

(

val

)

Value:

BSP_FLD32(val, 10, 12)

GIC_CPUIF_ICCIAR_CPUID_GET

#define GIC_CPUIF_ICCIAR_CPUID_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 10, 12)

GIC_CPUIF_ICCIAR_CPUID_SET

#define GIC_CPUIF_ICCIAR_CPUID_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 10, 12)

GIC_CPUIF_ICCIIDR_ARCH_VERSION

#define GIC_CPUIF_ICCIIDR_ARCH_VERSION

(

val

)

Value:

BSP_FLD32(val, 16, 19)

GIC_CPUIF_ICCIIDR_ARCH_VERSION_GET

#define GIC_CPUIF_ICCIIDR_ARCH_VERSION_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 16, 19)

GIC_CPUIF_ICCIIDR_ARCH_VERSION_SET

#define GIC_CPUIF_ICCIIDR_ARCH_VERSION_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 16, 19)

GIC_CPUIF_ICCIIDR_IMPLEMENTER

#define GIC_CPUIF_ICCIIDR_IMPLEMENTER

(

val

)

Value:

BSP_FLD32(val, 0, 11)

GIC_CPUIF_ICCIIDR_IMPLEMENTER_GET

#define GIC_CPUIF_ICCIIDR_IMPLEMENTER_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 0, 11)

GIC_CPUIF_ICCIIDR_IMPLEMENTER_SET

#define GIC_CPUIF_ICCIIDR_IMPLEMENTER_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 0, 11)

GIC_CPUIF_ICCIIDR_PRODUCT_ID

#define GIC_CPUIF_ICCIIDR_PRODUCT_ID

(

val

)

Value:

BSP_FLD32(val, 24, 31)

GIC_CPUIF_ICCIIDR_PRODUCT_ID_GET

#define GIC_CPUIF_ICCIIDR_PRODUCT_ID_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 24, 31)

GIC_CPUIF_ICCIIDR_PRODUCT_ID_SET

#define GIC_CPUIF_ICCIIDR_PRODUCT_ID_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 24, 31)

GIC_CPUIF_ICCIIDR_REVISION

#define GIC_CPUIF_ICCIIDR_REVISION

(

val

)

Value:

BSP_FLD32(val, 12, 15)

GIC_CPUIF_ICCIIDR_REVISION_GET

#define GIC_CPUIF_ICCIIDR_REVISION_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 12, 15)

GIC_CPUIF_ICCIIDR_REVISION_SET

#define GIC_CPUIF_ICCIIDR_REVISION_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 12, 15)

GIC_CPUIF_ICCPMR_PRIORITY

#define GIC_CPUIF_ICCPMR_PRIORITY

(

val

)

Value:

BSP_FLD32(val, 0, 7)

GIC_CPUIF_ICCPMR_PRIORITY_GET

#define GIC_CPUIF_ICCPMR_PRIORITY_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 0, 7)

GIC_CPUIF_ICCPMR_PRIORITY_SET

#define GIC_CPUIF_ICCPMR_PRIORITY_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 0, 7)

GIC_CPUIF_ICCRPR_PRIORITY

#define GIC_CPUIF_ICCRPR_PRIORITY

(

val

)

Value:

BSP_FLD32(val, 0, 7)

GIC_CPUIF_ICCRPR_PRIORITY_GET

#define GIC_CPUIF_ICCRPR_PRIORITY_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 0, 7)

GIC_CPUIF_ICCRPR_PRIORITY_SET

#define GIC_CPUIF_ICCRPR_PRIORITY_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 0, 7)

GIC_DIST_ICDICTR_CPU_NUMBER

#define GIC_DIST_ICDICTR_CPU_NUMBER

(

val

)

Value:

BSP_FLD32(val, 5, 7)

GIC_DIST_ICDICTR_CPU_NUMBER_GET

#define GIC_DIST_ICDICTR_CPU_NUMBER_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 5, 7)

GIC_DIST_ICDICTR_CPU_NUMBER_SET

#define GIC_DIST_ICDICTR_CPU_NUMBER_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 5, 7)

GIC_DIST_ICDICTR_IT_LINES_NUMBER

#define GIC_DIST_ICDICTR_IT_LINES_NUMBER

(

val

)

Value:

BSP_FLD32(val, 0, 4)

GIC_DIST_ICDICTR_IT_LINES_NUMBER_GET

#define GIC_DIST_ICDICTR_IT_LINES_NUMBER_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 0, 4)

GIC_DIST_ICDICTR_IT_LINES_NUMBER_SET

#define GIC_DIST_ICDICTR_IT_LINES_NUMBER_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 0, 4)

GIC_DIST_ICDICTR_LSPI

#define GIC_DIST_ICDICTR_LSPI

(

val

)

Value:

BSP_FLD32(val, 11, 15)

GIC_DIST_ICDICTR_LSPI_GET

#define GIC_DIST_ICDICTR_LSPI_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 11, 15)

GIC_DIST_ICDICTR_LSPI_SET

#define GIC_DIST_ICDICTR_LSPI_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 11, 15)

GIC_DIST_ICDIIDR_IMPLEMENTER

#define GIC_DIST_ICDIIDR_IMPLEMENTER

(

val

)

Value:

BSP_FLD32(val, 0, 11)

GIC_DIST_ICDIIDR_IMPLEMENTER_GET

#define GIC_DIST_ICDIIDR_IMPLEMENTER_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 0, 11)

GIC_DIST_ICDIIDR_IMPLEMENTER_SET

#define GIC_DIST_ICDIIDR_IMPLEMENTER_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 0, 11)

GIC_DIST_ICDIIDR_PRODUCT_ID

#define GIC_DIST_ICDIIDR_PRODUCT_ID

(

val

)

Value:

BSP_FLD32(val, 24, 31)

GIC_DIST_ICDIIDR_PRODUCT_ID_GET

#define GIC_DIST_ICDIIDR_PRODUCT_ID_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 24, 31)

GIC_DIST_ICDIIDR_PRODUCT_ID_SET

#define GIC_DIST_ICDIIDR_PRODUCT_ID_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 24, 31)

GIC_DIST_ICDIIDR_REVISION

#define GIC_DIST_ICDIIDR_REVISION

(

val

)

Value:

BSP_FLD32(val, 12, 15)

GIC_DIST_ICDIIDR_REVISION_GET

#define GIC_DIST_ICDIIDR_REVISION_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 12, 15)

GIC_DIST_ICDIIDR_REVISION_SET

#define GIC_DIST_ICDIIDR_REVISION_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 12, 15)

GIC_DIST_ICDIIDR_VARIANT

#define GIC_DIST_ICDIIDR_VARIANT

(

val

)

Value:

BSP_FLD32(val, 16, 19)

GIC_DIST_ICDIIDR_VARIANT_GET

#define GIC_DIST_ICDIIDR_VARIANT_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 16, 19)

GIC_DIST_ICDIIDR_VARIANT_SET

#define GIC_DIST_ICDIIDR_VARIANT_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 16, 19)

GIC_DIST_ICDSGIR_CPU_TARGET_LIST

#define GIC_DIST_ICDSGIR_CPU_TARGET_LIST

(

val

)

Value:

BSP_FLD32(val, 16, 23)

GIC_DIST_ICDSGIR_CPU_TARGET_LIST_GET

#define GIC_DIST_ICDSGIR_CPU_TARGET_LIST_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 16, 23)

GIC_DIST_ICDSGIR_CPU_TARGET_LIST_SET

#define GIC_DIST_ICDSGIR_CPU_TARGET_LIST_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 16, 23)

GIC_DIST_ICDSGIR_SGIINTID

#define GIC_DIST_ICDSGIR_SGIINTID

(

val

)

Value:

BSP_FLD32(val, 0, 3)

GIC_DIST_ICDSGIR_SGIINTID_GET

#define GIC_DIST_ICDSGIR_SGIINTID_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 0, 3)

GIC_DIST_ICDSGIR_SGIINTID_SET

#define GIC_DIST_ICDSGIR_SGIINTID_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 0, 3)

GIC_DIST_ICDSGIR_TARGET_LIST_FILTER

#define GIC_DIST_ICDSGIR_TARGET_LIST_FILTER

(

val

)

Value:

BSP_FLD32(val, 24, 25)

GIC_DIST_ICDSGIR_TARGET_LIST_FILTER_GET

#define GIC_DIST_ICDSGIR_TARGET_LIST_FILTER_GET

(

reg

)

Value:

BSP_FLD32GET(reg, 24, 25)

GIC_DIST_ICDSGIR_TARGET_LIST_FILTER_SET

#define GIC_DIST_ICDSGIR_TARGET_LIST_FILTER_SET	(		reg,
			val )

Value:

BSP_FLD32SET(reg, val, 24, 25)

GIC_REDIST_ICRTYPER_AFFINITY_VALUE

#define GIC_REDIST_ICRTYPER_AFFINITY_VALUE

(

val

)

Value:

BSP_FLD64(val, 32, 63)

GIC_REDIST_ICRTYPER_AFFINITY_VALUE_GET

#define GIC_REDIST_ICRTYPER_AFFINITY_VALUE_GET

(

reg

)

Value:

BSP_FLD64GET(reg, 32, 63)

GIC_REDIST_ICRTYPER_AFFINITY_VALUE_SET

#define GIC_REDIST_ICRTYPER_AFFINITY_VALUE_SET	(		reg,
			val )

Value:

BSP_FLD64SET(reg, val, 32, 63)

GIC_REDIST_ICRTYPER_COMMON_LPI_AFFINITY

#define GIC_REDIST_ICRTYPER_COMMON_LPI_AFFINITY

(

val

)

Value:

BSP_FLD64(val, 24, 25)

GIC_REDIST_ICRTYPER_COMMON_LPI_AFFINITY_GET

#define GIC_REDIST_ICRTYPER_COMMON_LPI_AFFINITY_GET

(

reg

)

Value:

BSP_FLD64GET(reg, 24, 25)

GIC_REDIST_ICRTYPER_COMMON_LPI_AFFINITY_SET

#define GIC_REDIST_ICRTYPER_COMMON_LPI_AFFINITY_SET	(		reg,
			val )

Value:

BSP_FLD64SET(reg, val, 24, 25)

GIC_REDIST_ICRTYPER_CPU_NUMBER

#define GIC_REDIST_ICRTYPER_CPU_NUMBER

(

val

)

Value:

BSP_FLD64(val, 8, 23)

GIC_REDIST_ICRTYPER_CPU_NUMBER_GET

#define GIC_REDIST_ICRTYPER_CPU_NUMBER_GET

(

reg

)

Value:

BSP_FLD64GET(reg, 8, 23)

GIC_REDIST_ICRTYPER_CPU_NUMBER_SET

#define GIC_REDIST_ICRTYPER_CPU_NUMBER_SET	(		reg,
			val )

Value:

BSP_FLD64SET(reg, val, 8, 23)