RTEMS  5.1
Data Fields

Usart hardware registers. More...

#include <component_usart.h>

Data Fields

__O uint32_t US_CR
 (Usart Offset: 0x0000) Control Register
 
__IO uint32_t US_MR
 (Usart Offset: 0x0004) Mode Register
 
__O uint32_t US_IER
 (Usart Offset: 0x0008) Interrupt Enable Register
 
__O uint32_t US_IDR
 (Usart Offset: 0x000C) Interrupt Disable Register
 
__I uint32_t US_IMR
 (Usart Offset: 0x0010) Interrupt Mask Register
 
__I uint32_t US_CSR
 (Usart Offset: 0x0014) Channel Status Register
 
__I uint32_t US_RHR
 (Usart Offset: 0x0018) Receive Holding Register
 
__O uint32_t US_THR
 (Usart Offset: 0x001C) Transmit Holding Register
 
__IO uint32_t US_BRGR
 (Usart Offset: 0x0020) Baud Rate Generator Register
 
__IO uint32_t US_RTOR
 (Usart Offset: 0x0024) Receiver Time-out Register
 
__IO uint32_t US_TTGR
 (Usart Offset: 0x0028) Transmitter Timeguard Register
 
__I uint32_t Reserved1 [5]
 
__IO uint32_t US_FIDI
 (Usart Offset: 0x0040) FI DI Ratio Register
 
__I uint32_t US_NER
 (Usart Offset: 0x0044) Number of Errors Register
 
__I uint32_t Reserved2 [1]
 
__IO uint32_t US_IF
 (Usart Offset: 0x004C) IrDA Filter Register
 
__IO uint32_t US_MAN
 (Usart Offset: 0x0050) Manchester Configuration Register
 
__IO uint32_t US_LINMR
 (Usart Offset: 0x0054) LIN Mode Register
 
__IO uint32_t US_LINIR
 (Usart Offset: 0x0058) LIN Identifier Register
 
__I uint32_t US_LINBRR
 (Usart Offset: 0x005C) LIN Baud Rate Register
 
__IO uint32_t US_LONMR
 (Usart Offset: 0x0060) LON Mode Register
 
__IO uint32_t US_LONPR
 (Usart Offset: 0x0064) LON Preamble Register
 
__IO uint32_t US_LONDL
 (Usart Offset: 0x0068) LON Data Length Register
 
__IO uint32_t US_LONL2HDR
 (Usart Offset: 0x006C) LON L2HDR Register
 
__I uint32_t US_LONBL
 (Usart Offset: 0x0070) LON Backlog Register
 
__IO uint32_t US_LONB1TX
 (Usart Offset: 0x0074) LON Beta1 Tx Register
 
__IO uint32_t US_LONB1RX
 (Usart Offset: 0x0078) LON Beta1 Rx Register
 
__IO uint32_t US_LONPRIO
 (Usart Offset: 0x007C) LON Priority Register
 
__IO uint32_t US_IDTTX
 (Usart Offset: 0x0080) LON IDT Tx Register
 
__IO uint32_t US_IDTRX
 (Usart Offset: 0x0084) LON IDT Rx Register
 
__IO uint32_t US_ICDIFF
 (Usart Offset: 0x0088) IC DIFF Register
 
__I uint32_t Reserved3 [22]
 
__IO uint32_t US_WPMR
 (Usart Offset: 0x00E4) Write Protection Mode Register
 
__I uint32_t US_WPSR
 (Usart Offset: 0x00E8) Write Protection Status Register
 
__I uint32_t Reserved4 [4]
 
__I uint32_t US_VERSION
 (Usart Offset: 0x00FC) Version Register
 

Detailed Description

Usart hardware registers.


The documentation for this struct was generated from the following file: