RTEMS  5.1
atsam-i2c.h
1 /*
2  * Copyright (c) 2016 embedded brains GmbH. All rights reserved.
3  *
4  * embedded brains GmbH
5  * Dornierstr. 4
6  * 82178 Puchheim
7  * Germany
8  * <info@embedded-brains.de>
9  *
10  * The license and distribution terms for this file may be
11  * found in the file LICENSE in this distribution or at
12  * http://www.rtems.org/license/LICENSE.
13  */
14 
15 #ifndef LIBBSP_ARM_ATSAM_ATSAM_I2C_H
16 #define LIBBSP_ARM_ATSAM_ATSAM_I2C_H
17 
18 #include <libchip/chip.h>
19 #include <libchip/include/pio.h>
20 
21 #include <bsp.h>
22 #include <rtems/thread.h>
23 #include <dev/i2c/i2c.h>
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif /* __cplusplus */
28 
29 #define TWI_AMOUNT_PINS 2
30 
31 typedef enum {
32  TX_SEND_DATA,
33  TX_SEND_STOP,
34  TX_CONT_MESSAGE_NEEDED,
35  RX_SEND_DATA,
36  RX_SEND_STOP,
37  RX_CONT_MESSAGE_NEEDED,
38  TX_RX_STOP_SENT
39 }transfer_state;
40 
41 typedef struct {
42  uint8_t status;
43  uint8_t *data;
44  bool stop_request;
45  uint32_t data_size;
46  uint32_t already_transferred;
47  transfer_state trans_state;
49 
50 typedef struct {
51  i2c_bus base;
52  i2c_msg *msgs;
53  Twihs *regs;
54  transfer_desc trans_desc;
55  uint32_t msg_todo;
56  uint32_t current_msg_todo;
57  uint8_t *current_msg_byte;
58  uint32_t output_clock;
59  bool read;
63 
64 int i2c_bus_register_atsam(
65  const char *bus_path,
66  Twihs *register_base,
68  const Pin pins[TWI_AMOUNT_PINS]
69 );
70 
71 #ifdef __cplusplus
72 }
73 #endif /* __cplusplus */
74 
75 #endif /* LIBBSP_ARM_ATSAM_ATSAM_I2C_H */
Definition: atsam-i2c.h:50
ssize_t read(int fd, void *buffer, size_t count)
Definition: read.c:27
Definition: thread.h:221
Definition: pio.h:172
I2C transfer message.
Definition: i2c.h:138
ISR_Vector_number rtems_vector_number
Control block type used to manage the vectors.
Definition: intr.h:47
I2C bus control.
Definition: i2c.h:110
Inter-Integrated Circuit (I2C) Driver API.
Twihs hardware registers.
Definition: component_twihs.h:41
Definition: atsam-i2c.h:41