RTEMS
threaddispatch.h
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1 
9 /*
10  * COPYRIGHT (c) 1989-2009.
11  * On-Line Applications Research Corporation (OAR).
12  *
13  * The license and distribution terms for this file may be
14  * found in the file LICENSE in this distribution or at
15  * http://www.rtems.org/license/LICENSE.
16  */
17 
18 #ifndef _RTEMS_SCORE_THREADDISPATCH_H
19 #define _RTEMS_SCORE_THREADDISPATCH_H
20 
21 #include <rtems/score/percpu.h>
22 #include <rtems/score/isrlock.h>
23 #include <rtems/score/profiling.h>
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif /* __cplusplus */
28 
35 #if defined(RTEMS_SMP) || ( CPU_ENABLE_ROBUST_THREAD_DISPATCH == TRUE )
36 
44 #define RTEMS_SCORE_ROBUST_THREAD_DISPATCH
45 #endif
46 
56 {
57  bool enabled;
58 
59 #if defined(RTEMS_SMP)
60  ISR_Level level;
61 
62  _ISR_Local_disable( level );
63 #endif
64 
65  enabled = _Thread_Dispatch_disable_level == 0;
66 
67 #if defined(RTEMS_SMP)
68  _ISR_Local_enable( level );
69 #endif
70 
71  return enabled;
72 }
73 
80 {
81  return _Thread_Dispatch_disable_level;
82 }
83 
90 {
91  _Thread_Dispatch_disable_level = 1;
92 }
93 
111 void _Thread_Dispatch( void );
112 
125 void _Thread_Dispatch_direct( Per_CPU_Control *cpu_self );
126 
140 void _Thread_Do_dispatch( Per_CPU_Control *cpu_self, ISR_Level level );
141 
153  Per_CPU_Control *cpu_self,
154  const ISR_lock_Context *lock_context
155 )
156 {
157  uint32_t disable_level;
158 
159  disable_level = cpu_self->thread_dispatch_disable_level;
161  cpu_self,
162  disable_level,
163  lock_context
164  );
165  cpu_self->thread_dispatch_disable_level = disable_level + 1;
166 
167  return cpu_self;
168 }
169 
180  const ISR_lock_Context *lock_context
181 )
182 {
183  return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
184 }
185 
192 {
193  Per_CPU_Control *cpu_self;
194  ISR_lock_Context lock_context;
195 
196 #if defined( RTEMS_SMP ) || defined( RTEMS_PROFILING )
197  _ISR_lock_ISR_disable( &lock_context );
198 #endif
199 
200  cpu_self = _Thread_Dispatch_disable_critical( &lock_context );
201 
202 #if defined( RTEMS_SMP ) || defined( RTEMS_PROFILING )
203  _ISR_lock_ISR_enable( &lock_context );
204 #endif
205 
206  return cpu_self;
207 }
208 
216 void _Thread_Dispatch_enable( Per_CPU_Control *cpu_self );
217 
224 {
225  _Assert( cpu_self->thread_dispatch_disable_level > 0 );
226  --cpu_self->thread_dispatch_disable_level;
227 }
228 
236  Per_CPU_Control *cpu_self,
237  Per_CPU_Control *cpu_target
238 )
239 {
240 #if defined( RTEMS_SMP )
241  if ( cpu_self == cpu_target ) {
242  cpu_self->dispatch_necessary = true;
243  } else {
244  _Atomic_Fetch_or_ulong( &cpu_target->message, 0, ATOMIC_ORDER_RELEASE );
245  _CPU_SMP_Send_interrupt( _Per_CPU_Get_index( cpu_target ) );
246  }
247 #else
248  cpu_self->dispatch_necessary = true;
249  (void) cpu_target;
250 #endif
251 }
252 
255 #ifdef __cplusplus
256 }
257 #endif /* __cplusplus */
258 
259 #endif /* _RTEMS_SCORE_THREADDISPATCH_H */
#define _ISR_Local_disable(_level)
Disables interrupts on this processor.
Definition: isrlevel.h:57
void _Thread_Dispatch_direct(Per_CPU_Control *cpu_self)
Directly do a thread dispatch.
Profiling Support API.
static __inline__ void _Thread_Dispatch_initialization(void)
Thread dispatch initialization.
#define _ISR_lock_ISR_enable(_context)
Restores the saved interrupt state of the ISR lock context.
Definition: isrlock.h:416
void _Thread_Do_dispatch(Per_CPU_Control *cpu_self, ISR_Level level)
Performs a thread dispatch on the current processor.
static __inline__ Per_CPU_Control * _Thread_Dispatch_disable_with_CPU(Per_CPU_Control *cpu_self, const ISR_lock_Context *lock_context)
Disables thread dispatching inside a critical section (interrupts disabled) with the current processo...
static __inline__ Per_CPU_Control * _Thread_Dispatch_disable_critical(const ISR_lock_Context *lock_context)
Disables thread dispatching inside a critical section (interrupts disabled).
static void _Profiling_Thread_dispatch_disable_critical(Per_CPU_Control *cpu, uint32_t previous_thread_dispatch_disable_level, const ISR_lock_Context *lock_context)
Disables the thread dispatch.
Definition: profiling.h:80
Per CPU Core Structure.
Definition: percpu.h:347
uint32_t ISR_Level
Definition: isrlevel.h:41
static __inline__ bool _Thread_Dispatch_is_enabled(void)
Indicates if the executing thread is inside a thread dispatch critical section.
#define _ISR_Local_enable(_level)
Enables interrupts on this processor.
Definition: isrlevel.h:74
static __inline__ uint32_t _Thread_Dispatch_get_disable_level(void)
Gets thread dispatch disable level.
static __inline__ void _Thread_Dispatch_request(Per_CPU_Control *cpu_self, Per_CPU_Control *cpu_target)
Requests a thread dispatch on the target processor.
void _Thread_Dispatch_enable(Per_CPU_Control *cpu_self)
Enables thread dispatching.
volatile bool dispatch_necessary
This is set to true when this processor needs to run the thread dispatcher.
Definition: percpu.h:400
static __inline__ Per_CPU_Control * _Thread_Dispatch_disable(void)
Disables thread dispatching.
void _Thread_Dispatch(void)
Performs a thread dispatch if necessary.
volatile uint32_t thread_dispatch_disable_level
The thread dispatch critical section nesting counter which is used to prevent context switches at ino...
Definition: percpu.h:385
#define _ISR_lock_ISR_disable(_context)
Disables interrupts and saves the previous interrupt state in the ISR lock context.
Definition: isrlock.h:392
Atomic_Ulong message
Bit field for SMP messages.
Definition: percpu.h:505
Local ISR lock context for acquire and release pairs.
Definition: isrlock.h:65
#define RTEMS_INLINE_ROUTINE
Gives a hint to the compiler in a function declaration to inline this function.
Definition: basedefs.h:683
ISR Locks.
static __inline__ void _Thread_Dispatch_unnest(Per_CPU_Control *cpu_self)
Unnests thread dispatching.
#define _Assert(_e)
Assertion similar to assert() controlled via RTEMS_DEBUG instead of NDEBUG.
Definition: assert.h:100