23 #ifndef _RTEMS_SCORE_SPARC_H 24 #define _RTEMS_SCORE_SPARC_H 55 #define SPARC_HAS_BITSCAN 0 63 #define SPARC_NUMBER_OF_REGISTER_WINDOWS 8 69 #if defined(__FIX_LEON3FT_B2BST) 70 #define SPARC_LEON3FT_B2BST_NOP nop 72 #define SPARC_LEON3FT_B2BST_NOP 80 #if defined(_SOFT_FLOAT) 81 #define SPARC_HAS_FPU 0 83 #define SPARC_HAS_FPU 1 91 #define CPU_MODEL_NAME "w/FPU" 93 #define CPU_MODEL_NAME "w/soft-float" 99 #define CPU_NAME "SPARC" 110 #if (SPARC_NUMBER_OF_REGISTER_WINDOWS == 8) 111 #define SPARC_PSR_CWP_MASK 0x07 112 #elif (SPARC_NUMBER_OF_REGISTER_WINDOWS == 16) 113 #define SPARC_PSR_CWP_MASK 0x0F 114 #elif (SPARC_NUMBER_OF_REGISTER_WINDOWS == 32) 115 #define SPARC_PSR_CWP_MASK 0x1F 117 #error "Unsupported number of register windows for this cpu" 121 #define SPARC_PSR_ET_MASK 0x00000020 123 #define SPARC_PSR_PS_MASK 0x00000040 125 #define SPARC_PSR_S_MASK 0x00000080 127 #define SPARC_PSR_PIL_MASK 0x00000F00 129 #define SPARC_PSR_EF_MASK 0x00001000 131 #define SPARC_PSR_EC_MASK 0x00002000 133 #define SPARC_PSR_ICC_MASK 0x00F00000 135 #define SPARC_PSR_VER_MASK 0x0F000000 137 #define SPARC_PSR_IMPL_MASK 0xF0000000 140 #define SPARC_PSR_CWP_BIT_POSITION 0 142 #define SPARC_PSR_ET_BIT_POSITION 5 144 #define SPARC_PSR_PS_BIT_POSITION 6 146 #define SPARC_PSR_S_BIT_POSITION 7 148 #define SPARC_PSR_PIL_BIT_POSITION 8 150 #define SPARC_PSR_EF_BIT_POSITION 12 152 #define SPARC_PSR_EC_BIT_POSITION 13 154 #define SPARC_PSR_ICC_BIT_POSITION 20 156 #define SPARC_PSR_VER_BIT_POSITION 24 158 #define SPARC_PSR_IMPL_BIT_POSITION 28 160 #define LEON3_ASR17_PROCESSOR_INDEX_SHIFT 28 163 #define SPARC_SWTRAP_SYSCALL 0 164 #define SPARC_SWTRAP_IRQDIS 9 165 #define SPARC_SWTRAP_IRQEN 10 166 #if SPARC_HAS_FPU == 1 167 #define SPARC_SWTRAP_IRQDIS_FP 11 177 __asm__ volatile ( "nop" ); \ 185 #if defined(RTEMS_PARAVIRT) 187 uint32_t _SPARC_Get_PSR(
void );
189 #define sparc_get_psr( _psr ) \ 190 (_psr) = _SPARC_Get_PSR() 194 #define sparc_get_psr( _psr ) \ 197 __asm__ volatile( "rd %%psr, %0" : "=r" (_psr) : "0" (_psr) ); \ 207 #if defined(RTEMS_PARAVIRT) 209 void _SPARC_Set_PSR( uint32_t new_psr );
211 #define sparc_set_psr( _psr ) \ 212 _SPARC_Set_PSR( _psr ) 216 #define sparc_set_psr( _psr ) \ 218 __asm__ volatile ( "mov %0, %%psr " : "=r" ((_psr)) : "0" ((_psr)) ); \ 231 #if defined(RTEMS_PARAVIRT) 233 uint32_t _SPARC_Get_TBR(
void );
235 #define sparc_get_tbr( _tbr ) \ 236 (_tbr) = _SPARC_Get_TBR() 240 #define sparc_get_tbr( _tbr ) \ 243 __asm__ volatile( "rd %%tbr, %0" : "=r" (_tbr) : "0" (_tbr) ); \ 253 #if defined(RTEMS_PARAVIRT) 255 void _SPARC_Set_TBR( uint32_t new_tbr );
257 #define sparc_set_tbr( _tbr ) \ 258 _SPARC_Set_TBR((_tbr)) 262 #define sparc_set_tbr( _tbr ) \ 264 __asm__ volatile( "wr %0, 0, %%tbr" : "=r" (_tbr) : "0" (_tbr) ); \ 274 #define sparc_get_wim( _wim ) \ 276 __asm__ volatile( "rd %%wim, %0" : "=r" (_wim) : "0" (_wim) ); \ 284 #define sparc_set_wim( _wim ) \ 286 __asm__ volatile( "wr %0, %%wim" : "=r" (_wim) : "0" (_wim) ); \ 297 #define sparc_get_y( _y ) \ 299 __asm__ volatile( "rd %%y, %0" : "=r" (_y) : "0" (_y) ); \ 307 #define sparc_set_y( _y ) \ 309 __asm__ volatile( "wr %0, %%y" : "=r" (_y) : "0" (_y) ); \ 321 register uint32_t psr __asm__(
"g1");
322 __asm__
volatile (
"ta %1\n\t" :
"=r" (psr) :
"i" (SPARC_SWTRAP_IRQDIS));
335 register uint32_t _psr __asm__(
"g1") = psr;
343 __asm__
volatile (
"ta %0\nnop\n" ::
"i" (SPARC_SWTRAP_IRQEN),
"r" (_psr));
378 #define sparc_flash_interrupts( _psr ) \ 380 sparc_enable_interrupts( (_psr) ); \ 381 _psr = sparc_disable_interrupts(); \ 391 #define sparc_get_interrupt_level( _level ) \ 393 uint32_t _psr_level = 0; \ 395 sparc_get_psr( _psr_level ); \ 397 (_psr_level & SPARC_PSR_PIL_MASK) >> SPARC_PSR_PIL_BIT_POSITION; \ 400 static inline uint32_t _LEON3_Get_current_processor(
void )
409 return asr17 >> LEON3_ASR17_PROCESSOR_INDEX_SHIFT;
static uint32_t sparc_disable_interrupts(void)
SPARC disable processor interrupts.
static void sparc_enable_interrupts(uint32_t psr)
SPARC enable processor interrupts.
#define RTEMS_NO_RETURN
Tells the compiler in a function declaration that this function does not return.
void sparc_syscall_exit(uint32_t exitcode1, uint32_t exitcode2) RTEMS_NO_RETURN
SPARC exit through system call 1.
This header file provides basic definitions used by the API and the implementation.