_clock_video_pll_config Struct Reference

PLL configuration for AUDIO and VIDEO. More...

#include <fsl_clock.h>

Data Fields
uint8_t	loopDivider
uint8_t	postDivider
uint32_t	numerator
uint32_t	denominator
uint8_t	src

Detailed Description

PLL configuration for AUDIO and VIDEO.

Field Documentation

denominator

uint32_t _clock_video_pll_config::denominator

30 bit denominator of fractional loop divider

loopDivider

uint8_t _clock_video_pll_config::loopDivider

PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.

numerator

uint32_t _clock_video_pll_config::numerator

30 bit numerator of fractional loop divider.

postDivider

uint8_t _clock_video_pll_config::postDivider

Divider after the PLL, should only be 1, 2, 4, 8, 16.

src

uint8_t _clock_video_pll_config::src

Pll clock source, reference _clock_pll_clk_src

---

The documentation for this struct was generated from the following file:

• bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/drivers/fsl_clock.h