RTEMS 6.1-rc6
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Data Fields
_clock_arm_pll_config Struct Reference

PLL configuration for ARM. More...

#include <fsl_clock.h>

Data Fields

uint32_t loopDivider
 
uint8_t src
 
clock_pll_post_div_t postDivider
 

Detailed Description

PLL configuration for ARM.

The output clock frequency is:

Fout=Fin*loopDivider /(2 * postDivider).

Fin is always 24MHz.

Field Documentation

◆ src

uint8_t _clock_arm_pll_config::src

Pll clock source, reference _clock_pll_clk_src


The documentation for this struct was generated from the following files: