20#ifndef STM32H7xx_HAL_PCD_H
21#define STM32H7xx_HAL_PCD_H
30#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
51 HAL_PCD_STATE_RESET = 0x00,
52 HAL_PCD_STATE_READY = 0x01,
53 HAL_PCD_STATE_ERROR = 0x02,
54 HAL_PCD_STATE_BUSY = 0x03,
55 HAL_PCD_STATE_TIMEOUT = 0x04
65} PCD_LPM_StateTypeDef;
69 PCD_LPM_L0_ACTIVE = 0x00,
70 PCD_LPM_L1_ACTIVE = 0x01,
76 PCD_BCD_CONTACT_DETECTION = 0xFE,
77 PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
78 PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,
79 PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,
80 PCD_BCD_DISCOVERY_COMPLETED = 0x00,
84#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
86typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
87typedef USB_OTG_EPTypeDef PCD_EPTypeDef;
93#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
94typedef struct __PCD_HandleTypeDef
99 PCD_TypeDef *Instance;
100 PCD_InitTypeDef Init;
101 __IO uint8_t USB_Address;
102 PCD_EPTypeDef IN_ep[16];
103 PCD_EPTypeDef OUT_ep[16];
105 __IO PCD_StateTypeDef State;
106 __IO uint32_t ErrorCode;
108 PCD_LPM_StateTypeDef LPM_State;
110 uint32_t FrameNumber;
116 uint32_t battery_charging_active;
120#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
121 void (* SOFCallback)(
struct __PCD_HandleTypeDef *hpcd);
122 void (* SetupStageCallback)(
struct __PCD_HandleTypeDef *hpcd);
123 void (* ResetCallback)(
struct __PCD_HandleTypeDef *hpcd);
124 void (* SuspendCallback)(
struct __PCD_HandleTypeDef *hpcd);
125 void (* ResumeCallback)(
struct __PCD_HandleTypeDef *hpcd);
126 void (* ConnectCallback)(
struct __PCD_HandleTypeDef *hpcd);
127 void (* DisconnectCallback)(
struct __PCD_HandleTypeDef *hpcd);
129 void (* DataOutStageCallback)(
struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);
130 void (* DataInStageCallback)(
struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);
131 void (* ISOOUTIncompleteCallback)(
struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);
132 void (* ISOINIncompleteCallback)(
struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);
133 void (* BCDCallback)(
struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef
msg);
134 void (* LPMCallback)(
struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef
msg);
136 void (* MspInitCallback)(
struct __PCD_HandleTypeDef *hpcd);
137 void (* MspDeInitCallback)(
struct __PCD_HandleTypeDef *hpcd);
158#define PCD_SPEED_HIGH USBD_HS_SPEED
159#define PCD_SPEED_HIGH_IN_FULL USBD_HSINFS_SPEED
160#define PCD_SPEED_FULL USBD_FS_SPEED
169#define PCD_PHY_ULPI 1U
170#define PCD_PHY_EMBEDDED 2U
171#define PCD_PHY_UTMI 3U
181#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
182#define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U)
199#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
200#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
202#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
203 ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
205#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
206#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
207#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
209#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) \
210 *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK)
212#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) \
213 *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
215#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) \
216 ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
218#define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT() EXTI_D1->IMR2 |= (USB_OTG_HS_WAKEUP_EXTI_LINE)
219#define __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT() EXTI_D1->IMR2 &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE)
220#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI_D1->IMR2 |= (USB_OTG_FS_WAKEUP_EXTI_LINE)
221#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI_D1->IMR2 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
240void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
241void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
243#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
251 HAL_PCD_SOF_CB_ID = 0x01,
252 HAL_PCD_SETUPSTAGE_CB_ID = 0x02,
253 HAL_PCD_RESET_CB_ID = 0x03,
254 HAL_PCD_SUSPEND_CB_ID = 0x04,
255 HAL_PCD_RESUME_CB_ID = 0x05,
256 HAL_PCD_CONNECT_CB_ID = 0x06,
257 HAL_PCD_DISCONNECT_CB_ID = 0x07,
259 HAL_PCD_MSPINIT_CB_ID = 0x08,
260 HAL_PCD_MSPDEINIT_CB_ID = 0x09
262} HAL_PCD_CallbackIDTypeDef;
273typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);
274typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);
275typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);
276typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);
277typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);
278typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef
msg);
279typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef
msg);
285HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
286 pPCD_CallbackTypeDef pCallback);
288HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
291 pPCD_DataOutStageCallbackTypeDef pCallback);
293HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
296 pPCD_DataInStageCallbackTypeDef pCallback);
301 pPCD_IsoOutIncpltCallbackTypeDef pCallback);
303HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
306 pPCD_IsoInIncpltCallbackTypeDef pCallback);
310HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback);
313HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback);
327void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
329void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
330void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
331void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
332void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
333void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
334void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
335void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
337void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
338void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
339void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
340void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
352HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
354HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
355HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
362#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
363HAL_StatusTypeDef HAL_PCD_SetTestMode(
const PCD_HandleTypeDef *hpcd, uint8_t testmode);
366uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef
const *hpcd, uint8_t ep_addr);
375PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef
const *hpcd);
393#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
394#define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 12)
395#define USB_OTG_HS_WAKEUP_EXTI_LINE (0x1U << 11)
406#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
407#ifndef USB_OTG_DOEPINT_OTEPSPR
408#define USB_OTG_DOEPINT_OTEPSPR (0x1UL << 5)
411#ifndef USB_OTG_DOEPMSK_OTEPSPRM
412#define USB_OTG_DOEPMSK_OTEPSPRM (0x1UL << 5)
415#ifndef USB_OTG_DOEPINT_NAK
416#define USB_OTG_DOEPINT_NAK (0x1UL << 13)
419#ifndef USB_OTG_DOEPMSK_NAKM
420#define USB_OTG_DOEPMSK_NAKM (0x1UL << 13)
423#ifndef USB_OTG_DOEPINT_STPKTRX
424#define USB_OTG_DOEPINT_STPKTRX (0x1UL << 15)
427#ifndef USB_OTG_DOEPMSK_NYETM
428#define USB_OTG_DOEPMSK_NYETM (0x1UL << 14)
#define __IO
Definition: core_cm4.h:239
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58
Header file of PCD HAL Extension module.
Header file of USB Low Layer HAL module.
USB_OTG_Core_Registers.
Definition: stm32h723xx.h:1761
Definition: b1553brm.c:94