RTEMS 6.1-rc6
Loading...
Searching...
No Matches
stm32h7xx_hal_i2c.h
Go to the documentation of this file.
1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_I2C_H
21#define STM32H7xx_HAL_I2C_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
38/* Exported types ------------------------------------------------------------*/
49typedef struct
50{
51 uint32_t Timing;
55 uint32_t OwnAddress1;
58 uint32_t AddressingMode;
61 uint32_t DualAddressMode;
64 uint32_t OwnAddress2;
67 uint32_t OwnAddress2Masks;
71 uint32_t GeneralCallMode;
74 uint32_t NoStretchMode;
77} I2C_InitTypeDef;
78
111typedef enum
112{
113 HAL_I2C_STATE_RESET = 0x00U,
114 HAL_I2C_STATE_READY = 0x20U,
115 HAL_I2C_STATE_BUSY = 0x24U,
116 HAL_I2C_STATE_BUSY_TX = 0x21U,
117 HAL_I2C_STATE_BUSY_RX = 0x22U,
118 HAL_I2C_STATE_LISTEN = 0x28U,
119 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U,
121 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU,
123 HAL_I2C_STATE_ABORT = 0x60U,
125} HAL_I2C_StateTypeDef;
126
150typedef enum
151{
152 HAL_I2C_MODE_NONE = 0x00U,
153 HAL_I2C_MODE_MASTER = 0x10U,
154 HAL_I2C_MODE_SLAVE = 0x20U,
155 HAL_I2C_MODE_MEM = 0x40U
157} HAL_I2C_ModeTypeDef;
158
168#define HAL_I2C_ERROR_NONE (0x00000000U)
169#define HAL_I2C_ERROR_BERR (0x00000001U)
170#define HAL_I2C_ERROR_ARLO (0x00000002U)
171#define HAL_I2C_ERROR_AF (0x00000004U)
172#define HAL_I2C_ERROR_OVR (0x00000008U)
173#define HAL_I2C_ERROR_DMA (0x00000010U)
174#define HAL_I2C_ERROR_TIMEOUT (0x00000020U)
175#define HAL_I2C_ERROR_SIZE (0x00000040U)
176#define HAL_I2C_ERROR_DMA_PARAM (0x00000080U)
177#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
178#define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U)
179#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
180#define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U)
190typedef struct __I2C_HandleTypeDef
191{
192 I2C_TypeDef *Instance;
194 I2C_InitTypeDef Init;
196 uint8_t *pBuffPtr;
198 uint16_t XferSize;
200 __IO uint16_t XferCount;
202 __IO uint32_t XferOptions;
205 __IO uint32_t PreviousState;
207 HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
210 DMA_HandleTypeDef *hdmatx;
212 DMA_HandleTypeDef *hdmarx;
215 HAL_LockTypeDef Lock;
217 __IO HAL_I2C_StateTypeDef State;
219 __IO HAL_I2C_ModeTypeDef Mode;
221 __IO uint32_t ErrorCode;
223 __IO uint32_t AddrEventCount;
225 __IO uint32_t Devaddress;
227 __IO uint32_t Memaddress;
229#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
230 void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
232 void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
234 void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
236 void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
238 void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
240 void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
242 void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
244 void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c);
246 void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
249 void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
252 void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c);
254 void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c);
257#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
258} I2C_HandleTypeDef;
259
260#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
264typedef enum
265{
266 HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U,
267 HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U,
268 HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U,
269 HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U,
270 HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U,
271 HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U,
272 HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U,
273 HAL_I2C_ERROR_CB_ID = 0x07U,
274 HAL_I2C_ABORT_CB_ID = 0x08U,
276 HAL_I2C_MSPINIT_CB_ID = 0x09U,
277 HAL_I2C_MSPDEINIT_CB_ID = 0x0AU
279} HAL_I2C_CallbackIDTypeDef;
280
284typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c);
286typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection,
287 uint16_t AddrMatchCode);
290#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
298/* Exported constants --------------------------------------------------------*/
299
309#define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
310#define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
311#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
312#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
313#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
314#define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE)
315
316/* List of XferOptions in usage of :
317 * 1- Restart condition in all use cases (direction change or not)
318 */
319#define I2C_OTHER_FRAME (0x000000AAU)
320#define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U)
329#define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
330#define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
339#define I2C_DUALADDRESS_DISABLE (0x00000000U)
340#define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
349#define I2C_OA2_NOMASK ((uint8_t)0x00U)
350#define I2C_OA2_MASK01 ((uint8_t)0x01U)
351#define I2C_OA2_MASK02 ((uint8_t)0x02U)
352#define I2C_OA2_MASK03 ((uint8_t)0x03U)
353#define I2C_OA2_MASK04 ((uint8_t)0x04U)
354#define I2C_OA2_MASK05 ((uint8_t)0x05U)
355#define I2C_OA2_MASK06 ((uint8_t)0x06U)
356#define I2C_OA2_MASK07 ((uint8_t)0x07U)
365#define I2C_GENERALCALL_DISABLE (0x00000000U)
366#define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
375#define I2C_NOSTRETCH_DISABLE (0x00000000U)
376#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
385#define I2C_MEMADD_SIZE_8BIT (0x00000001U)
386#define I2C_MEMADD_SIZE_16BIT (0x00000002U)
395#define I2C_DIRECTION_TRANSMIT (0x00000000U)
396#define I2C_DIRECTION_RECEIVE (0x00000001U)
405#define I2C_RELOAD_MODE I2C_CR2_RELOAD
406#define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
407#define I2C_SOFTEND_MODE (0x00000000U)
416#define I2C_NO_STARTSTOP (0x00000000U)
417#define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP)
418#define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
419#define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
431#define I2C_IT_ERRI I2C_CR1_ERRIE
432#define I2C_IT_TCI I2C_CR1_TCIE
433#define I2C_IT_STOPI I2C_CR1_STOPIE
434#define I2C_IT_NACKI I2C_CR1_NACKIE
435#define I2C_IT_ADDRI I2C_CR1_ADDRIE
436#define I2C_IT_RXI I2C_CR1_RXIE
437#define I2C_IT_TXI I2C_CR1_TXIE
446#define I2C_FLAG_TXE I2C_ISR_TXE
447#define I2C_FLAG_TXIS I2C_ISR_TXIS
448#define I2C_FLAG_RXNE I2C_ISR_RXNE
449#define I2C_FLAG_ADDR I2C_ISR_ADDR
450#define I2C_FLAG_AF I2C_ISR_NACKF
451#define I2C_FLAG_STOPF I2C_ISR_STOPF
452#define I2C_FLAG_TC I2C_ISR_TC
453#define I2C_FLAG_TCR I2C_ISR_TCR
454#define I2C_FLAG_BERR I2C_ISR_BERR
455#define I2C_FLAG_ARLO I2C_ISR_ARLO
456#define I2C_FLAG_OVR I2C_ISR_OVR
457#define I2C_FLAG_PECERR I2C_ISR_PECERR
458#define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
459#define I2C_FLAG_ALERT I2C_ISR_ALERT
460#define I2C_FLAG_BUSY I2C_ISR_BUSY
461#define I2C_FLAG_DIR I2C_ISR_DIR
470/* Exported macros -----------------------------------------------------------*/
471
481#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
482#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
483 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \
484 (__HANDLE__)->MspInitCallback = NULL; \
485 (__HANDLE__)->MspDeInitCallback = NULL; \
486 } while(0)
487#else
488#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
489#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
490
505#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
506
521#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
522
537#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & \
538 (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
539
563#define I2C_FLAG_MASK (0x0001FFFFU)
564#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \
565 (__FLAG__)) == (__FLAG__)) ? SET : RESET)
566
584#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? \
585 ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \
586 ((__HANDLE__)->Instance->ICR = (__FLAG__)))
587
592#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
593
598#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
599
604#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
609/* Include I2C HAL Extended module */
610#include "stm32h7xx_hal_i2c_ex.h"
611
612/* Exported functions --------------------------------------------------------*/
620/* Initialization and de-initialization functions******************************/
621HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
622HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
623void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
624void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
625
626/* Callbacks Register/UnRegister functions ***********************************/
627#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
628HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID,
629 pI2C_CallbackTypeDef pCallback);
630HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
631
632HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
633HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
634#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
642/* IO operation functions ****************************************************/
643/******* Blocking mode: Polling */
644HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
645 uint16_t Size, uint32_t Timeout);
646HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
647 uint16_t Size, uint32_t Timeout);
648HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
649 uint32_t Timeout);
650HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
651 uint32_t Timeout);
652HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
653 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
654HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
655 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
656HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials,
657 uint32_t Timeout);
658
659/******* Non-Blocking mode: Interrupt */
660HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
661 uint16_t Size);
662HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
663 uint16_t Size);
664HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
665HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
666HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
667 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
668HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
669 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
670
671HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
672 uint16_t Size, uint32_t XferOptions);
673HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
674 uint16_t Size, uint32_t XferOptions);
675HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
676 uint32_t XferOptions);
677HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
678 uint32_t XferOptions);
679HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
680HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
681HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
682
683/******* Non-Blocking mode: DMA */
684HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
685 uint16_t Size);
686HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
687 uint16_t Size);
688HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
689HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
690HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
691 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
692HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
693 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
694
695HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
696 uint16_t Size, uint32_t XferOptions);
697HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
698 uint16_t Size, uint32_t XferOptions);
699HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
700 uint32_t XferOptions);
701HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
702 uint32_t XferOptions);
710/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
711void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
712void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
713void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
714void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
715void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
716void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
717void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
718void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
719void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
720void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
721void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
722void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
730/* Peripheral State, Mode and Error functions *********************************/
731HAL_I2C_StateTypeDef HAL_I2C_GetState(const I2C_HandleTypeDef *hi2c);
732HAL_I2C_ModeTypeDef HAL_I2C_GetMode(const I2C_HandleTypeDef *hi2c);
733uint32_t HAL_I2C_GetError(const I2C_HandleTypeDef *hi2c);
734
743/* Private constants ---------------------------------------------------------*/
753/* Private macros ------------------------------------------------------------*/
759#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
760 ((MODE) == I2C_ADDRESSINGMODE_10BIT))
761
762#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
763 ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
764
765#define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
766 ((MASK) == I2C_OA2_MASK01) || \
767 ((MASK) == I2C_OA2_MASK02) || \
768 ((MASK) == I2C_OA2_MASK03) || \
769 ((MASK) == I2C_OA2_MASK04) || \
770 ((MASK) == I2C_OA2_MASK05) || \
771 ((MASK) == I2C_OA2_MASK06) || \
772 ((MASK) == I2C_OA2_MASK07))
773
774#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
775 ((CALL) == I2C_GENERALCALL_ENABLE))
776
777#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
778 ((STRETCH) == I2C_NOSTRETCH_ENABLE))
779
780#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
781 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
782
783#define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
784 ((MODE) == I2C_AUTOEND_MODE) || \
785 ((MODE) == I2C_SOFTEND_MODE))
786
787#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
788 ((REQUEST) == I2C_GENERATE_START_READ) || \
789 ((REQUEST) == I2C_GENERATE_START_WRITE) || \
790 ((REQUEST) == I2C_NO_STARTSTOP))
791
792#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
793 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
794 ((REQUEST) == I2C_NEXT_FRAME) || \
795 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
796 ((REQUEST) == I2C_LAST_FRAME) || \
797 ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
798 IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
799
800#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
801 ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
802
803#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \
804 (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | \
805 I2C_CR2_NBYTES | I2C_CR2_RELOAD | \
806 I2C_CR2_RD_WRN)))
807
808#define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) \
809 >> 16U))
810#define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) \
811 >> 16U))
812#define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
813#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1))
814#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2))
815
816#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
817#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
818
819#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \
820 (uint16_t)(0xFF00U))) >> 8U)))
821#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
822
823#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? \
824 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \
825 (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & \
826 (~I2C_CR2_RD_WRN)) : \
827 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \
828 (I2C_CR2_ADD10) | (I2C_CR2_START) | \
829 (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)))
830
831#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == \
832 ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
833#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
838/* Private Functions ---------------------------------------------------------*/
843/* Private functions are defined in stm32h7xx_hal_i2c.c file */
856#ifdef __cplusplus
857}
858#endif
859
860
861#endif /* STM32H7xx_HAL_I2C_H */
__IO
#define __IO
Definition: core_cm4.h:239
HAL_I2C_ModeTypeDef
HAL_I2C_ModeTypeDef
Definition: stm32h7xx_hal_i2c.h:151
HAL_I2C_MODE_MASTER
@ HAL_I2C_MODE_MASTER
Definition: stm32h7xx_hal_i2c.h:153
HAL_I2C_MODE_MEM
@ HAL_I2C_MODE_MEM
Definition: stm32h7xx_hal_i2c.h:155
HAL_I2C_MODE_SLAVE
@ HAL_I2C_MODE_SLAVE
Definition: stm32h7xx_hal_i2c.h:154
HAL_I2C_MODE_NONE
@ HAL_I2C_MODE_NONE
Definition: stm32h7xx_hal_i2c.h:152
HAL_I2C_StateTypeDef
HAL_I2C_StateTypeDef
Definition: stm32h7xx_hal_i2c.h:112
HAL_I2C_STATE_BUSY
@ HAL_I2C_STATE_BUSY
Definition: stm32h7xx_hal_i2c.h:115
HAL_I2C_STATE_LISTEN
@ HAL_I2C_STATE_LISTEN
Definition: stm32h7xx_hal_i2c.h:118
HAL_I2C_STATE_BUSY_TX_LISTEN
@ HAL_I2C_STATE_BUSY_TX_LISTEN
Definition: stm32h7xx_hal_i2c.h:119
HAL_I2C_STATE_ABORT
@ HAL_I2C_STATE_ABORT
Definition: stm32h7xx_hal_i2c.h:123
HAL_I2C_STATE_BUSY_RX
@ HAL_I2C_STATE_BUSY_RX
Definition: stm32h7xx_hal_i2c.h:117
HAL_I2C_STATE_BUSY_RX_LISTEN
@ HAL_I2C_STATE_BUSY_RX_LISTEN
Definition: stm32h7xx_hal_i2c.h:121
HAL_I2C_STATE_RESET
@ HAL_I2C_STATE_RESET
Definition: stm32h7xx_hal_i2c.h:113
HAL_I2C_STATE_BUSY_TX
@ HAL_I2C_STATE_BUSY_TX
Definition: stm32h7xx_hal_i2c.h:116
HAL_I2C_STATE_READY
@ HAL_I2C_STATE_READY
Definition: stm32h7xx_hal_i2c.h:114
stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58
stm32h7xx_hal_i2c_ex.h
Header file of I2C HAL Extended module.
I2C_InitTypeDef
Definition: stm32h7xx_hal_i2c.h:50
I2C_InitTypeDef::GeneralCallMode
uint32_t GeneralCallMode
Definition: stm32h7xx_hal_i2c.h:71
I2C_InitTypeDef::NoStretchMode
uint32_t NoStretchMode
Definition: stm32h7xx_hal_i2c.h:74
I2C_InitTypeDef::OwnAddress2Masks
uint32_t OwnAddress2Masks
Definition: stm32h7xx_hal_i2c.h:67
I2C_InitTypeDef::AddressingMode
uint32_t AddressingMode
Definition: stm32h7xx_hal_i2c.h:58
I2C_InitTypeDef::OwnAddress2
uint32_t OwnAddress2
Definition: stm32h7xx_hal_i2c.h:64
I2C_InitTypeDef::Timing
uint32_t Timing
Definition: stm32h7xx_hal_i2c.h:51
I2C_InitTypeDef::OwnAddress1
uint32_t OwnAddress1
Definition: stm32h7xx_hal_i2c.h:55
I2C_InitTypeDef::DualAddressMode
uint32_t DualAddressMode
Definition: stm32h7xx_hal_i2c.h:61
I2C_TypeDef
Inter-integrated Circuit Interface.
Definition: stm32h723xx.h:1133
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32h7xx_hal_dma.h:138
__I2C_HandleTypeDef
Definition: stm32h7xx_hal_i2c.h:191
__I2C_HandleTypeDef::PreviousState
__IO uint32_t PreviousState
Definition: stm32h7xx_hal_i2c.h:205
__I2C_HandleTypeDef::Instance
I2C_TypeDef * Instance
Definition: stm32h7xx_hal_i2c.h:192
__I2C_HandleTypeDef::XferSize
uint16_t XferSize
Definition: stm32h7xx_hal_i2c.h:198
__I2C_HandleTypeDef::XferISR
HAL_StatusTypeDef(* XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
Definition: stm32h7xx_hal_i2c.h:207
__I2C_HandleTypeDef::XferCount
__IO uint16_t XferCount
Definition: stm32h7xx_hal_i2c.h:200
__I2C_HandleTypeDef::State
__IO HAL_I2C_StateTypeDef State
Definition: stm32h7xx_hal_i2c.h:217
__I2C_HandleTypeDef::Memaddress
__IO uint32_t Memaddress
Definition: stm32h7xx_hal_i2c.h:227
__I2C_HandleTypeDef::hdmarx
DMA_HandleTypeDef * hdmarx
Definition: stm32h7xx_hal_i2c.h:212
__I2C_HandleTypeDef::XferOptions
__IO uint32_t XferOptions
Definition: stm32h7xx_hal_i2c.h:202
__I2C_HandleTypeDef::Devaddress
__IO uint32_t Devaddress
Definition: stm32h7xx_hal_i2c.h:225
__I2C_HandleTypeDef::ErrorCode
__IO uint32_t ErrorCode
Definition: stm32h7xx_hal_i2c.h:221
__I2C_HandleTypeDef::Init
I2C_InitTypeDef Init
Definition: stm32h7xx_hal_i2c.h:194
__I2C_HandleTypeDef::Lock
HAL_LockTypeDef Lock
Definition: stm32h7xx_hal_i2c.h:215
__I2C_HandleTypeDef::Mode
__IO HAL_I2C_ModeTypeDef Mode
Definition: stm32h7xx_hal_i2c.h:219
__I2C_HandleTypeDef::AddrEventCount
__IO uint32_t AddrEventCount
Definition: stm32h7xx_hal_i2c.h:223
__I2C_HandleTypeDef::hdmatx
DMA_HandleTypeDef * hdmatx
Definition: stm32h7xx_hal_i2c.h:210
__I2C_HandleTypeDef::pBuffPtr
uint8_t * pBuffPtr
Definition: stm32h7xx_hal_i2c.h:196
Generated by doxygen 1.9.6