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#define | OCM_ECC_CTRL 0x14 |
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#define | OCM_ECC_CTRL_FI_MODE BSP_BIT32(2) |
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#define | OCM_ECC_CTRL_DET_ONLY BSP_BIT32(1) |
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#define | OCM_ECC_CTRL_ECC_ON_OFF BSP_BIT32(0) |
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#define | OCM_IE 0xc |
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#define | OCM_IE_UE_RMW BSP_BIT32(10) |
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#define | OCM_IE_UE BSP_BIT32(7) |
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#define | OCM_IE_CE BSP_BIT32(6) |
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#define | OCM_ERR_CTRL 0x0 |
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#define | OCM_ERR_CTRL_UE_RES BSP_BIT32(3) |
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#define | OCM_FI_D0 0x4c |
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#define | OCM_FI_D1 0x50 |
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#define | OCM_FI_D2 0x54 |
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#define | OCM_FI_D3 0x58 |
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#define | OCM_FI_SY 0x5c |
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#define | OCM_FI_SY_DATA(val) BSP_FLD32(val, 0, 15) |
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#define | OCM_FI_SY_DATA_GET(reg) BSP_FLD32GET(reg, 0, 15) |
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#define | OCM_FI_SY_DATA_SET(reg, val) BSP_FLD32SET(reg, val, 0, 15) |
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#define | OCM_FI_CNTR 0x74 |
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#define | OCM_FI_CNTR_COUNT(val) BSP_FLD32(val, 0, 23) |
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#define | OCM_FI_CNTR_COUNT_GET(reg) BSP_FLD32GET(reg, 0, 23) |
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#define | OCM_FI_CNTR_COUNT_SET(reg, val) BSP_FLD32SET(reg, val, 0, 23) |
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#define | OCM_IS 0x4 |
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#define | OCM_IS_UE_RMW BSP_BIT32(10) |
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#define | OCM_IS_UE BSP_BIT32(7) |
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#define | OCM_IS_CE BSP_BIT32(6) |
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#define | OCM_IM 0x8 |
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#define | OCM_IM_UE_RMW BSP_BIT32(10) |
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#define | OCM_IM_UE BSP_BIT32(7) |
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#define | OCM_IM_CE BSP_BIT32(6) |
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#define | OCM_CE_FFA 0x1c |
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#define | OCM_CE_FFA_ADDR(val) BSP_FLD32(val, 0, 17) |
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#define | OCM_CE_FFA_ADDR_GET(reg) BSP_FLD32GET(reg, 0, 17) |
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#define | OCM_CE_FFA_ADDR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 17) |
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#define | OCM_CE_FFD0 0x20 |
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#define | OCM_CE_FFD1 0x24 |
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#define | OCM_CE_FFD2 0x28 |
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#define | OCM_CE_FFD3 0x2c |
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#define | OCM_CE_FFE 0x1c |
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#define | OCM_CE_FFE_SYNDROME(val) BSP_FLD32(val, 0, 15) |
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#define | OCM_CE_FFE_SYNDROME_GET(reg) BSP_FLD32GET(reg, 0, 15) |
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#define | OCM_CE_FFE_SYNDROME_SET(reg, val) BSP_FLD32SET(reg, val, 0, 15) |
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#define | OCM_UE_FFA 0x34 |
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#define | OCM_UE_FFA_ADDR(val) BSP_FLD32(val, 0, 17) |
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#define | OCM_UE_FFA_ADDR_GET(reg) BSP_FLD32GET(reg, 0, 17) |
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#define | OCM_UE_FFA_ADDR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 17) |
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#define | OCM_UE_FFD0 0x38 |
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#define | OCM_UE_FFD1 0x3c |
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#define | OCM_UE_FFD2 0x40 |
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#define | OCM_UE_FFD3 0x44 |
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#define | OCM_UE_FFE 0x48 |
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#define | OCM_UE_FFE_SYNDROME(val) BSP_FLD32(val, 0, 15) |
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#define | OCM_UE_FFE_SYNDROME_GET(reg) BSP_FLD32GET(reg, 0, 15) |
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#define | OCM_UE_FFE_SYNDROME_SET(reg, val) BSP_FLD32SET(reg, val, 0, 15) |
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#define | OCM_RMW_UE_FFA 0x70 |
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#define | OCM_RMW_UE_FFA_ADDR(val) BSP_FLD32(val, 0, 17) |
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#define | OCM_RMW_UE_FFA_ADDR_GET(reg) BSP_FLD32GET(reg, 0, 17) |
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#define | OCM_RMW_UE_FFA_ADDR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 17) |
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This source file contains the implementation of OCM ECC support.