This header file defines the GRPCI2 register block interface. More...

#include <stdint.h>

Data Structures
struct	grpci2
	This structure defines the GRPCI2 register block memory map. More...

Macros
#define	GRPCI2_CTRL_RE 0x80000000U

#define	GRPCI2_CTRL_MR 0x40000000U

#define	GRPCI2_CTRL_TR 0x20000000U

#define	GRPCI2_CTRL_SI 0x8000000U

#define	GRPCI2_CTRL_PE 0x4000000U

#define	GRPCI2_CTRL_ER 0x2000000U

#define	GRPCI2_CTRL_EI 0x1000000U

#define	GRPCI2_CTRL_BUS_NUMBER_SHIFT 16

#define	GRPCI2_CTRL_BUS_NUMBER_MASK 0xff0000U

#define	GRPCI2_CTRL_BUS_NUMBER_GET(_reg)

#define	GRPCI2_CTRL_BUS_NUMBER_SET(_reg, _val)

#define	GRPCI2_CTRL_BUS_NUMBER(_val)

#define	GRPCI2_CTRL_DFA 0x800U

#define	GRPCI2_CTRL_IB 0x400U

#define	GRPCI2_CTRL_CB 0x200U

#define	GRPCI2_CTRL_DIF 0x100U

#define	GRPCI2_CTRL_DEVICE_INT_MASK_SHIFT 4

#define	GRPCI2_CTRL_DEVICE_INT_MASK_MASK 0xf0U

#define	GRPCI2_CTRL_DEVICE_INT_MASK_GET(_reg)

#define	GRPCI2_CTRL_DEVICE_INT_MASK_SET(_reg, _val)

#define	GRPCI2_CTRL_DEVICE_INT_MASK(_val)

#define	GRPCI2_CTRL_HOST_INT_MASK_SHIFT 0

#define	GRPCI2_CTRL_HOST_INT_MASK_MASK 0xfU

#define	GRPCI2_CTRL_HOST_INT_MASK_GET(_reg)

#define	GRPCI2_CTRL_HOST_INT_MASK_SET(_reg, _val)

#define	GRPCI2_CTRL_HOST_INT_MASK(_val)

#define	GRPCI2_STATCAP_HOST 0x80000000U

#define	GRPCI2_STATCAP_MST 0x40000000U

#define	GRPCI2_STATCAP_TAR 0x20000000U

#define	GRPCI2_STATCAP_DMA 0x10000000U

#define	GRPCI2_STATCAP_DI 0x8000000U

#define	GRPCI2_STATCAP_HI 0x4000000U

#define	GRPCI2_STATCAP_IRQ_MODE_SHIFT 24

#define	GRPCI2_STATCAP_IRQ_MODE_MASK 0x3000000U

#define	GRPCI2_STATCAP_IRQ_MODE_GET(_reg)

#define	GRPCI2_STATCAP_IRQ_MODE_SET(_reg, _val)

#define	GRPCI2_STATCAP_IRQ_MODE(_val)

#define	GRPCI2_STATCAP_TRACE 0x800000U

#define	GRPCI2_STATCAP_CFGDO 0x100000U

#define	GRPCI2_STATCAP_CFGER 0x80000U

#define	GRPCI2_STATCAP_CORE_INT_STATUS_SHIFT 12

#define	GRPCI2_STATCAP_CORE_INT_STATUS_MASK 0x7f000U

#define	GRPCI2_STATCAP_CORE_INT_STATUS_GET(_reg)

#define	GRPCI2_STATCAP_CORE_INT_STATUS_SET(_reg, _val)

#define	GRPCI2_STATCAP_CORE_INT_STATUS(_val)

#define	GRPCI2_STATCAP_HOST_INT_STATUS_SHIFT 8

#define	GRPCI2_STATCAP_HOST_INT_STATUS_MASK 0xf00U

#define	GRPCI2_STATCAP_HOST_INT_STATUS_GET(_reg)

#define	GRPCI2_STATCAP_HOST_INT_STATUS_SET(_reg, _val)

#define	GRPCI2_STATCAP_HOST_INT_STATUS(_val)

#define	GRPCI2_STATCAP_FDEPTH_SHIFT 2

#define	GRPCI2_STATCAP_FDEPTH_MASK 0x1cU

#define	GRPCI2_STATCAP_FDEPTH_GET(_reg)

#define	GRPCI2_STATCAP_FDEPTH_SET(_reg, _val)

#define	GRPCI2_STATCAP_FDEPTH(_val)

#define	GRPCI2_STATCAP_FNUM_SHIFT 0

#define	GRPCI2_STATCAP_FNUM_MASK 0x3U

#define	GRPCI2_STATCAP_FNUM_GET(_reg)

#define	GRPCI2_STATCAP_FNUM_SET(_reg, _val)

#define	GRPCI2_STATCAP_FNUM(_val)

#define	GRPCI2_BCIM_AHB_MASTER_UNMASK_SHIFT 16

#define	GRPCI2_BCIM_AHB_MASTER_UNMASK_MASK 0xffff0000U

#define	GRPCI2_BCIM_AHB_MASTER_UNMASK_GET(_reg)

#define	GRPCI2_BCIM_AHB_MASTER_UNMASK_SET(_reg, _val)

#define	GRPCI2_BCIM_AHB_MASTER_UNMASK(_val)

#define	GRPCI2_BCIM_BURST_LENGTH_SHIFT 0

#define	GRPCI2_BCIM_BURST_LENGTH_MASK 0xffU

#define	GRPCI2_BCIM_BURST_LENGTH_GET(_reg)

#define	GRPCI2_BCIM_BURST_LENGTH_SET(_reg, _val)

#define	GRPCI2_BCIM_BURST_LENGTH(_val)

#define	GRPCI2_AHB2PCI_AHB_TO_PCI_IO_SHIFT 16

#define	GRPCI2_AHB2PCI_AHB_TO_PCI_IO_MASK 0xffff0000U

#define	GRPCI2_AHB2PCI_AHB_TO_PCI_IO_GET(_reg)

#define	GRPCI2_AHB2PCI_AHB_TO_PCI_IO_SET(_reg, _val)

#define	GRPCI2_AHB2PCI_AHB_TO_PCI_IO(_val)

#define	GRPCI2_DMACTRL_SAFE 0x80000000U

#define	GRPCI2_DMACTRL_CHIRQ_SHIFT 12

#define	GRPCI2_DMACTRL_CHIRQ_MASK 0xff000U

#define	GRPCI2_DMACTRL_CHIRQ_GET(_reg)

#define	GRPCI2_DMACTRL_CHIRQ_SET(_reg, _val)

#define	GRPCI2_DMACTRL_CHIRQ(_val)

#define	GRPCI2_DMACTRL_MA 0x800U

#define	GRPCI2_DMACTRL_TA 0x400U

#define	GRPCI2_DMACTRL_PE 0x200U

#define	GRPCI2_DMACTRL_AE 0x100U

#define	GRPCI2_DMACTRL_DE 0x80U

#define	GRPCI2_DMACTRL_NUMCH_SHIFT 4

#define	GRPCI2_DMACTRL_NUMCH_MASK 0x70U

#define	GRPCI2_DMACTRL_NUMCH_GET(_reg)

#define	GRPCI2_DMACTRL_NUMCH_SET(_reg, _val)

#define	GRPCI2_DMACTRL_NUMCH(_val)

#define	GRPCI2_DMACTRL_ACTIVE 0x8U

#define	GRPCI2_DMACTRL_DIS 0x4U

#define	GRPCI2_DMACTRL_IE 0x2U

#define	GRPCI2_DMACTRL_EN 0x1U

#define	GRPCI2_DMABASE_BASE_SHIFT 0

#define	GRPCI2_DMABASE_BASE_MASK 0xffffffffU

#define	GRPCI2_DMABASE_BASE_GET(_reg)

#define	GRPCI2_DMABASE_BASE_SET(_reg, _val)

#define	GRPCI2_DMABASE_BASE(_val)

#define	GRPCI2_DMACHAN_CHAN_SHIFT 0

#define	GRPCI2_DMACHAN_CHAN_MASK 0xffffffffU

#define	GRPCI2_DMACHAN_CHAN_GET(_reg)

#define	GRPCI2_DMACHAN_CHAN_SET(_reg, _val)

#define	GRPCI2_DMACHAN_CHAN(_val)

#define	GRPCI2_PCI2AHB_ADDR_SHIFT 0

#define	GRPCI2_PCI2AHB_ADDR_MASK 0xffffffffU

#define	GRPCI2_PCI2AHB_ADDR_GET(_reg)

#define	GRPCI2_PCI2AHB_ADDR_SET(_reg, _val)

#define	GRPCI2_PCI2AHB_ADDR(_val)

#define	GRPCI2_AHBM2PCI_ADDR_SHIFT 0

#define	GRPCI2_AHBM2PCI_ADDR_MASK 0xffffffffU

#define	GRPCI2_AHBM2PCI_ADDR_GET(_reg)

#define	GRPCI2_AHBM2PCI_ADDR_SET(_reg, _val)

#define	GRPCI2_AHBM2PCI_ADDR(_val)

#define	GRPCI2_TCTRC_TRIG_INDEX_SHIFT 16

#define	GRPCI2_TCTRC_TRIG_INDEX_MASK 0xffff0000U

#define	GRPCI2_TCTRC_TRIG_INDEX_GET(_reg)

#define	GRPCI2_TCTRC_TRIG_INDEX_SET(_reg, _val)

#define	GRPCI2_TCTRC_TRIG_INDEX(_val)

#define	GRPCI2_TCTRC_AR 0x8000U

#define	GRPCI2_TCTRC_EN 0x4000U

#define	GRPCI2_TCTRC_DEPTH_SHIFT 4

#define	GRPCI2_TCTRC_DEPTH_MASK 0xff0U

#define	GRPCI2_TCTRC_DEPTH_GET(_reg)

#define	GRPCI2_TCTRC_DEPTH_SET(_reg, _val)

#define	GRPCI2_TCTRC_DEPTH(_val)

#define	GRPCI2_TCTRC_SO 0x2U

#define	GRPCI2_TCTRC_SA 0x1U

#define	GRPCI2_TMODE_TRACING_MODE_SHIFT 24

#define	GRPCI2_TMODE_TRACING_MODE_MASK 0xf000000U

#define	GRPCI2_TMODE_TRACING_MODE_GET(_reg)

#define	GRPCI2_TMODE_TRACING_MODE_SET(_reg, _val)

#define	GRPCI2_TMODE_TRACING_MODE(_val)

#define	GRPCI2_TMODE_TRIG_COUNT_SHIFT 16

#define	GRPCI2_TMODE_TRIG_COUNT_MASK 0xff0000U

#define	GRPCI2_TMODE_TRIG_COUNT_GET(_reg)

#define	GRPCI2_TMODE_TRIG_COUNT_SET(_reg, _val)

#define	GRPCI2_TMODE_TRIG_COUNT(_val)

#define	GRPCI2_TMODE_DELAYED_STOP_SHIFT 0

#define	GRPCI2_TMODE_DELAYED_STOP_MASK 0xffffU

#define	GRPCI2_TMODE_DELAYED_STOP_GET(_reg)

#define	GRPCI2_TMODE_DELAYED_STOP_SET(_reg, _val)

#define	GRPCI2_TMODE_DELAYED_STOP(_val)

#define	GRPCI2_TADP_PATTERN_SHIFT 0

#define	GRPCI2_TADP_PATTERN_MASK 0xffffffffU

#define	GRPCI2_TADP_PATTERN_GET(_reg)

#define	GRPCI2_TADP_PATTERN_SET(_reg, _val)

#define	GRPCI2_TADP_PATTERN(_val)

#define	GRPCI2_TADM_MASK_SHIFT 0

#define	GRPCI2_TADM_MASK_MASK 0xffffffffU

#define	GRPCI2_TADM_MASK_GET(_reg)

#define	GRPCI2_TADM_MASK_SET(_reg, _val)

#define	GRPCI2_TADM_MASK(_val)

#define	GRPCI2_TCP_CBE_3_0_SHIFT 16

#define	GRPCI2_TCP_CBE_3_0_MASK 0xf0000U

#define	GRPCI2_TCP_CBE_3_0_GET(_reg)

#define	GRPCI2_TCP_CBE_3_0_SET(_reg, _val)

#define	GRPCI2_TCP_CBE_3_0(_val)

#define	GRPCI2_TCP_FRAME 0x8000U

#define	GRPCI2_TCP_IRDY 0x4000U

#define	GRPCI2_TCP_TRDY 0x2000U

#define	GRPCI2_TCP_STOP 0x1000U

#define	GRPCI2_TCP_DEVSEL 0x800U

#define	GRPCI2_TCP_PAR 0x400U

#define	GRPCI2_TCP_PERR 0x200U

#define	GRPCI2_TCP_SERR 0x100U

#define	GRPCI2_TCP_IDSEL 0x80U

#define	GRPCI2_TCP_REQ 0x40U

#define	GRPCI2_TCP_GNT 0x20U

#define	GRPCI2_TCP_LOCK 0x10U

#define	GRPCI2_TCP_RST 0x8U

#define	GRPCI2_TCM_CBE_3_0_SHIFT 16

#define	GRPCI2_TCM_CBE_3_0_MASK 0xf0000U

#define	GRPCI2_TCM_CBE_3_0_GET(_reg)

#define	GRPCI2_TCM_CBE_3_0_SET(_reg, _val)

#define	GRPCI2_TCM_CBE_3_0(_val)

#define	GRPCI2_TCM_FRAME 0x8000U

#define	GRPCI2_TCM_IRDY 0x4000U

#define	GRPCI2_TCM_TRDY 0x2000U

#define	GRPCI2_TCM_STOP 0x1000U

#define	GRPCI2_TCM_DEVSEL 0x800U

#define	GRPCI2_TCM_PAR 0x400U

#define	GRPCI2_TCM_PERR 0x200U

#define	GRPCI2_TCM_SERR 0x100U

#define	GRPCI2_TCM_IDSEL 0x80U

#define	GRPCI2_TCM_REQ 0x40U

#define	GRPCI2_TCM_GNT 0x20U

#define	GRPCI2_TCM_LOCK 0x10U

#define	GRPCI2_TCM_RST 0x8U

#define	GRPCI2_TADS_SIGNAL_SHIFT 0

#define	GRPCI2_TADS_SIGNAL_MASK 0xffffffffU

#define	GRPCI2_TADS_SIGNAL_GET(_reg)

#define	GRPCI2_TADS_SIGNAL_SET(_reg, _val)

#define	GRPCI2_TADS_SIGNAL(_val)

#define	GRPCI2_TCS_CBE_3_0_SHIFT 16

#define	GRPCI2_TCS_CBE_3_0_MASK 0xf0000U

#define	GRPCI2_TCS_CBE_3_0_GET(_reg)

#define	GRPCI2_TCS_CBE_3_0_SET(_reg, _val)

#define	GRPCI2_TCS_CBE_3_0(_val)

#define	GRPCI2_TCS_FRAME 0x8000U

#define	GRPCI2_TCS_IRDY 0x4000U

#define	GRPCI2_TCS_TRDY 0x2000U

#define	GRPCI2_TCS_STOP 0x1000U

#define	GRPCI2_TCS_DEVSEL 0x800U

#define	GRPCI2_TCS_PAR 0x400U

#define	GRPCI2_TCS_PERR 0x200U

#define	GRPCI2_TCS_SERR 0x100U

#define	GRPCI2_TCS_IDSEL 0x80U

#define	GRPCI2_TCS_REQ 0x40U

#define	GRPCI2_TCS_GNT 0x20U

#define	GRPCI2_TCS_LOCK 0x10U

#define	GRPCI2_TCS_RST 0x8U

Typedefs
typedef struct grpci2	grpci2
	This structure defines the GRPCI2 register block memory map.

Detailed Description

This header file defines the GRPCI2 register block interface.

Data Structures

Macros

Typedefs

Detailed Description