This group contains register bit definitions. More...

Macros
#define	GRPCI2_DMACTRL_SAFE 0x80000000U

#define	GRPCI2_DMACTRL_CHIRQ_SHIFT 12

#define	GRPCI2_DMACTRL_CHIRQ_MASK 0xff000U

#define	GRPCI2_DMACTRL_CHIRQ_GET(_reg)

#define	GRPCI2_DMACTRL_CHIRQ_SET(_reg, _val)

#define	GRPCI2_DMACTRL_CHIRQ(_val)

#define	GRPCI2_DMACTRL_MA 0x800U

#define	GRPCI2_DMACTRL_TA 0x400U

#define	GRPCI2_DMACTRL_PE 0x200U

#define	GRPCI2_DMACTRL_AE 0x100U

#define	GRPCI2_DMACTRL_DE 0x80U

#define	GRPCI2_DMACTRL_NUMCH_SHIFT 4

#define	GRPCI2_DMACTRL_NUMCH_MASK 0x70U

#define	GRPCI2_DMACTRL_NUMCH_GET(_reg)

#define	GRPCI2_DMACTRL_NUMCH_SET(_reg, _val)

#define	GRPCI2_DMACTRL_NUMCH(_val)

#define	GRPCI2_DMACTRL_ACTIVE 0x8U

#define	GRPCI2_DMACTRL_DIS 0x4U

#define	GRPCI2_DMACTRL_IE 0x2U

#define	GRPCI2_DMACTRL_EN 0x1U

Detailed Description

This group contains register bit definitions.

Macro Definition Documentation

#define GRPCI2_DMACTRL_CHIRQ ( _val )

Value:

( ( ( _val ) << GRPCI2_DMACTRL_CHIRQ_SHIFT ) & \

GRPCI2_DMACTRL_CHIRQ_MASK )

#define GRPCI2_DMACTRL_CHIRQ_GET ( _reg )

Value:

( ( ( _reg ) & GRPCI2_DMACTRL_CHIRQ_MASK ) >> \

GRPCI2_DMACTRL_CHIRQ_SHIFT )

#define GRPCI2_DMACTRL_CHIRQ_SET	(	_reg,
		_val
	)

Value:

  ( ( ( _reg ) & ~GRPCI2_DMACTRL_CHIRQ_MASK ) | \
    ( ( ( _val ) << GRPCI2_DMACTRL_CHIRQ_SHIFT ) & \
      GRPCI2_DMACTRL_CHIRQ_MASK ) )

#define GRPCI2_DMACTRL_NUMCH ( _val )

Value:

( ( ( _val ) << GRPCI2_DMACTRL_NUMCH_SHIFT ) & \

GRPCI2_DMACTRL_NUMCH_MASK )

#define GRPCI2_DMACTRL_NUMCH_GET ( _reg )

Value:

( ( ( _reg ) & GRPCI2_DMACTRL_NUMCH_MASK ) >> \

GRPCI2_DMACTRL_NUMCH_SHIFT )

#define GRPCI2_DMACTRL_NUMCH_SET	(	_reg,
		_val
	)

Value:

  ( ( ( _reg ) & ~GRPCI2_DMACTRL_NUMCH_MASK ) | \
    ( ( ( _val ) << GRPCI2_DMACTRL_NUMCH_SHIFT ) & \
      GRPCI2_DMACTRL_NUMCH_MASK ) )