Rdc_mapping

Modules
	Edma_request

Typedefs
typedef enum _rdc_master	rdc_master_t
	Structure for the RDC mapping.
typedef enum _rdc_mem	rdc_mem_t
typedef enum _rdc_periph	rdc_periph_t
typedef enum _xbar_input_signal	xbar_input_signal_t
typedef enum _xbar_output_signal	xbar_output_signal_t
typedef enum _rdc_master	rdc_master_t
	Structure for the RDC mapping.
typedef enum _rdc_mem	rdc_mem_t
typedef enum _rdc_periph	rdc_periph_t
typedef enum _xbar_input_signal	xbar_input_signal_t
typedef enum _xbar_output_signal	xbar_output_signal_t

Enumerations
enum	_rdc_master {   kRDC_Master_ENET_1G_TX = 1U , kRDC_Master_ENET_1G_RX = 2U , kRDC_Master_ENET = 3U , kRDC_Master_ENET_QOS = 4U ,   kRDC_Master_USDHC1 = 5U , kRDC_Master_USDHC2 = 6U , kRDC_Master_USB = 7U , kRDC_Master_GPU = 8U ,   kRDC_Master_PXP = 9U , kRDC_Master_LCDIF = 10U , kRDC_Master_CSI = 11U , kRDC_Master_ENET_1G_TX = 1U ,   kRDC_Master_ENET_1G_RX = 2U , kRDC_Master_ENET = 3U , kRDC_Master_ENET_QOS = 4U , kRDC_Master_USDHC1 = 5U ,   kRDC_Master_USDHC2 = 6U , kRDC_Master_USB = 7U , kRDC_Master_GPU = 8U , kRDC_Master_PXP = 9U ,   kRDC_Master_LCDIF = 10U , kRDC_Master_CSI = 11U }
	Structure for the RDC mapping. More...
enum	_rdc_mem {   kRDC_Mem_MRC0_0 = 0U , kRDC_Mem_MRC0_1 = 1U , kRDC_Mem_MRC0_2 = 2U , kRDC_Mem_MRC0_3 = 3U ,   kRDC_Mem_MRC0_4 = 4U , kRDC_Mem_MRC0_5 = 5U , kRDC_Mem_MRC0_6 = 6U , kRDC_Mem_MRC0_7 = 7U ,   kRDC_Mem_MRC1_0 = 8U , kRDC_Mem_MRC1_1 = 9U , kRDC_Mem_MRC1_2 = 10U , kRDC_Mem_MRC1_3 = 11U ,   kRDC_Mem_MRC1_4 = 12U , kRDC_Mem_MRC1_5 = 13U , kRDC_Mem_MRC1_6 = 14U , kRDC_Mem_MRC1_7 = 15U ,   kRDC_Mem_MRC2_0 = 16U , kRDC_Mem_MRC2_1 = 17U , kRDC_Mem_MRC2_2 = 18U , kRDC_Mem_MRC2_3 = 19U ,   kRDC_Mem_MRC2_4 = 20U , kRDC_Mem_MRC2_5 = 21U , kRDC_Mem_MRC2_6 = 22U , kRDC_Mem_MRC2_7 = 23U ,   kRDC_Mem_MRC3_0 = 24U , kRDC_Mem_MRC3_1 = 25U , kRDC_Mem_MRC3_2 = 26U , kRDC_Mem_MRC3_3 = 27U ,   kRDC_Mem_MRC3_4 = 28U , kRDC_Mem_MRC3_5 = 29U , kRDC_Mem_MRC3_6 = 30U , kRDC_Mem_MRC3_7 = 31U ,   kRDC_Mem_MRC4_0 = 32U , kRDC_Mem_MRC4_1 = 33U , kRDC_Mem_MRC4_2 = 34U , kRDC_Mem_MRC4_3 = 35U ,   kRDC_Mem_MRC4_4 = 36U , kRDC_Mem_MRC4_5 = 37U , kRDC_Mem_MRC4_6 = 38U , kRDC_Mem_MRC4_7 = 39U ,   kRDC_Mem_MRC5_0 = 40U , kRDC_Mem_MRC5_1 = 41U , kRDC_Mem_MRC5_2 = 42U , kRDC_Mem_MRC5_3 = 43U ,   kRDC_Mem_MRC6_0 = 44U , kRDC_Mem_MRC6_1 = 45U , kRDC_Mem_MRC6_2 = 46U , kRDC_Mem_MRC6_3 = 47U ,   kRDC_Mem_MRC7_0 = 48U , kRDC_Mem_MRC7_1 = 49U , kRDC_Mem_MRC7_2 = 50U , kRDC_Mem_MRC7_3 = 51U ,   kRDC_Mem_MRC7_4 = 52U , kRDC_Mem_MRC7_5 = 53U , kRDC_Mem_MRC7_6 = 54U , kRDC_Mem_MRC7_7 = 55U ,   kRDC_Mem_MRC8_0 = 56U , kRDC_Mem_MRC8_1 = 57U , kRDC_Mem_MRC8_2 = 58U , kRDC_Mem_MRC0_0 = 0U ,   kRDC_Mem_MRC0_1 = 1U , kRDC_Mem_MRC0_2 = 2U , kRDC_Mem_MRC0_3 = 3U , kRDC_Mem_MRC0_4 = 4U ,   kRDC_Mem_MRC0_5 = 5U , kRDC_Mem_MRC0_6 = 6U , kRDC_Mem_MRC0_7 = 7U , kRDC_Mem_MRC1_0 = 8U ,   kRDC_Mem_MRC1_1 = 9U , kRDC_Mem_MRC1_2 = 10U , kRDC_Mem_MRC1_3 = 11U , kRDC_Mem_MRC1_4 = 12U ,   kRDC_Mem_MRC1_5 = 13U , kRDC_Mem_MRC1_6 = 14U , kRDC_Mem_MRC1_7 = 15U , kRDC_Mem_MRC2_0 = 16U ,   kRDC_Mem_MRC2_1 = 17U , kRDC_Mem_MRC2_2 = 18U , kRDC_Mem_MRC2_3 = 19U , kRDC_Mem_MRC2_4 = 20U ,   kRDC_Mem_MRC2_5 = 21U , kRDC_Mem_MRC2_6 = 22U , kRDC_Mem_MRC2_7 = 23U , kRDC_Mem_MRC3_0 = 24U ,   kRDC_Mem_MRC3_1 = 25U , kRDC_Mem_MRC3_2 = 26U , kRDC_Mem_MRC3_3 = 27U , kRDC_Mem_MRC3_4 = 28U ,   kRDC_Mem_MRC3_5 = 29U , kRDC_Mem_MRC3_6 = 30U , kRDC_Mem_MRC3_7 = 31U , kRDC_Mem_MRC4_0 = 32U ,   kRDC_Mem_MRC4_1 = 33U , kRDC_Mem_MRC4_2 = 34U , kRDC_Mem_MRC4_3 = 35U , kRDC_Mem_MRC4_4 = 36U ,   kRDC_Mem_MRC4_5 = 37U , kRDC_Mem_MRC4_6 = 38U , kRDC_Mem_MRC4_7 = 39U , kRDC_Mem_MRC5_0 = 40U ,   kRDC_Mem_MRC5_1 = 41U , kRDC_Mem_MRC5_2 = 42U , kRDC_Mem_MRC5_3 = 43U , kRDC_Mem_MRC6_0 = 44U ,   kRDC_Mem_MRC6_1 = 45U , kRDC_Mem_MRC6_2 = 46U , kRDC_Mem_MRC6_3 = 47U , kRDC_Mem_MRC7_0 = 48U ,   kRDC_Mem_MRC7_1 = 49U , kRDC_Mem_MRC7_2 = 50U , kRDC_Mem_MRC7_3 = 51U , kRDC_Mem_MRC7_4 = 52U ,   kRDC_Mem_MRC7_5 = 53U , kRDC_Mem_MRC7_6 = 54U , kRDC_Mem_MRC7_7 = 55U , kRDC_Mem_MRC8_0 = 56U ,   kRDC_Mem_MRC8_1 = 57U , kRDC_Mem_MRC8_2 = 58U }
enum	_rdc_periph {   kRDC_Periph_MTR = 0U , kRDC_Periph_MECC1 = 1U , kRDC_Periph_MECC2 = 2U , kRDC_Periph_FLEXSPI1 = 3U ,   kRDC_Periph_FLEXSPI2 = 4U , kRDC_Periph_SEMC = 5U , kRDC_Periph_CM7_IMXRT = 6U , kRDC_Periph_EWM = 7U ,   kRDC_Periph_WDOG1 = 8U , kRDC_Periph_WDOG2 = 9U , kRDC_Periph_WDOG3 = 10U , kRDC_Periph_AOI_XBAR = 11U ,   kRDC_Periph_ADC_ETC = 12U , kRDC_Periph_CAAM_1 = 13U , kRDC_Periph_ADC1 = 14U , kRDC_Periph_ADC2 = 15U ,   kRDC_Periph_TSC_DIG = 16U , kRDC_Periph_DAC = 17U , kRDC_Periph_IEE = 18U , kRDC_Periph_DMAMUX = 19U ,   kRDC_Periph_EDMA = 19U , kRDC_Periph_LPUART1 = 20U , kRDC_Periph_LPUART2 = 21U , kRDC_Periph_LPUART3 = 22U ,   kRDC_Periph_LPUART4 = 23U , kRDC_Periph_LPUART5 = 24U , kRDC_Periph_LPUART6 = 25U , kRDC_Periph_LPUART7 = 26U ,   kRDC_Periph_LPUART8 = 27U , kRDC_Periph_LPUART9 = 28U , kRDC_Periph_LPUART10 = 29U , kRDC_Periph_FLEXIO1 = 30U ,   kRDC_Periph_FLEXIO2 = 31U , kRDC_Periph_CAN1 = 32U , kRDC_Periph_CAN2 = 33U , kRDC_Periph_PIT1 = 34U ,   kRDC_Periph_KPP = 35U , kRDC_Periph_IOMUXC_GPR = 36U , kRDC_Periph_IOMUXC = 37U , kRDC_Periph_GPT1 = 38U ,   kRDC_Periph_GPT2 = 39U , kRDC_Periph_GPT3 = 40U , kRDC_Periph_GPT4 = 41U , kRDC_Periph_GPT5 = 42U ,   kRDC_Periph_GPT6 = 43U , kRDC_Periph_LPI2C1 = 44U , kRDC_Periph_LPI2C2 = 45U , kRDC_Periph_LPI2C3 = 46U ,   kRDC_Periph_LPI2C4 = 47U , kRDC_Periph_LPSPI1 = 48U , kRDC_Periph_LPSPI2 = 49U , kRDC_Periph_LPSPI3 = 50U ,   kRDC_Periph_LPSPI4 = 51U , kRDC_Periph_GPIO_1_6 = 52U , kRDC_Periph_CCM_OBS = 53U , kRDC_Periph_SIM1 = 54U ,   kRDC_Periph_SIM2 = 55U , kRDC_Periph_QTIMER1 = 56U , kRDC_Periph_QTIMER2 = 57U , kRDC_Periph_QTIMER3 = 58U ,   kRDC_Periph_QTIMER4 = 59U , kRDC_Periph_ENC1 = 60U , kRDC_Periph_ENC2 = 61U , kRDC_Periph_ENC3 = 62U ,   kRDC_Periph_ENC4 = 63U , kRDC_Periph_FLEXPWM1 = 64U , kRDC_Periph_FLEXPWM2 = 65U , kRDC_Periph_FLEXPWM3 = 66U ,   kRDC_Periph_FLEXPWM4 = 67U , kRDC_Periph_CAAM_2 = 68U , kRDC_Periph_CAAM_3 = 69U , kRDC_Periph_ACMP1 = 70U ,   kRDC_Periph_ACMP2 = 71U , kRDC_Periph_ACMP3 = 72U , kRDC_Periph_ACMP4 = 73U , kRDC_Periph_CAAM = 74U ,   kRDC_Periph_SPDIF = 75U , kRDC_Periph_SAI1 = 76U , kRDC_Periph_SAI2 = 77U , kRDC_Periph_SAI3 = 78U ,   kRDC_Periph_ASRC = 79U , kRDC_Periph_USDHC1 = 80U , kRDC_Periph_USDHC2 = 81U , kRDC_Periph_ENET_1G = 82U ,   kRDC_Periph_ENET = 83U , kRDC_Periph_USB_PL301 = 84U , kRDC_Periph_USBPHY2 = 85U , kRDC_Periph_USB_OTG2 = 85U ,   kRDC_Periph_USBPHY1 = 86U , kRDC_Periph_USB_OTG1 = 86U , kRDC_Periph_ENET_QOS = 87U , kRDC_Periph_CAAM_5 = 88U ,   kRDC_Periph_CSI = 89U , kRDC_Periph_LCDIF1 = 90U , kRDC_Periph_LCDIF2 = 91U , kRDC_Periph_MIPI_DSI = 92U ,   kRDC_Periph_MIPI_CSI = 93U , kRDC_Periph_PXP = 94U , kRDC_Periph_VIDEO_MUX = 95U , kRDC_Periph_PGMC_SRC_GPC = 96U ,   kRDC_Periph_IOMUXC_LPSR = 97U , kRDC_Periph_IOMUXC_LPSR_GPR = 98U , kRDC_Periph_WDOG4 = 99U , kRDC_Periph_DMAMUX_LPSR = 100U ,   kRDC_Periph_EDMA_LPSR = 100U , kRDC_Periph_Reserved = 101U , kRDC_Periph_MIC = 102U , kRDC_Periph_LPUART11 = 103U ,   kRDC_Periph_LPUART12 = 104U , kRDC_Periph_LPSPI5 = 105U , kRDC_Periph_LPSPI6 = 106U , kRDC_Periph_LPI2C5 = 107U ,   kRDC_Periph_LPI2C6 = 108U , kRDC_Periph_CAN3 = 109U , kRDC_Periph_SAI4 = 110U , kRDC_Periph_SEMA1 = 111U ,   kRDC_Periph_GPIO_7_12 = 112U , kRDC_Periph_KEY_MANAGER = 113U , kRDC_Periph_ANATOP = 114U , kRDC_Periph_SNVS_HP_WRAPPER = 115U ,   kRDC_Periph_IOMUXC_SNVS = 116U , kRDC_Periph_IOMUXC_SNVS_GPR = 117U , kRDC_Periph_SNVS_SRAM = 118U , kRDC_Periph_GPIO13 = 119U ,   kRDC_Periph_ROMCP = 120U , kRDC_Periph_DCDC = 121U , kRDC_Periph_OCOTP_CTRL_WRAPPER = 122U , kRDC_Periph_PIT2 = 123U ,   kRDC_Periph_SSARC = 124U , kRDC_Periph_CCM = 125U , kRDC_Periph_CAAM_6 = 126U , kRDC_Periph_CAAM_7 = 127U ,   kRDC_Periph_MTR = 0U , kRDC_Periph_MECC1 = 1U , kRDC_Periph_MECC2 = 2U , kRDC_Periph_FLEXSPI1 = 3U ,   kRDC_Periph_FLEXSPI2 = 4U , kRDC_Periph_SEMC = 5U , kRDC_Periph_CM7_IMXRT = 6U , kRDC_Periph_EWM = 7U ,   kRDC_Periph_WDOG1 = 8U , kRDC_Periph_WDOG2 = 9U , kRDC_Periph_WDOG3 = 10U , kRDC_Periph_AOI_XBAR = 11U ,   kRDC_Periph_ADC_ETC = 12U , kRDC_Periph_CAAM_1 = 13U , kRDC_Periph_ADC1 = 14U , kRDC_Periph_ADC2 = 15U ,   kRDC_Periph_TSC_DIG = 16U , kRDC_Periph_DAC = 17U , kRDC_Periph_IEE = 18U , kRDC_Periph_DMAMUX = 19U ,   kRDC_Periph_EDMA = 19U , kRDC_Periph_LPUART1 = 20U , kRDC_Periph_LPUART2 = 21U , kRDC_Periph_LPUART3 = 22U ,   kRDC_Periph_LPUART4 = 23U , kRDC_Periph_LPUART5 = 24U , kRDC_Periph_LPUART6 = 25U , kRDC_Periph_LPUART7 = 26U ,   kRDC_Periph_LPUART8 = 27U , kRDC_Periph_LPUART9 = 28U , kRDC_Periph_LPUART10 = 29U , kRDC_Periph_FLEXIO1 = 30U ,   kRDC_Periph_FLEXIO2 = 31U , kRDC_Periph_CAN1 = 32U , kRDC_Periph_CAN2 = 33U , kRDC_Periph_PIT1 = 34U ,   kRDC_Periph_KPP = 35U , kRDC_Periph_IOMUXC_GPR = 36U , kRDC_Periph_IOMUXC = 37U , kRDC_Periph_GPT1 = 38U ,   kRDC_Periph_GPT2 = 39U , kRDC_Periph_GPT3 = 40U , kRDC_Periph_GPT4 = 41U , kRDC_Periph_GPT5 = 42U ,   kRDC_Periph_GPT6 = 43U , kRDC_Periph_LPI2C1 = 44U , kRDC_Periph_LPI2C2 = 45U , kRDC_Periph_LPI2C3 = 46U ,   kRDC_Periph_LPI2C4 = 47U , kRDC_Periph_LPSPI1 = 48U , kRDC_Periph_LPSPI2 = 49U , kRDC_Periph_LPSPI3 = 50U ,   kRDC_Periph_LPSPI4 = 51U , kRDC_Periph_GPIO_1_6 = 52U , kRDC_Periph_CCM_OBS = 53U , kRDC_Periph_SIM1 = 54U ,   kRDC_Periph_SIM2 = 55U , kRDC_Periph_QTIMER1 = 56U , kRDC_Periph_QTIMER2 = 57U , kRDC_Periph_QTIMER3 = 58U ,   kRDC_Periph_QTIMER4 = 59U , kRDC_Periph_ENC1 = 60U , kRDC_Periph_ENC2 = 61U , kRDC_Periph_ENC3 = 62U ,   kRDC_Periph_ENC4 = 63U , kRDC_Periph_FLEXPWM1 = 64U , kRDC_Periph_FLEXPWM2 = 65U , kRDC_Periph_FLEXPWM3 = 66U ,   kRDC_Periph_FLEXPWM4 = 67U , kRDC_Periph_CAAM_2 = 68U , kRDC_Periph_CAAM_3 = 69U , kRDC_Periph_ACMP1 = 70U ,   kRDC_Periph_ACMP2 = 71U , kRDC_Periph_ACMP3 = 72U , kRDC_Periph_ACMP4 = 73U , kRDC_Periph_CAAM = 74U ,   kRDC_Periph_SPDIF = 75U , kRDC_Periph_SAI1 = 76U , kRDC_Periph_SAI2 = 77U , kRDC_Periph_SAI3 = 78U ,   kRDC_Periph_ASRC = 79U , kRDC_Periph_USDHC1 = 80U , kRDC_Periph_USDHC2 = 81U , kRDC_Periph_ENET_1G = 82U ,   kRDC_Periph_ENET = 83U , kRDC_Periph_USB_PL301 = 84U , kRDC_Periph_USBPHY2 = 85U , kRDC_Periph_USB_OTG2 = 85U ,   kRDC_Periph_USBPHY1 = 86U , kRDC_Periph_USB_OTG1 = 86U , kRDC_Periph_ENET_QOS = 87U , kRDC_Periph_CAAM_5 = 88U ,   kRDC_Periph_CSI = 89U , kRDC_Periph_LCDIF1 = 90U , kRDC_Periph_LCDIF2 = 91U , kRDC_Periph_MIPI_DSI = 92U ,   kRDC_Periph_MIPI_CSI = 93U , kRDC_Periph_PXP = 94U , kRDC_Periph_VIDEO_MUX = 95U , kRDC_Periph_PGMC_SRC_GPC = 96U ,   kRDC_Periph_IOMUXC_LPSR = 97U , kRDC_Periph_IOMUXC_LPSR_GPR = 98U , kRDC_Periph_WDOG4 = 99U , kRDC_Periph_DMAMUX_LPSR = 100U ,   kRDC_Periph_EDMA_LPSR = 100U , kRDC_Periph_Reserved = 101U , kRDC_Periph_MIC = 102U , kRDC_Periph_LPUART11 = 103U ,   kRDC_Periph_LPUART12 = 104U , kRDC_Periph_LPSPI5 = 105U , kRDC_Periph_LPSPI6 = 106U , kRDC_Periph_LPI2C5 = 107U ,   kRDC_Periph_LPI2C6 = 108U , kRDC_Periph_CAN3 = 109U , kRDC_Periph_SAI4 = 110U , kRDC_Periph_SEMA1 = 111U ,   kRDC_Periph_GPIO_7_12 = 112U , kRDC_Periph_KEY_MANAGER = 113U , kRDC_Periph_ANATOP = 114U , kRDC_Periph_SNVS_HP_WRAPPER = 115U ,   kRDC_Periph_IOMUXC_SNVS = 116U , kRDC_Periph_IOMUXC_SNVS_GPR = 117U , kRDC_Periph_SNVS_SRAM = 118U , kRDC_Periph_GPIO13 = 119U ,   kRDC_Periph_ROMCP = 120U , kRDC_Periph_DCDC = 121U , kRDC_Periph_OCOTP_CTRL_WRAPPER = 122U , kRDC_Periph_PIT2 = 123U ,   kRDC_Periph_SSARC = 124U , kRDC_Periph_CCM = 125U , kRDC_Periph_CAAM_6 = 126U , kRDC_Periph_CAAM_7 = 127U }
enum	_xbar_input_signal {   kXBARA1_InputLogicLow = 0|0x100U , kXBARA1_InputLogicHigh = 1|0x100U , kXBARA1_InputIomuxXbarIn02 = 2|0x100U , kXBARA1_InputIomuxXbarIn03 = 3|0x100U ,   kXBARA1_InputIomuxXbarInout04 = 4|0x100U , kXBARA1_InputIomuxXbarInout05 = 5|0x100U , kXBARA1_InputIomuxXbarInout06 = 6|0x100U , kXBARA1_InputIomuxXbarInout07 = 7|0x100U ,   kXBARA1_InputIomuxXbarInout08 = 8|0x100U , kXBARA1_InputIomuxXbarInout09 = 9|0x100U , kXBARA1_InputIomuxXbarInout10 = 10|0x100U , kXBARA1_InputIomuxXbarInout11 = 11|0x100U ,   kXBARA1_InputIomuxXbarInout12 = 12|0x100U , kXBARA1_InputIomuxXbarInout13 = 13|0x100U , kXBARA1_InputIomuxXbarInout14 = 14|0x100U , kXBARA1_InputIomuxXbarInout15 = 15|0x100U ,   kXBARA1_InputIomuxXbarInout16 = 16|0x100U , kXBARA1_InputIomuxXbarInout17 = 17|0x100U , kXBARA1_InputIomuxXbarInout18 = 18|0x100U , kXBARA1_InputIomuxXbarInout19 = 19|0x100U ,   kXBARA1_InputIomuxXbarIn20 = 20|0x100U , kXBARA1_InputIomuxXbarIn21 = 21|0x100U , kXBARA1_InputIomuxXbarIn22 = 22|0x100U , kXBARA1_InputIomuxXbarIn23 = 23|0x100U ,   kXBARA1_InputIomuxXbarIn24 = 24|0x100U , kXBARA1_InputIomuxXbarIn25 = 25|0x100U , kXBARA1_InputAcmp1Out = 26|0x100U , kXBARA1_InputAcmp2Out = 27|0x100U ,   kXBARA1_InputAcmp3Out = 28|0x100U , kXBARA1_InputAcmp4Out = 29|0x100U , kXBARA1_InputRESERVED30 = 30|0x100U , kXBARA1_InputRESERVED31 = 31|0x100U ,   kXBARA1_InputQtimer3Tmr0Output = 32|0x100U , kXBARA1_InputQtimer3Tmr1Output = 33|0x100U , kXBARA1_InputQtimer3Tmr2Output = 34|0x100U , kXBARA1_InputQtimer3Tmr3Output = 35|0x100U ,   kXBARA1_InputQtimer4Tmr0Output = 36|0x100U , kXBARA1_InputQtimer4Tmr1Output = 37|0x100U , kXBARA1_InputQtimer4Tmr2Output = 38|0x100U , kXBARA1_InputQtimer4Tmr3Output = 39|0x100U ,   kXBARA1_InputFlexpwm1Pwm1OutTrig01 = 40|0x100U , kXBARA1_InputFlexpwm1Pwm2OutTrig01 = 41|0x100U , kXBARA1_InputFlexpwm1Pwm3OutTrig01 = 42|0x100U , kXBARA1_InputFlexpwm1Pwm4OutTrig01 = 43|0x100U ,   kXBARA1_InputFlexpwm2Pwm1OutTrig01 = 44|0x100U , kXBARA1_InputFlexpwm2Pwm2OutTrig01 = 45|0x100U , kXBARA1_InputFlexpwm2Pwm3OutTrig01 = 46|0x100U , kXBARA1_InputFlexpwm2Pwm4OutTrig01 = 47|0x100U ,   kXBARA1_InputFlexpwm3Pwm1OutTrig01 = 48|0x100U , kXBARA1_InputFlexpwm3Pwm2OutTrig01 = 49|0x100U , kXBARA1_InputFlexpwm3Pwm3OutTrig01 = 50|0x100U , kXBARA1_InputFlexpwm3Pwm4OutTrig01 = 51|0x100U ,   kXBARA1_InputFlexpwm4Pwm1OutTrig01 = 52|0x100U , kXBARA1_InputFlexpwm4Pwm2OutTrig01 = 53|0x100U , kXBARA1_InputFlexpwm4Pwm3OutTrig01 = 54|0x100U , kXBARA1_InputFlexpwm4Pwm4OutTrig01 = 55|0x100U ,   kXBARA1_InputPitTrigger0 = 56|0x100U , kXBARA1_InputPitTrigger1 = 57|0x100U , kXBARA1_InputPitTrigger2 = 58|0x100U , kXBARA1_InputPitTrigger3 = 59|0x100U ,   kXBARA1_InputEnc1PosMatch = 60|0x100U , kXBARA1_InputEnc2PosMatch = 61|0x100U , kXBARA1_InputEnc3PosMatch = 62|0x100U , kXBARA1_InputEnc4PosMatch = 63|0x100U ,   kXBARA1_InputDmaDone0 = 64|0x100U , kXBARA1_InputDmaDone1 = 65|0x100U , kXBARA1_InputDmaDone2 = 66|0x100U , kXBARA1_InputDmaDone3 = 67|0x100U ,   kXBARA1_InputDmaDone4 = 68|0x100U , kXBARA1_InputDmaDone5 = 69|0x100U , kXBARA1_InputDmaDone6 = 70|0x100U , kXBARA1_InputDmaDone7 = 71|0x100U ,   kXBARA1_InputAoi1Out0 = 72|0x100U , kXBARA1_InputAoi1Out1 = 73|0x100U , kXBARA1_InputAoi1Out2 = 74|0x100U , kXBARA1_InputAoi1Out3 = 75|0x100U ,   kXBARA1_InputAoi2Out0 = 76|0x100U , kXBARA1_InputAoi2Out1 = 77|0x100U , kXBARA1_InputAoi2Out2 = 78|0x100U , kXBARA1_InputAoi2Out3 = 79|0x100U ,   kXBARA1_InputAdcEtcXbar0Coco0 = 80|0x100U , kXBARA1_InputAdcEtcXbar0Coco1 = 81|0x100U , kXBARA1_InputAdcEtcXbar0Coco2 = 82|0x100U , kXBARA1_InputAdcEtcXbar0Coco3 = 83|0x100U ,   kXBARA1_InputAdcEtcXbar1Coco0 = 84|0x100U , kXBARA1_InputAdcEtcXbar1Coco1 = 85|0x100U , kXBARA1_InputAdcEtcXbar1Coco2 = 86|0x100U , kXBARA1_InputAdcEtcXbar1Coco3 = 87|0x100U ,   kXBARB2_InputLogicLow = 0|0x200U , kXBARB2_InputLogicHigh = 1|0x200U , kXBARB2_InputRESERVED2 = 2|0x200U , kXBARB2_InputRESERVED3 = 3|0x200U ,   kXBARB2_InputRESERVED4 = 4|0x200U , kXBARB2_InputRESERVED5 = 5|0x200U , kXBARB2_InputAcmp1Out = 6|0x200U , kXBARB2_InputAcmp2Out = 7|0x200U ,   kXBARB2_InputAcmp3Out = 8|0x200U , kXBARB2_InputAcmp4Out = 9|0x200U , kXBARB2_InputRESERVED10 = 10|0x200U , kXBARB2_InputRESERVED11 = 11|0x200U ,   kXBARB2_InputQtimer3Tmr0Output = 12|0x200U , kXBARB2_InputQtimer3Tmr1Output = 13|0x200U , kXBARB2_InputQtimer3Tmr2Output = 14|0x200U , kXBARB2_InputQtimer3Tmr3Output = 15|0x200U ,   kXBARB2_InputQtimer4Tmr0Output = 16|0x200U , kXBARB2_InputQtimer4Tmr1Output = 17|0x200U , kXBARB2_InputQtimer4Tmr2Output = 18|0x200U , kXBARB2_InputQtimer4Tmr3Output = 19|0x200U ,   kXBARB2_InputFlexpwm1Pwm1OutTrig01 = 20|0x200U , kXBARB2_InputFlexpwm1Pwm2OutTrig01 = 21|0x200U , kXBARB2_InputFlexpwm1Pwm3OutTrig01 = 22|0x200U , kXBARB2_InputFlexpwm1Pwm4OutTrig01 = 23|0x200U ,   kXBARB2_InputFlexpwm2Pwm1OutTrig01 = 24|0x200U , kXBARB2_InputFlexpwm2Pwm2OutTrig01 = 25|0x200U , kXBARB2_InputFlexpwm2Pwm3OutTrig01 = 26|0x200U , kXBARB2_InputFlexpwm2Pwm4OutTrig01 = 27|0x200U ,   kXBARB2_InputFlexpwm3Pwm1OutTrig01 = 28|0x200U , kXBARB2_InputFlexpwm3Pwm2OutTrig01 = 29|0x200U , kXBARB2_InputFlexpwm3Pwm3OutTrig01 = 30|0x200U , kXBARB2_InputFlexpwm3Pwm4OutTrig01 = 31|0x200U ,   kXBARB2_InputFlexpwm4Pwm1OutTrig01 = 32|0x200U , kXBARB2_InputFlexpwm4Pwm2OutTrig01 = 33|0x200U , kXBARB2_InputFlexpwm4Pwm3OutTrig01 = 34|0x200U , kXBARB2_InputFlexpwm4Pwm4OutTrig01 = 35|0x200U ,   kXBARB2_InputPitTrigger0 = 36|0x200U , kXBARB2_InputPitTrigger1 = 37|0x200U , kXBARB2_InputAdcEtcXbar0Coco0 = 38|0x200U , kXBARB2_InputAdcEtcXbar0Coco1 = 39|0x200U ,   kXBARB2_InputAdcEtcXbar0Coco2 = 40|0x200U , kXBARB2_InputAdcEtcXbar0Coco3 = 41|0x200U , kXBARB2_InputAdcEtcXbar1Coco0 = 42|0x200U , kXBARB2_InputAdcEtcXbar1Coco1 = 43|0x200U ,   kXBARB2_InputAdcEtcXbar1Coco2 = 44|0x200U , kXBARB2_InputAdcEtcXbar1Coco3 = 45|0x200U , kXBARB2_InputEnc1PosMatch = 46|0x200U , kXBARB2_InputEnc2PosMatch = 47|0x200U ,   kXBARB2_InputEnc3PosMatch = 48|0x200U , kXBARB2_InputEnc4PosMatch = 49|0x200U , kXBARB2_InputDmaDone0 = 50|0x200U , kXBARB2_InputDmaDone1 = 51|0x200U ,   kXBARB2_InputDmaDone2 = 52|0x200U , kXBARB2_InputDmaDone3 = 53|0x200U , kXBARB2_InputDmaDone4 = 54|0x200U , kXBARB2_InputDmaDone5 = 55|0x200U ,   kXBARB2_InputDmaDone6 = 56|0x200U , kXBARB2_InputDmaDone7 = 57|0x200U , kXBARB3_InputLogicLow = 0|0x300U , kXBARB3_InputLogicHigh = 1|0x300U ,   kXBARB3_InputRESERVED2 = 2|0x300U , kXBARB3_InputRESERVED3 = 3|0x300U , kXBARB3_InputRESERVED4 = 4|0x300U , kXBARB3_InputRESERVED5 = 5|0x300U ,   kXBARB3_InputAcmp1Out = 6|0x300U , kXBARB3_InputAcmp2Out = 7|0x300U , kXBARB3_InputAcmp3Out = 8|0x300U , kXBARB3_InputAcmp4Out = 9|0x300U ,   kXBARB3_InputRESERVED10 = 10|0x300U , kXBARB3_InputRESERVED11 = 11|0x300U , kXBARB3_InputQtimer3Tmr0Output = 12|0x300U , kXBARB3_InputQtimer3Tmr1Output = 13|0x300U ,   kXBARB3_InputQtimer3Tmr2Output = 14|0x300U , kXBARB3_InputQtimer3Tmr3Output = 15|0x300U , kXBARB3_InputQtimer4Tmr0Output = 16|0x300U , kXBARB3_InputQtimer4Tmr1Output = 17|0x300U ,   kXBARB3_InputQtimer4Tmr2Output = 18|0x300U , kXBARB3_InputQtimer4Tmr3Output = 19|0x300U , kXBARB3_InputFlexpwm1Pwm1OutTrig01 = 20|0x300U , kXBARB3_InputFlexpwm1Pwm2OutTrig01 = 21|0x300U ,   kXBARB3_InputFlexpwm1Pwm3OutTrig01 = 22|0x300U , kXBARB3_InputFlexpwm1Pwm4OutTrig01 = 23|0x300U , kXBARB3_InputFlexpwm2Pwm1OutTrig01 = 24|0x300U , kXBARB3_InputFlexpwm2Pwm2OutTrig01 = 25|0x300U ,   kXBARB3_InputFlexpwm2Pwm3OutTrig01 = 26|0x300U , kXBARB3_InputFlexpwm2Pwm4OutTrig01 = 27|0x300U , kXBARB3_InputFlexpwm3Pwm1OutTrig01 = 28|0x300U , kXBARB3_InputFlexpwm3Pwm2OutTrig01 = 29|0x300U ,   kXBARB3_InputFlexpwm3Pwm3OutTrig01 = 30|0x300U , kXBARB3_InputFlexpwm3Pwm4OutTrig01 = 31|0x300U , kXBARB3_InputFlexpwm4Pwm1OutTrig01 = 32|0x300U , kXBARB3_InputFlexpwm4Pwm2OutTrig01 = 33|0x300U ,   kXBARB3_InputFlexpwm4Pwm3OutTrig01 = 34|0x300U , kXBARB3_InputFlexpwm4Pwm4OutTrig01 = 35|0x300U , kXBARB3_InputPitTrigger0 = 36|0x300U , kXBARB3_InputPitTrigger1 = 37|0x300U ,   kXBARB3_InputAdcEtcXbar0Coco0 = 38|0x300U , kXBARB3_InputAdcEtcXbar0Coco1 = 39|0x300U , kXBARB3_InputAdcEtcXbar0Coco2 = 40|0x300U , kXBARB3_InputAdcEtcXbar0Coco3 = 41|0x300U ,   kXBARB3_InputAdcEtcXbar1Coco0 = 42|0x300U , kXBARB3_InputAdcEtcXbar1Coco1 = 43|0x300U , kXBARB3_InputAdcEtcXbar1Coco2 = 44|0x300U , kXBARB3_InputAdcEtcXbar1Coco3 = 45|0x300U ,   kXBARB3_InputEnc1PosMatch = 46|0x300U , kXBARB3_InputEnc2PosMatch = 47|0x300U , kXBARB3_InputEnc3PosMatch = 48|0x300U , kXBARB3_InputEnc4PosMatch = 49|0x300U ,   kXBARB3_InputDmaDone0 = 50|0x300U , kXBARB3_InputDmaDone1 = 51|0x300U , kXBARB3_InputDmaDone2 = 52|0x300U , kXBARB3_InputDmaDone3 = 53|0x300U ,   kXBARB3_InputDmaDone4 = 54|0x300U , kXBARB3_InputDmaDone5 = 55|0x300U , kXBARB3_InputDmaDone6 = 56|0x300U , kXBARB3_InputDmaDone7 = 57|0x300U ,   kXBARA1_InputLogicLow = 0|0x100U , kXBARA1_InputLogicHigh = 1|0x100U , kXBARA1_InputRESERVED2 = 2|0x100U , kXBARA1_InputRESERVED3 = 3|0x100U ,   kXBARA1_InputIomuxXbarInout04 = 4|0x100U , kXBARA1_InputIomuxXbarInout05 = 5|0x100U , kXBARA1_InputIomuxXbarInout06 = 6|0x100U , kXBARA1_InputIomuxXbarInout07 = 7|0x100U ,   kXBARA1_InputIomuxXbarInout08 = 8|0x100U , kXBARA1_InputIomuxXbarInout09 = 9|0x100U , kXBARA1_InputIomuxXbarInout10 = 10|0x100U , kXBARA1_InputIomuxXbarInout11 = 11|0x100U ,   kXBARA1_InputIomuxXbarInout12 = 12|0x100U , kXBARA1_InputIomuxXbarInout13 = 13|0x100U , kXBARA1_InputIomuxXbarInout14 = 14|0x100U , kXBARA1_InputIomuxXbarInout15 = 15|0x100U ,   kXBARA1_InputIomuxXbarInout16 = 16|0x100U , kXBARA1_InputIomuxXbarInout17 = 17|0x100U , kXBARA1_InputIomuxXbarInout18 = 18|0x100U , kXBARA1_InputIomuxXbarInout19 = 19|0x100U ,   kXBARA1_InputIomuxXbarInout20 = 20|0x100U , kXBARA1_InputIomuxXbarInout21 = 21|0x100U , kXBARA1_InputIomuxXbarInout22 = 22|0x100U , kXBARA1_InputIomuxXbarInout23 = 23|0x100U ,   kXBARA1_InputIomuxXbarInout24 = 24|0x100U , kXBARA1_InputIomuxXbarInout25 = 25|0x100U , kXBARA1_InputIomuxXbarInout26 = 26|0x100U , kXBARA1_InputIomuxXbarInout27 = 27|0x100U ,   kXBARA1_InputIomuxXbarInout28 = 28|0x100U , kXBARA1_InputIomuxXbarInout29 = 29|0x100U , kXBARA1_InputIomuxXbarInout30 = 30|0x100U , kXBARA1_InputIomuxXbarInout31 = 31|0x100U ,   kXBARA1_InputIomuxXbarInout32 = 32|0x100U , kXBARA1_InputIomuxXbarInout33 = 33|0x100U , kXBARA1_InputIomuxXbarInout34 = 34|0x100U , kXBARA1_InputIomuxXbarInout35 = 35|0x100U ,   kXBARA1_InputIomuxXbarInout36 = 36|0x100U , kXBARA1_InputIomuxXbarInout37 = 37|0x100U , kXBARA1_InputIomuxXbarInout38 = 38|0x100U , kXBARA1_InputIomuxXbarInout39 = 39|0x100U ,   kXBARA1_InputIomuxXbarInout40 = 40|0x100U , kXBARA1_InputRESERVED41 = 41|0x100U , kXBARA1_InputAcmp1Out = 42|0x100U , kXBARA1_InputAcmp2Out = 43|0x100U ,   kXBARA1_InputAcmp3Out = 44|0x100U , kXBARA1_InputAcmp4Out = 45|0x100U , kXBARA1_InputRESERVED46 = 46|0x100U , kXBARA1_InputRESERVED47 = 47|0x100U ,   kXBARA1_InputRESERVED48 = 48|0x100U , kXBARA1_InputRESERVED49 = 49|0x100U , kXBARA1_InputQtimer1Timer0 = 50|0x100U , kXBARA1_InputQtimer1Timer1 = 51|0x100U ,   kXBARA1_InputQtimer1Timer2 = 52|0x100U , kXBARA1_InputQtimer1Timer3 = 53|0x100U , kXBARA1_InputQtimer2Timer0 = 54|0x100U , kXBARA1_InputQtimer2Timer1 = 55|0x100U ,   kXBARA1_InputQtimer2Timer2 = 56|0x100U , kXBARA1_InputQtimer2Timer3 = 57|0x100U , kXBARA1_InputQtimer3Timer0 = 58|0x100U , kXBARA1_InputQtimer3Timer1 = 59|0x100U ,   kXBARA1_InputQtimer3Timer2 = 60|0x100U , kXBARA1_InputQtimer3Timer3 = 61|0x100U , kXBARA1_InputQtimer4Timer0 = 62|0x100U , kXBARA1_InputQtimer4Timer1 = 63|0x100U ,   kXBARA1_InputQtimer4Timer2 = 64|0x100U , kXBARA1_InputQtimer4Timer3 = 65|0x100U , kXBARA1_InputRESERVED66 = 66|0x100U , kXBARA1_InputRESERVED67 = 67|0x100U ,   kXBARA1_InputRESERVED68 = 68|0x100U , kXBARA1_InputRESERVED69 = 69|0x100U , kXBARA1_InputRESERVED70 = 70|0x100U , kXBARA1_InputRESERVED71 = 71|0x100U ,   kXBARA1_InputRESERVED72 = 72|0x100U , kXBARA1_InputRESERVED73 = 73|0x100U , kXBARA1_InputFlexpwm1Pwm0OutTrig0 = 74|0x100U , kXBARA1_InputFlexpwm1Pwm0OutTrig1 = 75|0x100U ,   kXBARA1_InputFlexpwm1Pwm1OutTrig0 = 76|0x100U , kXBARA1_InputFlexpwm1Pwm1OutTrig1 = 77|0x100U , kXBARA1_InputFlexpwm1Pwm2OutTrig0 = 78|0x100U , kXBARA1_InputFlexpwm1Pwm2OutTrig1 = 79|0x100U ,   kXBARA1_InputFlexpwm1Pwm3OutTrig0 = 80|0x100U , kXBARA1_InputFlexpwm1Pwm3OutTrig1 = 81|0x100U , kXBARA1_InputFlexpwm2Pwm0OutTrig01 = 82|0x100U , kXBARA1_InputFlexpwm2Pwm1OutTrig01 = 83|0x100U ,   kXBARA1_InputFlexpwm2Pwm2OutTrig01 = 84|0x100U , kXBARA1_InputFlexpwm2Pwm3OutTrig01 = 85|0x100U , kXBARA1_InputFlexpwm3Pwm0OutTrig01 = 86|0x100U , kXBARA1_InputFlexpwm3Pwm1OutTrig01 = 87|0x100U ,   kXBARA1_InputFlexpwm3Pwm2OutTrig01 = 88|0x100U , kXBARA1_InputFlexpwm3Pwm3OutTrig01 = 89|0x100U , kXBARA1_InputFlexpwm4Pwm0OutTrig01 = 90|0x100U , kXBARA1_InputFlexpwm4Pwm1OutTrig01 = 91|0x100U ,   kXBARA1_InputFlexpwm4Pwm2OutTrig01 = 92|0x100U , kXBARA1_InputFlexpwm4Pwm3OutTrig01 = 93|0x100U , kXBARA1_InputRESERVED94 = 94|0x100U , kXBARA1_InputRESERVED95 = 95|0x100U ,   kXBARA1_InputRESERVED96 = 96|0x100U , kXBARA1_InputRESERVED97 = 97|0x100U , kXBARA1_InputRESERVED98 = 98|0x100U , kXBARA1_InputRESERVED99 = 99|0x100U ,   kXBARA1_InputRESERVED100 = 100|0x100U , kXBARA1_InputRESERVED101 = 101|0x100U , kXBARA1_InputPit1Trigger0 = 102|0x100U , kXBARA1_InputPit1Trigger1 = 103|0x100U ,   kXBARA1_InputPit1Trigger2 = 104|0x100U , kXBARA1_InputPit1Trigger3 = 105|0x100U , kXBARA1_InputDec1PosMatch = 106|0x100U , kXBARA1_InputDec2PosMatch = 107|0x100U ,   kXBARA1_InputDec3PosMatch = 108|0x100U , kXBARA1_InputDec4PosMatch = 109|0x100U , kXBARA1_InputRESERVED110 = 110|0x100U , kXBARA1_InputRESERVED111 = 111|0x100U ,   kXBARA1_InputDmaDone0 = 112|0x100U , kXBARA1_InputDmaDone1 = 113|0x100U , kXBARA1_InputDmaDone2 = 114|0x100U , kXBARA1_InputDmaDone3 = 115|0x100U ,   kXBARA1_InputDmaDone4 = 116|0x100U , kXBARA1_InputDmaDone5 = 117|0x100U , kXBARA1_InputDmaDone6 = 118|0x100U , kXBARA1_InputDmaDone7 = 119|0x100U ,   kXBARA1_InputDmaLpsrDone0 = 120|0x100U , kXBARA1_InputDmaLpsrDone1 = 121|0x100U , kXBARA1_InputDmaLpsrDone2 = 122|0x100U , kXBARA1_InputDmaLpsrDone3 = 123|0x100U ,   kXBARA1_InputDmaLpsrDone4 = 124|0x100U , kXBARA1_InputDmaLpsrDone5 = 125|0x100U , kXBARA1_InputDmaLpsrDone6 = 126|0x100U , kXBARA1_InputDmaLpsrDone7 = 127|0x100U ,   kXBARA1_InputAoi1Out0 = 128|0x100U , kXBARA1_InputAoi1Out1 = 129|0x100U , kXBARA1_InputAoi1Out2 = 130|0x100U , kXBARA1_InputAoi1Out3 = 131|0x100U ,   kXBARA1_InputAoi2Out0 = 132|0x100U , kXBARA1_InputAoi2Out1 = 133|0x100U , kXBARA1_InputAoi2Out2 = 134|0x100U , kXBARA1_InputAoi2Out3 = 135|0x100U ,   kXBARA1_InputAdcEtc0Coco0 = 136|0x100U , kXBARA1_InputAdcEtc0Coco1 = 137|0x100U , kXBARA1_InputAdcEtc0Coco2 = 138|0x100U , kXBARA1_InputAdcEtc0Coco3 = 139|0x100U ,   kXBARA1_InputAdcEtc1Coco0 = 140|0x100U , kXBARA1_InputAdcEtc1Coco1 = 141|0x100U , kXBARA1_InputAdcEtc1Coco2 = 142|0x100U , kXBARA1_InputAdcEtc1Coco3 = 143|0x100U ,   kXBARB2_InputLogicLow = 0|0x200U , kXBARB2_InputLogicHigh = 1|0x200U , kXBARB2_InputAcmp1Out = 2|0x200U , kXBARB2_InputAcmp2Out = 3|0x200U ,   kXBARB2_InputAcmp3Out = 4|0x200U , kXBARB2_InputAcmp4Out = 5|0x200U , kXBARB2_InputRESERVED6 = 6|0x200U , kXBARB2_InputRESERVED7 = 7|0x200U ,   kXBARB2_InputRESERVED8 = 8|0x200U , kXBARB2_InputRESERVED9 = 9|0x200U , kXBARB2_InputQtimer1Timer0 = 10|0x200U , kXBARB2_InputQtimer1Timer1 = 11|0x200U ,   kXBARB2_InputQtimer1Timer2 = 12|0x200U , kXBARB2_InputQtimer1Timer3 = 13|0x200U , kXBARB2_InputQtimer2Timer0 = 14|0x200U , kXBARB2_InputQtimer2Timer1 = 15|0x200U ,   kXBARB2_InputQtimer2Timer2 = 16|0x200U , kXBARB2_InputQtimer2Timer3 = 17|0x200U , kXBARB2_InputQtimer3Timer0 = 18|0x200U , kXBARB2_InputQtimer3Timer1 = 19|0x200U ,   kXBARB2_InputQtimer3Timer2 = 20|0x200U , kXBARB2_InputQtimer3Timer3 = 21|0x200U , kXBARB2_InputQtimer4Timer0 = 22|0x200U , kXBARB2_InputQtimer4Timer1 = 23|0x200U ,   kXBARB2_InputQtimer4Timer2 = 24|0x200U , kXBARB2_InputQtimer4Timer3 = 25|0x200U , kXBARB2_InputRESERVED26 = 26|0x200U , kXBARB2_InputRESERVED27 = 27|0x200U ,   kXBARB2_InputRESERVED28 = 28|0x200U , kXBARB2_InputRESERVED29 = 29|0x200U , kXBARB2_InputRESERVED30 = 30|0x200U , kXBARB2_InputRESERVED31 = 31|0x200U ,   kXBARB2_InputRESERVED32 = 32|0x200U , kXBARB2_InputRESERVED33 = 33|0x200U , kXBARB2_InputFlexpwm1Pwm0OutTrig01 = 34|0x200U , kXBARB2_InputFlexpwm1Pwm1OutTrig01 = 35|0x200U ,   kXBARB2_InputFlexpwm1Pwm2OutTrig01 = 36|0x200U , kXBARB2_InputFlexpwm1Pwm3OutTrig01 = 37|0x200U , kXBARB2_InputFlexpwm2Pwm0OutTrig01 = 38|0x200U , kXBARB2_InputFlexpwm2Pwm1OutTrig01 = 39|0x200U ,   kXBARB2_InputFlexpwm2Pwm2OutTrig01 = 40|0x200U , kXBARB2_InputFlexpwm2Pwm3OutTrig01 = 41|0x200U , kXBARB2_InputFlexpwm3Pwm0OutTrig01 = 42|0x200U , kXBARB2_InputFlexpwm3Pwm1OutTrig01 = 43|0x200U ,   kXBARB2_InputFlexpwm3Pwm2OutTrig01 = 44|0x200U , kXBARB2_InputFlexpwm3Pwm3OutTrig01 = 45|0x200U , kXBARB2_InputFlexpwm4Pwm0OutTrig01 = 46|0x200U , kXBARB2_InputFlexpwm4Pwm1OutTrig01 = 47|0x200U ,   kXBARB2_InputFlexpwm4Pwm2OutTrig01 = 48|0x200U , kXBARB2_InputFlexpwm4Pwm3OutTrig01 = 49|0x200U , kXBARB2_InputRESERVED50 = 50|0x200U , kXBARB2_InputRESERVED51 = 51|0x200U ,   kXBARB2_InputRESERVED52 = 52|0x200U , kXBARB2_InputRESERVED53 = 53|0x200U , kXBARB2_InputRESERVED54 = 54|0x200U , kXBARB2_InputRESERVED55 = 55|0x200U ,   kXBARB2_InputRESERVED56 = 56|0x200U , kXBARB2_InputRESERVED57 = 57|0x200U , kXBARB2_InputPit1Trigger0 = 58|0x200U , kXBARB2_InputPit1Trigger1 = 59|0x200U ,   kXBARB2_InputAdcEtc0Coco0 = 60|0x200U , kXBARB2_InputAdcEtc0Coco1 = 61|0x200U , kXBARB2_InputAdcEtc0Coco2 = 62|0x200U , kXBARB2_InputAdcEtc0Coco3 = 63|0x200U ,   kXBARB2_InputAdcEtc1Coco0 = 64|0x200U , kXBARB2_InputAdcEtc1Coco1 = 65|0x200U , kXBARB2_InputAdcEtc1Coco2 = 66|0x200U , kXBARB2_InputAdcEtc1Coco3 = 67|0x200U ,   kXBARB2_InputRESERVED68 = 68|0x200U , kXBARB2_InputRESERVED69 = 69|0x200U , kXBARB2_InputRESERVED70 = 70|0x200U , kXBARB2_InputRESERVED71 = 71|0x200U ,   kXBARB2_InputRESERVED72 = 72|0x200U , kXBARB2_InputRESERVED73 = 73|0x200U , kXBARB2_InputRESERVED74 = 74|0x200U , kXBARB2_InputRESERVED75 = 75|0x200U ,   kXBARB2_InputDec1PosMatch = 76|0x200U , kXBARB2_InputDec2PosMatch = 77|0x200U , kXBARB2_InputDec3PosMatch = 78|0x200U , kXBARB2_InputDec4PosMatch = 79|0x200U ,   kXBARB2_InputRESERVED80 = 80|0x200U , kXBARB2_InputRESERVED81 = 81|0x200U , kXBARB2_InputDmaDone0 = 82|0x200U , kXBARB2_InputDmaDone1 = 83|0x200U ,   kXBARB2_InputDmaDone2 = 84|0x200U , kXBARB2_InputDmaDone3 = 85|0x200U , kXBARB2_InputDmaDone4 = 86|0x200U , kXBARB2_InputDmaDone5 = 87|0x200U ,   kXBARB2_InputDmaDone6 = 88|0x200U , kXBARB2_InputDmaDone7 = 89|0x200U , kXBARB2_InputDmaLpsrDone0 = 90|0x200U , kXBARB2_InputDmaLpsrDone1 = 91|0x200U ,   kXBARB2_InputDmaLpsrDone2 = 92|0x200U , kXBARB2_InputDmaLpsrDone3 = 93|0x200U , kXBARB2_InputDmaLpsrDone4 = 94|0x200U , kXBARB2_InputDmaLpsrDone5 = 95|0x200U ,   kXBARB2_InputDmaLpsrDone6 = 96|0x200U , kXBARB2_InputDmaLpsrDone7 = 97|0x200U , kXBARB3_InputLogicLow = 0|0x300U , kXBARB3_InputLogicHigh = 1|0x300U ,   kXBARB3_InputAcmp1Out = 2|0x300U , kXBARB3_InputAcmp2Out = 3|0x300U , kXBARB3_InputAcmp3Out = 4|0x300U , kXBARB3_InputAcmp4Out = 5|0x300U ,   kXBARB3_InputRESERVED6 = 6|0x300U , kXBARB3_InputRESERVED7 = 7|0x300U , kXBARB3_InputRESERVED8 = 8|0x300U , kXBARB3_InputRESERVED9 = 9|0x300U ,   kXBARB3_InputQtimer1Timer0 = 10|0x300U , kXBARB3_InputQtimer1Timer1 = 11|0x300U , kXBARB3_InputQtimer1Timer2 = 12|0x300U , kXBARB3_InputQtimer1Timer3 = 13|0x300U ,   kXBARB3_InputQtimer2Timer0 = 14|0x300U , kXBARB3_InputQtimer2Timer1 = 15|0x300U , kXBARB3_InputQtimer2Timer2 = 16|0x300U , kXBARB3_InputQtimer2Timer3 = 17|0x300U ,   kXBARB3_InputQtimer3Timer0 = 18|0x300U , kXBARB3_InputQtimer3Timer1 = 19|0x300U , kXBARB3_InputQtimer3Timer2 = 20|0x300U , kXBARB3_InputQtimer3Timer3 = 21|0x300U ,   kXBARB3_InputQtimer4Timer0 = 22|0x300U , kXBARB3_InputQtimer4Timer1 = 23|0x300U , kXBARB3_InputQtimer4Timer2 = 24|0x300U , kXBARB3_InputQtimer4Timer3 = 25|0x300U ,   kXBARB3_InputRESERVED26 = 26|0x300U , kXBARB3_InputRESERVED27 = 27|0x300U , kXBARB3_InputRESERVED28 = 28|0x300U , kXBARB3_InputRESERVED29 = 29|0x300U ,   kXBARB3_InputRESERVED30 = 30|0x300U , kXBARB3_InputRESERVED31 = 31|0x300U , kXBARB3_InputRESERVED32 = 32|0x300U , kXBARB3_InputRESERVED33 = 33|0x300U ,   kXBARB3_InputFlexpwm1Pwm0OutTrig01 = 34|0x300U , kXBARB3_InputFlexpwm1Pwm1OutTrig01 = 35|0x300U , kXBARB3_InputFlexpwm1Pwm2OutTrig01 = 36|0x300U , kXBARB3_InputFlexpwm1Pwm3OutTrig01 = 37|0x300U ,   kXBARB3_InputFlexpwm2Pwm0OutTrig01 = 38|0x300U , kXBARB3_InputFlexpwm2Pwm1OutTrig01 = 39|0x300U , kXBARB3_InputFlexpwm2Pwm2OutTrig01 = 40|0x300U , kXBARB3_InputFlexpwm2Pwm3OutTrig01 = 41|0x300U ,   kXBARB3_InputFlexpwm3Pwm0OutTrig01 = 42|0x300U , kXBARB3_InputFlexpwm3Pwm1OutTrig01 = 43|0x300U , kXBARB3_InputFlexpwm3Pwm2OutTrig01 = 44|0x300U , kXBARB3_InputFlexpwm3Pwm3OutTrig01 = 45|0x300U ,   kXBARB3_InputFlexpwm4Pwm0OutTrig01 = 46|0x300U , kXBARB3_InputFlexpwm4Pwm1OutTrig01 = 47|0x300U , kXBARB3_InputFlexpwm4Pwm2OutTrig01 = 48|0x300U , kXBARB3_InputFlexpwm4Pwm3OutTrig01 = 49|0x300U ,   kXBARB3_InputRESERVED50 = 50|0x300U , kXBARB3_InputRESERVED51 = 51|0x300U , kXBARB3_InputRESERVED52 = 52|0x300U , kXBARB3_InputRESERVED53 = 53|0x300U ,   kXBARB3_InputRESERVED54 = 54|0x300U , kXBARB3_InputRESERVED55 = 55|0x300U , kXBARB3_InputRESERVED56 = 56|0x300U , kXBARB3_InputRESERVED57 = 57|0x300U ,   kXBARB3_InputPit1Trigger0 = 58|0x300U , kXBARB3_InputPit1Trigger1 = 59|0x300U , kXBARB3_InputAdcEtc0Coco0 = 60|0x300U , kXBARB3_InputAdcEtc0Coco1 = 61|0x300U ,   kXBARB3_InputAdcEtc0Coco2 = 62|0x300U , kXBARB3_InputAdcEtc0Coco3 = 63|0x300U , kXBARB3_InputAdcEtc1Coco0 = 64|0x300U , kXBARB3_InputAdcEtc1Coco1 = 65|0x300U ,   kXBARB3_InputAdcEtc1Coco2 = 66|0x300U , kXBARB3_InputAdcEtc1Coco3 = 67|0x300U , kXBARB3_InputRESERVED68 = 68|0x300U , kXBARB3_InputRESERVED69 = 69|0x300U ,   kXBARB3_InputRESERVED70 = 70|0x300U , kXBARB3_InputRESERVED71 = 71|0x300U , kXBARB3_InputRESERVED72 = 72|0x300U , kXBARB3_InputRESERVED73 = 73|0x300U ,   kXBARB3_InputRESERVED74 = 74|0x300U , kXBARB3_InputRESERVED75 = 75|0x300U , kXBARB3_InputDec1PosMatch = 76|0x300U , kXBARB3_InputDec2PosMatch = 77|0x300U ,   kXBARB3_InputDec3PosMatch = 78|0x300U , kXBARB3_InputDec4PosMatch = 79|0x300U , kXBARB3_InputRESERVED80 = 80|0x300U , kXBARB3_InputRESERVED81 = 81|0x300U ,   kXBARB3_InputDmaDone0 = 82|0x300U , kXBARB3_InputDmaDone1 = 83|0x300U , kXBARB3_InputDmaDone2 = 84|0x300U , kXBARB3_InputDmaDone3 = 85|0x300U ,   kXBARB3_InputDmaDone4 = 86|0x300U , kXBARB3_InputDmaDone5 = 87|0x300U , kXBARB3_InputDmaDone6 = 88|0x300U , kXBARB3_InputDmaDone7 = 89|0x300U ,   kXBARB3_InputDmaLpsrDone0 = 90|0x300U , kXBARB3_InputDmaLpsrDone1 = 91|0x300U , kXBARB3_InputDmaLpsrDone2 = 92|0x300U , kXBARB3_InputDmaLpsrDone3 = 93|0x300U ,   kXBARB3_InputDmaLpsrDone4 = 94|0x300U , kXBARB3_InputDmaLpsrDone5 = 95|0x300U , kXBARB3_InputDmaLpsrDone6 = 96|0x300U , kXBARB3_InputDmaLpsrDone7 = 97|0x300U ,   kXBARA1_InputLogicLow = 0|0x100U , kXBARA1_InputLogicHigh = 1|0x100U , kXBARA1_InputRESERVED2 = 2|0x100U , kXBARA1_InputRESERVED3 = 3|0x100U ,   kXBARA1_InputIomuxXbarInout04 = 4|0x100U , kXBARA1_InputIomuxXbarInout05 = 5|0x100U , kXBARA1_InputIomuxXbarInout06 = 6|0x100U , kXBARA1_InputIomuxXbarInout07 = 7|0x100U ,   kXBARA1_InputIomuxXbarInout08 = 8|0x100U , kXBARA1_InputIomuxXbarInout09 = 9|0x100U , kXBARA1_InputIomuxXbarInout10 = 10|0x100U , kXBARA1_InputIomuxXbarInout11 = 11|0x100U ,   kXBARA1_InputIomuxXbarInout12 = 12|0x100U , kXBARA1_InputIomuxXbarInout13 = 13|0x100U , kXBARA1_InputIomuxXbarInout14 = 14|0x100U , kXBARA1_InputIomuxXbarInout15 = 15|0x100U ,   kXBARA1_InputIomuxXbarInout16 = 16|0x100U , kXBARA1_InputIomuxXbarInout17 = 17|0x100U , kXBARA1_InputIomuxXbarInout18 = 18|0x100U , kXBARA1_InputIomuxXbarInout19 = 19|0x100U ,   kXBARA1_InputIomuxXbarInout20 = 20|0x100U , kXBARA1_InputIomuxXbarInout21 = 21|0x100U , kXBARA1_InputIomuxXbarInout22 = 22|0x100U , kXBARA1_InputIomuxXbarInout23 = 23|0x100U ,   kXBARA1_InputIomuxXbarInout24 = 24|0x100U , kXBARA1_InputIomuxXbarInout25 = 25|0x100U , kXBARA1_InputIomuxXbarInout26 = 26|0x100U , kXBARA1_InputIomuxXbarInout27 = 27|0x100U ,   kXBARA1_InputIomuxXbarInout28 = 28|0x100U , kXBARA1_InputIomuxXbarInout29 = 29|0x100U , kXBARA1_InputIomuxXbarInout30 = 30|0x100U , kXBARA1_InputIomuxXbarInout31 = 31|0x100U ,   kXBARA1_InputIomuxXbarInout32 = 32|0x100U , kXBARA1_InputIomuxXbarInout33 = 33|0x100U , kXBARA1_InputIomuxXbarInout34 = 34|0x100U , kXBARA1_InputIomuxXbarInout35 = 35|0x100U ,   kXBARA1_InputIomuxXbarInout36 = 36|0x100U , kXBARA1_InputIomuxXbarInout37 = 37|0x100U , kXBARA1_InputIomuxXbarInout38 = 38|0x100U , kXBARA1_InputIomuxXbarInout39 = 39|0x100U ,   kXBARA1_InputIomuxXbarInout40 = 40|0x100U , kXBARA1_InputRESERVED41 = 41|0x100U , kXBARA1_InputAcmp1Out = 42|0x100U , kXBARA1_InputAcmp2Out = 43|0x100U ,   kXBARA1_InputAcmp3Out = 44|0x100U , kXBARA1_InputAcmp4Out = 45|0x100U , kXBARA1_InputRESERVED46 = 46|0x100U , kXBARA1_InputRESERVED47 = 47|0x100U ,   kXBARA1_InputRESERVED48 = 48|0x100U , kXBARA1_InputRESERVED49 = 49|0x100U , kXBARA1_InputQtimer1Timer0 = 50|0x100U , kXBARA1_InputQtimer1Timer1 = 51|0x100U ,   kXBARA1_InputQtimer1Timer2 = 52|0x100U , kXBARA1_InputQtimer1Timer3 = 53|0x100U , kXBARA1_InputQtimer2Timer0 = 54|0x100U , kXBARA1_InputQtimer2Timer1 = 55|0x100U ,   kXBARA1_InputQtimer2Timer2 = 56|0x100U , kXBARA1_InputQtimer2Timer3 = 57|0x100U , kXBARA1_InputQtimer3Timer0 = 58|0x100U , kXBARA1_InputQtimer3Timer1 = 59|0x100U ,   kXBARA1_InputQtimer3Timer2 = 60|0x100U , kXBARA1_InputQtimer3Timer3 = 61|0x100U , kXBARA1_InputQtimer4Timer0 = 62|0x100U , kXBARA1_InputQtimer4Timer1 = 63|0x100U ,   kXBARA1_InputQtimer4Timer2 = 64|0x100U , kXBARA1_InputQtimer4Timer3 = 65|0x100U , kXBARA1_InputRESERVED66 = 66|0x100U , kXBARA1_InputRESERVED67 = 67|0x100U ,   kXBARA1_InputRESERVED68 = 68|0x100U , kXBARA1_InputRESERVED69 = 69|0x100U , kXBARA1_InputRESERVED70 = 70|0x100U , kXBARA1_InputRESERVED71 = 71|0x100U ,   kXBARA1_InputRESERVED72 = 72|0x100U , kXBARA1_InputRESERVED73 = 73|0x100U , kXBARA1_InputFlexpwm1Pwm0OutTrig0 = 74|0x100U , kXBARA1_InputFlexpwm1Pwm0OutTrig1 = 75|0x100U ,   kXBARA1_InputFlexpwm1Pwm1OutTrig0 = 76|0x100U , kXBARA1_InputFlexpwm1Pwm1OutTrig1 = 77|0x100U , kXBARA1_InputFlexpwm1Pwm2OutTrig0 = 78|0x100U , kXBARA1_InputFlexpwm1Pwm2OutTrig1 = 79|0x100U ,   kXBARA1_InputFlexpwm1Pwm3OutTrig0 = 80|0x100U , kXBARA1_InputFlexpwm1Pwm3OutTrig1 = 81|0x100U , kXBARA1_InputFlexpwm2Pwm0OutTrig01 = 82|0x100U , kXBARA1_InputFlexpwm2Pwm1OutTrig01 = 83|0x100U ,   kXBARA1_InputFlexpwm2Pwm2OutTrig01 = 84|0x100U , kXBARA1_InputFlexpwm2Pwm3OutTrig01 = 85|0x100U , kXBARA1_InputFlexpwm3Pwm0OutTrig01 = 86|0x100U , kXBARA1_InputFlexpwm3Pwm1OutTrig01 = 87|0x100U ,   kXBARA1_InputFlexpwm3Pwm2OutTrig01 = 88|0x100U , kXBARA1_InputFlexpwm3Pwm3OutTrig01 = 89|0x100U , kXBARA1_InputFlexpwm4Pwm0OutTrig01 = 90|0x100U , kXBARA1_InputFlexpwm4Pwm1OutTrig01 = 91|0x100U ,   kXBARA1_InputFlexpwm4Pwm2OutTrig01 = 92|0x100U , kXBARA1_InputFlexpwm4Pwm3OutTrig01 = 93|0x100U , kXBARA1_InputRESERVED94 = 94|0x100U , kXBARA1_InputRESERVED95 = 95|0x100U ,   kXBARA1_InputRESERVED96 = 96|0x100U , kXBARA1_InputRESERVED97 = 97|0x100U , kXBARA1_InputRESERVED98 = 98|0x100U , kXBARA1_InputRESERVED99 = 99|0x100U ,   kXBARA1_InputRESERVED100 = 100|0x100U , kXBARA1_InputRESERVED101 = 101|0x100U , kXBARA1_InputPit1Trigger0 = 102|0x100U , kXBARA1_InputPit1Trigger1 = 103|0x100U ,   kXBARA1_InputPit1Trigger2 = 104|0x100U , kXBARA1_InputPit1Trigger3 = 105|0x100U , kXBARA1_InputDec1PosMatch = 106|0x100U , kXBARA1_InputDec2PosMatch = 107|0x100U ,   kXBARA1_InputDec3PosMatch = 108|0x100U , kXBARA1_InputDec4PosMatch = 109|0x100U , kXBARA1_InputRESERVED110 = 110|0x100U , kXBARA1_InputRESERVED111 = 111|0x100U ,   kXBARA1_InputDmaDone0 = 112|0x100U , kXBARA1_InputDmaDone1 = 113|0x100U , kXBARA1_InputDmaDone2 = 114|0x100U , kXBARA1_InputDmaDone3 = 115|0x100U ,   kXBARA1_InputDmaDone4 = 116|0x100U , kXBARA1_InputDmaDone5 = 117|0x100U , kXBARA1_InputDmaDone6 = 118|0x100U , kXBARA1_InputDmaDone7 = 119|0x100U ,   kXBARA1_InputDmaLpsrDone0 = 120|0x100U , kXBARA1_InputDmaLpsrDone1 = 121|0x100U , kXBARA1_InputDmaLpsrDone2 = 122|0x100U , kXBARA1_InputDmaLpsrDone3 = 123|0x100U ,   kXBARA1_InputDmaLpsrDone4 = 124|0x100U , kXBARA1_InputDmaLpsrDone5 = 125|0x100U , kXBARA1_InputDmaLpsrDone6 = 126|0x100U , kXBARA1_InputDmaLpsrDone7 = 127|0x100U ,   kXBARA1_InputAoi1Out0 = 128|0x100U , kXBARA1_InputAoi1Out1 = 129|0x100U , kXBARA1_InputAoi1Out2 = 130|0x100U , kXBARA1_InputAoi1Out3 = 131|0x100U ,   kXBARA1_InputAoi2Out0 = 132|0x100U , kXBARA1_InputAoi2Out1 = 133|0x100U , kXBARA1_InputAoi2Out2 = 134|0x100U , kXBARA1_InputAoi2Out3 = 135|0x100U ,   kXBARA1_InputAdcEtc0Coco0 = 136|0x100U , kXBARA1_InputAdcEtc0Coco1 = 137|0x100U , kXBARA1_InputAdcEtc0Coco2 = 138|0x100U , kXBARA1_InputAdcEtc0Coco3 = 139|0x100U ,   kXBARA1_InputAdcEtc1Coco0 = 140|0x100U , kXBARA1_InputAdcEtc1Coco1 = 141|0x100U , kXBARA1_InputAdcEtc1Coco2 = 142|0x100U , kXBARA1_InputAdcEtc1Coco3 = 143|0x100U ,   kXBARB2_InputLogicLow = 0|0x200U , kXBARB2_InputLogicHigh = 1|0x200U , kXBARB2_InputAcmp1Out = 2|0x200U , kXBARB2_InputAcmp2Out = 3|0x200U ,   kXBARB2_InputAcmp3Out = 4|0x200U , kXBARB2_InputAcmp4Out = 5|0x200U , kXBARB2_InputRESERVED6 = 6|0x200U , kXBARB2_InputRESERVED7 = 7|0x200U ,   kXBARB2_InputRESERVED8 = 8|0x200U , kXBARB2_InputRESERVED9 = 9|0x200U , kXBARB2_InputQtimer1Timer0 = 10|0x200U , kXBARB2_InputQtimer1Timer1 = 11|0x200U ,   kXBARB2_InputQtimer1Timer2 = 12|0x200U , kXBARB2_InputQtimer1Timer3 = 13|0x200U , kXBARB2_InputQtimer2Timer0 = 14|0x200U , kXBARB2_InputQtimer2Timer1 = 15|0x200U ,   kXBARB2_InputQtimer2Timer2 = 16|0x200U , kXBARB2_InputQtimer2Timer3 = 17|0x200U , kXBARB2_InputQtimer3Timer0 = 18|0x200U , kXBARB2_InputQtimer3Timer1 = 19|0x200U ,   kXBARB2_InputQtimer3Timer2 = 20|0x200U , kXBARB2_InputQtimer3Timer3 = 21|0x200U , kXBARB2_InputQtimer4Timer0 = 22|0x200U , kXBARB2_InputQtimer4Timer1 = 23|0x200U ,   kXBARB2_InputQtimer4Timer2 = 24|0x200U , kXBARB2_InputQtimer4Timer3 = 25|0x200U , kXBARB2_InputRESERVED26 = 26|0x200U , kXBARB2_InputRESERVED27 = 27|0x200U ,   kXBARB2_InputRESERVED28 = 28|0x200U , kXBARB2_InputRESERVED29 = 29|0x200U , kXBARB2_InputRESERVED30 = 30|0x200U , kXBARB2_InputRESERVED31 = 31|0x200U ,   kXBARB2_InputRESERVED32 = 32|0x200U , kXBARB2_InputRESERVED33 = 33|0x200U , kXBARB2_InputFlexpwm1Pwm0OutTrig01 = 34|0x200U , kXBARB2_InputFlexpwm1Pwm1OutTrig01 = 35|0x200U ,   kXBARB2_InputFlexpwm1Pwm2OutTrig01 = 36|0x200U , kXBARB2_InputFlexpwm1Pwm3OutTrig01 = 37|0x200U , kXBARB2_InputFlexpwm2Pwm0OutTrig01 = 38|0x200U , kXBARB2_InputFlexpwm2Pwm1OutTrig01 = 39|0x200U ,   kXBARB2_InputFlexpwm2Pwm2OutTrig01 = 40|0x200U , kXBARB2_InputFlexpwm2Pwm3OutTrig01 = 41|0x200U , kXBARB2_InputFlexpwm3Pwm0OutTrig01 = 42|0x200U , kXBARB2_InputFlexpwm3Pwm1OutTrig01 = 43|0x200U ,   kXBARB2_InputFlexpwm3Pwm2OutTrig01 = 44|0x200U , kXBARB2_InputFlexpwm3Pwm3OutTrig01 = 45|0x200U , kXBARB2_InputFlexpwm4Pwm0OutTrig01 = 46|0x200U , kXBARB2_InputFlexpwm4Pwm1OutTrig01 = 47|0x200U ,   kXBARB2_InputFlexpwm4Pwm2OutTrig01 = 48|0x200U , kXBARB2_InputFlexpwm4Pwm3OutTrig01 = 49|0x200U , kXBARB2_InputRESERVED50 = 50|0x200U , kXBARB2_InputRESERVED51 = 51|0x200U ,   kXBARB2_InputRESERVED52 = 52|0x200U , kXBARB2_InputRESERVED53 = 53|0x200U , kXBARB2_InputRESERVED54 = 54|0x200U , kXBARB2_InputRESERVED55 = 55|0x200U ,   kXBARB2_InputRESERVED56 = 56|0x200U , kXBARB2_InputRESERVED57 = 57|0x200U , kXBARB2_InputPit1Trigger0 = 58|0x200U , kXBARB2_InputPit1Trigger1 = 59|0x200U ,   kXBARB2_InputAdcEtc0Coco0 = 60|0x200U , kXBARB2_InputAdcEtc0Coco1 = 61|0x200U , kXBARB2_InputAdcEtc0Coco2 = 62|0x200U , kXBARB2_InputAdcEtc0Coco3 = 63|0x200U ,   kXBARB2_InputAdcEtc1Coco0 = 64|0x200U , kXBARB2_InputAdcEtc1Coco1 = 65|0x200U , kXBARB2_InputAdcEtc1Coco2 = 66|0x200U , kXBARB2_InputAdcEtc1Coco3 = 67|0x200U ,   kXBARB2_InputRESERVED68 = 68|0x200U , kXBARB2_InputRESERVED69 = 69|0x200U , kXBARB2_InputRESERVED70 = 70|0x200U , kXBARB2_InputRESERVED71 = 71|0x200U ,   kXBARB2_InputRESERVED72 = 72|0x200U , kXBARB2_InputRESERVED73 = 73|0x200U , kXBARB2_InputRESERVED74 = 74|0x200U , kXBARB2_InputRESERVED75 = 75|0x200U ,   kXBARB2_InputDec1PosMatch = 76|0x200U , kXBARB2_InputDec2PosMatch = 77|0x200U , kXBARB2_InputDec3PosMatch = 78|0x200U , kXBARB2_InputDec4PosMatch = 79|0x200U ,   kXBARB2_InputRESERVED80 = 80|0x200U , kXBARB2_InputRESERVED81 = 81|0x200U , kXBARB2_InputDmaDone0 = 82|0x200U , kXBARB2_InputDmaDone1 = 83|0x200U ,   kXBARB2_InputDmaDone2 = 84|0x200U , kXBARB2_InputDmaDone3 = 85|0x200U , kXBARB2_InputDmaDone4 = 86|0x200U , kXBARB2_InputDmaDone5 = 87|0x200U ,   kXBARB2_InputDmaDone6 = 88|0x200U , kXBARB2_InputDmaDone7 = 89|0x200U , kXBARB2_InputDmaLpsrDone0 = 90|0x200U , kXBARB2_InputDmaLpsrDone1 = 91|0x200U ,   kXBARB2_InputDmaLpsrDone2 = 92|0x200U , kXBARB2_InputDmaLpsrDone3 = 93|0x200U , kXBARB2_InputDmaLpsrDone4 = 94|0x200U , kXBARB2_InputDmaLpsrDone5 = 95|0x200U ,   kXBARB2_InputDmaLpsrDone6 = 96|0x200U , kXBARB2_InputDmaLpsrDone7 = 97|0x200U , kXBARB3_InputLogicLow = 0|0x300U , kXBARB3_InputLogicHigh = 1|0x300U ,   kXBARB3_InputAcmp1Out = 2|0x300U , kXBARB3_InputAcmp2Out = 3|0x300U , kXBARB3_InputAcmp3Out = 4|0x300U , kXBARB3_InputAcmp4Out = 5|0x300U ,   kXBARB3_InputRESERVED6 = 6|0x300U , kXBARB3_InputRESERVED7 = 7|0x300U , kXBARB3_InputRESERVED8 = 8|0x300U , kXBARB3_InputRESERVED9 = 9|0x300U ,   kXBARB3_InputQtimer1Timer0 = 10|0x300U , kXBARB3_InputQtimer1Timer1 = 11|0x300U , kXBARB3_InputQtimer1Timer2 = 12|0x300U , kXBARB3_InputQtimer1Timer3 = 13|0x300U ,   kXBARB3_InputQtimer2Timer0 = 14|0x300U , kXBARB3_InputQtimer2Timer1 = 15|0x300U , kXBARB3_InputQtimer2Timer2 = 16|0x300U , kXBARB3_InputQtimer2Timer3 = 17|0x300U ,   kXBARB3_InputQtimer3Timer0 = 18|0x300U , kXBARB3_InputQtimer3Timer1 = 19|0x300U , kXBARB3_InputQtimer3Timer2 = 20|0x300U , kXBARB3_InputQtimer3Timer3 = 21|0x300U ,   kXBARB3_InputQtimer4Timer0 = 22|0x300U , kXBARB3_InputQtimer4Timer1 = 23|0x300U , kXBARB3_InputQtimer4Timer2 = 24|0x300U , kXBARB3_InputQtimer4Timer3 = 25|0x300U ,   kXBARB3_InputRESERVED26 = 26|0x300U , kXBARB3_InputRESERVED27 = 27|0x300U , kXBARB3_InputRESERVED28 = 28|0x300U , kXBARB3_InputRESERVED29 = 29|0x300U ,   kXBARB3_InputRESERVED30 = 30|0x300U , kXBARB3_InputRESERVED31 = 31|0x300U , kXBARB3_InputRESERVED32 = 32|0x300U , kXBARB3_InputRESERVED33 = 33|0x300U ,   kXBARB3_InputFlexpwm1Pwm0OutTrig01 = 34|0x300U , kXBARB3_InputFlexpwm1Pwm1OutTrig01 = 35|0x300U , kXBARB3_InputFlexpwm1Pwm2OutTrig01 = 36|0x300U , kXBARB3_InputFlexpwm1Pwm3OutTrig01 = 37|0x300U ,   kXBARB3_InputFlexpwm2Pwm0OutTrig01 = 38|0x300U , kXBARB3_InputFlexpwm2Pwm1OutTrig01 = 39|0x300U , kXBARB3_InputFlexpwm2Pwm2OutTrig01 = 40|0x300U , kXBARB3_InputFlexpwm2Pwm3OutTrig01 = 41|0x300U ,   kXBARB3_InputFlexpwm3Pwm0OutTrig01 = 42|0x300U , kXBARB3_InputFlexpwm3Pwm1OutTrig01 = 43|0x300U , kXBARB3_InputFlexpwm3Pwm2OutTrig01 = 44|0x300U , kXBARB3_InputFlexpwm3Pwm3OutTrig01 = 45|0x300U ,   kXBARB3_InputFlexpwm4Pwm0OutTrig01 = 46|0x300U , kXBARB3_InputFlexpwm4Pwm1OutTrig01 = 47|0x300U , kXBARB3_InputFlexpwm4Pwm2OutTrig01 = 48|0x300U , kXBARB3_InputFlexpwm4Pwm3OutTrig01 = 49|0x300U ,   kXBARB3_InputRESERVED50 = 50|0x300U , kXBARB3_InputRESERVED51 = 51|0x300U , kXBARB3_InputRESERVED52 = 52|0x300U , kXBARB3_InputRESERVED53 = 53|0x300U ,   kXBARB3_InputRESERVED54 = 54|0x300U , kXBARB3_InputRESERVED55 = 55|0x300U , kXBARB3_InputRESERVED56 = 56|0x300U , kXBARB3_InputRESERVED57 = 57|0x300U ,   kXBARB3_InputPit1Trigger0 = 58|0x300U , kXBARB3_InputPit1Trigger1 = 59|0x300U , kXBARB3_InputAdcEtc0Coco0 = 60|0x300U , kXBARB3_InputAdcEtc0Coco1 = 61|0x300U ,   kXBARB3_InputAdcEtc0Coco2 = 62|0x300U , kXBARB3_InputAdcEtc0Coco3 = 63|0x300U , kXBARB3_InputAdcEtc1Coco0 = 64|0x300U , kXBARB3_InputAdcEtc1Coco1 = 65|0x300U ,   kXBARB3_InputAdcEtc1Coco2 = 66|0x300U , kXBARB3_InputAdcEtc1Coco3 = 67|0x300U , kXBARB3_InputRESERVED68 = 68|0x300U , kXBARB3_InputRESERVED69 = 69|0x300U ,   kXBARB3_InputRESERVED70 = 70|0x300U , kXBARB3_InputRESERVED71 = 71|0x300U , kXBARB3_InputRESERVED72 = 72|0x300U , kXBARB3_InputRESERVED73 = 73|0x300U ,   kXBARB3_InputRESERVED74 = 74|0x300U , kXBARB3_InputRESERVED75 = 75|0x300U , kXBARB3_InputDec1PosMatch = 76|0x300U , kXBARB3_InputDec2PosMatch = 77|0x300U ,   kXBARB3_InputDec3PosMatch = 78|0x300U , kXBARB3_InputDec4PosMatch = 79|0x300U , kXBARB3_InputRESERVED80 = 80|0x300U , kXBARB3_InputRESERVED81 = 81|0x300U ,   kXBARB3_InputDmaDone0 = 82|0x300U , kXBARB3_InputDmaDone1 = 83|0x300U , kXBARB3_InputDmaDone2 = 84|0x300U , kXBARB3_InputDmaDone3 = 85|0x300U ,   kXBARB3_InputDmaDone4 = 86|0x300U , kXBARB3_InputDmaDone5 = 87|0x300U , kXBARB3_InputDmaDone6 = 88|0x300U , kXBARB3_InputDmaDone7 = 89|0x300U ,   kXBARB3_InputDmaLpsrDone0 = 90|0x300U , kXBARB3_InputDmaLpsrDone1 = 91|0x300U , kXBARB3_InputDmaLpsrDone2 = 92|0x300U , kXBARB3_InputDmaLpsrDone3 = 93|0x300U ,   kXBARB3_InputDmaLpsrDone4 = 94|0x300U , kXBARB3_InputDmaLpsrDone5 = 95|0x300U , kXBARB3_InputDmaLpsrDone6 = 96|0x300U , kXBARB3_InputDmaLpsrDone7 = 97|0x300U }
enum	_xbar_output_signal {   kXBARA1_OutputDmaChMuxReq30 = 0|0x100U , kXBARA1_OutputDmaChMuxReq31 = 1|0x100U , kXBARA1_OutputDmaChMuxReq94 = 2|0x100U , kXBARA1_OutputDmaChMuxReq95 = 3|0x100U ,   kXBARA1_OutputIomuxXbarInout04 = 4|0x100U , kXBARA1_OutputIomuxXbarInout05 = 5|0x100U , kXBARA1_OutputIomuxXbarInout06 = 6|0x100U , kXBARA1_OutputIomuxXbarInout07 = 7|0x100U ,   kXBARA1_OutputIomuxXbarInout08 = 8|0x100U , kXBARA1_OutputIomuxXbarInout09 = 9|0x100U , kXBARA1_OutputIomuxXbarInout10 = 10|0x100U , kXBARA1_OutputIomuxXbarInout11 = 11|0x100U ,   kXBARA1_OutputIomuxXbarInout12 = 12|0x100U , kXBARA1_OutputIomuxXbarInout13 = 13|0x100U , kXBARA1_OutputIomuxXbarInout14 = 14|0x100U , kXBARA1_OutputIomuxXbarInout15 = 15|0x100U ,   kXBARA1_OutputIomuxXbarInout16 = 16|0x100U , kXBARA1_OutputIomuxXbarInout17 = 17|0x100U , kXBARA1_OutputIomuxXbarInout18 = 18|0x100U , kXBARA1_OutputIomuxXbarInout19 = 19|0x100U ,   kXBARA1_OutputAcmp1Sample = 20|0x100U , kXBARA1_OutputAcmp2Sample = 21|0x100U , kXBARA1_OutputAcmp3Sample = 22|0x100U , kXBARA1_OutputAcmp4Sample = 23|0x100U ,   kXBARA1_OutputRESERVED24 = 24|0x100U , kXBARA1_OutputRESERVED25 = 25|0x100U , kXBARA1_OutputFlexpwm1Exta0 = 26|0x100U , kXBARA1_OutputFlexpwm1Exta1 = 27|0x100U ,   kXBARA1_OutputFlexpwm1Exta2 = 28|0x100U , kXBARA1_OutputFlexpwm1Exta3 = 29|0x100U , kXBARA1_OutputFlexpwm1ExtSync0 = 30|0x100U , kXBARA1_OutputFlexpwm1ExtSync1 = 31|0x100U ,   kXBARA1_OutputFlexpwm1ExtSync2 = 32|0x100U , kXBARA1_OutputFlexpwm1ExtSync3 = 33|0x100U , kXBARA1_OutputFlexpwm1ExtClk = 34|0x100U , kXBARA1_OutputFlexpwm1Fault0 = 35|0x100U ,   kXBARA1_OutputFlexpwm1Fault1 = 36|0x100U , kXBARA1_OutputFlexpwm1234Fault2 = 37|0x100U , kXBARA1_OutputFlexpwm1234Fault3 = 38|0x100U , kXBARA1_OutputFlexpwm1ExtForce = 39|0x100U ,   kXBARA1_OutputFlexpwm234Exta0 = 40|0x100U , kXBARA1_OutputFlexpwm234Exta1 = 41|0x100U , kXBARA1_OutputFlexpwm234Exta2 = 42|0x100U , kXBARA1_OutputFlexpwm234Exta3 = 43|0x100U ,   kXBARA1_OutputFlexpwm2ExtSync0 = 44|0x100U , kXBARA1_OutputFlexpwm2ExtSync1 = 45|0x100U , kXBARA1_OutputFlexpwm2ExtSync2 = 46|0x100U , kXBARA1_OutputFlexpwm2ExtSync3 = 47|0x100U ,   kXBARA1_OutputFlexpwm234ExtClk = 48|0x100U , kXBARA1_OutputFlexpwm2Fault0 = 49|0x100U , kXBARA1_OutputFlexpwm2Fault1 = 50|0x100U , kXBARA1_OutputFlexpwm2ExtForce = 51|0x100U ,   kXBARA1_OutputFlexpwm3ExtSync0 = 52|0x100U , kXBARA1_OutputFlexpwm3ExtSync1 = 53|0x100U , kXBARA1_OutputFlexpwm3ExtSync2 = 54|0x100U , kXBARA1_OutputFlexpwm3ExtSync3 = 55|0x100U ,   kXBARA1_OutputFlexpwm3Fault0 = 56|0x100U , kXBARA1_OutputFlexpwm3Fault1 = 57|0x100U , kXBARA1_OutputFlexpwm3ExtForce = 58|0x100U , kXBARA1_OutputFlexpwm4ExtSync0 = 59|0x100U ,   kXBARA1_OutputFlexpwm4ExtSync1 = 60|0x100U , kXBARA1_OutputFlexpwm4ExtSync2 = 61|0x100U , kXBARA1_OutputFlexpwm4ExtSync3 = 62|0x100U , kXBARA1_OutputFlexpwm4Fault0 = 63|0x100U ,   kXBARA1_OutputFlexpwm4Fault1 = 64|0x100U , kXBARA1_OutputFlexpwm4ExtForce = 65|0x100U , kXBARA1_OutputEnc1PhaseAInput = 66|0x100U , kXBARA1_OutputEnc1PhaseBInput = 67|0x100U ,   kXBARA1_OutputEnc1Index = 68|0x100U , kXBARA1_OutputEnc1Home = 69|0x100U , kXBARA1_OutputEnc1Trigger = 70|0x100U , kXBARA1_OutputEnc2PhaseAInput = 71|0x100U ,   kXBARA1_OutputEnc2PhaseBInput = 72|0x100U , kXBARA1_OutputEnc2Index = 73|0x100U , kXBARA1_OutputEnc2Home = 74|0x100U , kXBARA1_OutputEnc2Trigger = 75|0x100U ,   kXBARA1_OutputEnc3PhaseAInput = 76|0x100U , kXBARA1_OutputEnc3PhaseBInput = 77|0x100U , kXBARA1_OutputEnc3Index = 78|0x100U , kXBARA1_OutputEnc3Home = 79|0x100U ,   kXBARA1_OutputEnc3Trigger = 80|0x100U , kXBARA1_OutputEnc4PhaseAInput = 81|0x100U , kXBARA1_OutputEnc4PhaseBInput = 82|0x100U , kXBARA1_OutputEnc4Index = 83|0x100U ,   kXBARA1_OutputEnc4Home = 84|0x100U , kXBARA1_OutputEnc4Trigger = 85|0x100U , kXBARA1_OutputQtimer1Tmr0Input = 86|0x100U , kXBARA1_OutputQtimer1Tmr1Input = 87|0x100U ,   kXBARA1_OutputQtimer1Tmr2Input = 88|0x100U , kXBARA1_OutputQtimer1Tmr3Input = 89|0x100U , kXBARA1_OutputQtimer2Tmr0Input = 90|0x100U , kXBARA1_OutputQtimer2Tmr1Input = 91|0x100U ,   kXBARA1_OutputQtimer2Tmr2Input = 92|0x100U , kXBARA1_OutputQtimer2Tmr3Input = 93|0x100U , kXBARA1_OutputQtimer3Tmr0Input = 94|0x100U , kXBARA1_OutputQtimer3Tmr1Input = 95|0x100U ,   kXBARA1_OutputQtimer3Tmr2Input = 96|0x100U , kXBARA1_OutputQtimer3Tmr3Input = 97|0x100U , kXBARA1_OutputQtimer4Tmr0Input = 98|0x100U , kXBARA1_OutputQtimer4Tmr1Input = 99|0x100U ,   kXBARA1_OutputQtimer4Tmr2Input = 100|0x100U , kXBARA1_OutputQtimer4Tmr3Input = 101|0x100U , kXBARA1_OutputEwmEwmIn = 102|0x100U , kXBARA1_OutputAdcEtcXbar0Trig0 = 103|0x100U ,   kXBARA1_OutputAdcEtcXbar0Trig1 = 104|0x100U , kXBARA1_OutputAdcEtcXbar0Trig2 = 105|0x100U , kXBARA1_OutputAdcEtcXbar0Trig3 = 106|0x100U , kXBARA1_OutputAdcEtcXbar1Trig0 = 107|0x100U ,   kXBARA1_OutputAdcEtcXbar1Trig1 = 108|0x100U , kXBARA1_OutputAdcEtcXbar1Trig2 = 109|0x100U , kXBARA1_OutputAdcEtcXbar1Trig3 = 110|0x100U , kXBARA1_OutputLpi2c1TrgInput = 111|0x100U ,   kXBARA1_OutputLpi2c2TrgInput = 112|0x100U , kXBARA1_OutputLpi2c3TrgInput = 113|0x100U , kXBARA1_OutputLpi2c4TrgInput = 114|0x100U , kXBARA1_OutputLpspi1TrgInput = 115|0x100U ,   kXBARA1_OutputLpspi2TrgInput = 116|0x100U , kXBARA1_OutputLpspi3TrgInput = 117|0x100U , kXBARA1_OutputLpspi4TrgInput = 118|0x100U , kXBARA1_OutputLpuart1TrgInput = 119|0x100U ,   kXBARA1_OutputLpuart2TrgInput = 120|0x100U , kXBARA1_OutputLpuart3TrgInput = 121|0x100U , kXBARA1_OutputLpuart4TrgInput = 122|0x100U , kXBARA1_OutputLpuart5TrgInput = 123|0x100U ,   kXBARA1_OutputLpuart6TrgInput = 124|0x100U , kXBARA1_OutputLpuart7TrgInput = 125|0x100U , kXBARA1_OutputLpuart8TrgInput = 126|0x100U , kXBARA1_OutputFlexio1TriggerIn0 = 127|0x100U ,   kXBARA1_OutputFlexio1TriggerIn1 = 128|0x100U , kXBARA1_OutputFlexio2TriggerIn0 = 129|0x100U , kXBARA1_OutputFlexio2TriggerIn1 = 130|0x100U , kXBARB2_OutputAoi1In00 = 0|0x200U ,   kXBARB2_OutputAoi1In01 = 1|0x200U , kXBARB2_OutputAoi1In02 = 2|0x200U , kXBARB2_OutputAoi1In03 = 3|0x200U , kXBARB2_OutputAoi1In04 = 4|0x200U ,   kXBARB2_OutputAoi1In05 = 5|0x200U , kXBARB2_OutputAoi1In06 = 6|0x200U , kXBARB2_OutputAoi1In07 = 7|0x200U , kXBARB2_OutputAoi1In08 = 8|0x200U ,   kXBARB2_OutputAoi1In09 = 9|0x200U , kXBARB2_OutputAoi1In10 = 10|0x200U , kXBARB2_OutputAoi1In11 = 11|0x200U , kXBARB2_OutputAoi1In12 = 12|0x200U ,   kXBARB2_OutputAoi1In13 = 13|0x200U , kXBARB2_OutputAoi1In14 = 14|0x200U , kXBARB2_OutputAoi1In15 = 15|0x200U , kXBARB3_OutputAoi2In00 = 0|0x300U ,   kXBARB3_OutputAoi2In01 = 1|0x300U , kXBARB3_OutputAoi2In02 = 2|0x300U , kXBARB3_OutputAoi2In03 = 3|0x300U , kXBARB3_OutputAoi2In04 = 4|0x300U ,   kXBARB3_OutputAoi2In05 = 5|0x300U , kXBARB3_OutputAoi2In06 = 6|0x300U , kXBARB3_OutputAoi2In07 = 7|0x300U , kXBARB3_OutputAoi2In08 = 8|0x300U ,   kXBARB3_OutputAoi2In09 = 9|0x300U , kXBARB3_OutputAoi2In10 = 10|0x300U , kXBARB3_OutputAoi2In11 = 11|0x300U , kXBARB3_OutputAoi2In12 = 12|0x300U ,   kXBARB3_OutputAoi2In13 = 13|0x300U , kXBARB3_OutputAoi2In14 = 14|0x300U , kXBARB3_OutputAoi2In15 = 15|0x300U , kXBARA1_OutputDmaChMuxReq81 = 0|0x100U ,   kXBARA1_OutputDmaChMuxReq82 = 1|0x100U , kXBARA1_OutputDmaChMuxReq83 = 2|0x100U , kXBARA1_OutputDmaChMuxReq84 = 3|0x100U , kXBARA1_OutputIomuxXbarInout04 = 4|0x100U ,   kXBARA1_OutputIomuxXbarInout05 = 5|0x100U , kXBARA1_OutputIomuxXbarInout06 = 6|0x100U , kXBARA1_OutputIomuxXbarInout07 = 7|0x100U , kXBARA1_OutputIomuxXbarInout08 = 8|0x100U ,   kXBARA1_OutputIomuxXbarInout09 = 9|0x100U , kXBARA1_OutputIomuxXbarInout10 = 10|0x100U , kXBARA1_OutputIomuxXbarInout11 = 11|0x100U , kXBARA1_OutputIomuxXbarInout12 = 12|0x100U ,   kXBARA1_OutputIomuxXbarInout13 = 13|0x100U , kXBARA1_OutputIomuxXbarInout14 = 14|0x100U , kXBARA1_OutputIomuxXbarInout15 = 15|0x100U , kXBARA1_OutputIomuxXbarInout16 = 16|0x100U ,   kXBARA1_OutputIomuxXbarInout17 = 17|0x100U , kXBARA1_OutputIomuxXbarInout18 = 18|0x100U , kXBARA1_OutputIomuxXbarInout19 = 19|0x100U , kXBARA1_OutputIomuxXbarInout20 = 20|0x100U ,   kXBARA1_OutputIomuxXbarInout21 = 21|0x100U , kXBARA1_OutputIomuxXbarInout22 = 22|0x100U , kXBARA1_OutputIomuxXbarInout23 = 23|0x100U , kXBARA1_OutputIomuxXbarInout24 = 24|0x100U ,   kXBARA1_OutputIomuxXbarInout25 = 25|0x100U , kXBARA1_OutputIomuxXbarInout26 = 26|0x100U , kXBARA1_OutputIomuxXbarInout27 = 27|0x100U , kXBARA1_OutputIomuxXbarInout28 = 28|0x100U ,   kXBARA1_OutputIomuxXbarInout29 = 29|0x100U , kXBARA1_OutputIomuxXbarInout30 = 30|0x100U , kXBARA1_OutputIomuxXbarInout31 = 31|0x100U , kXBARA1_OutputIomuxXbarInout32 = 32|0x100U ,   kXBARA1_OutputIomuxXbarInout33 = 33|0x100U , kXBARA1_OutputIomuxXbarInout34 = 34|0x100U , kXBARA1_OutputIomuxXbarInout35 = 35|0x100U , kXBARA1_OutputIomuxXbarInout36 = 36|0x100U ,   kXBARA1_OutputIomuxXbarInout37 = 37|0x100U , kXBARA1_OutputIomuxXbarInout38 = 38|0x100U , kXBARA1_OutputIomuxXbarInout39 = 39|0x100U , kXBARA1_OutputIomuxXbarInout40 = 40|0x100U ,   kXBARA1_OutputAcmp1Sample = 41|0x100U , kXBARA1_OutputAcmp2Sample = 42|0x100U , kXBARA1_OutputAcmp3Sample = 43|0x100U , kXBARA1_OutputAcmp4Sample = 44|0x100U ,   kXBARA1_OutputRESERVED45 = 45|0x100U , kXBARA1_OutputRESERVED46 = 46|0x100U , kXBARA1_OutputRESERVED47 = 47|0x100U , kXBARA1_OutputRESERVED48 = 48|0x100U ,   kXBARA1_OutputFlexpwm1Pwm0Exta = 49|0x100U , kXBARA1_OutputFlexpwm1Pwm1Exta = 50|0x100U , kXBARA1_OutputFlexpwm1Pwm2Exta = 51|0x100U , kXBARA1_OutputFlexpwm1Pwm3Exta = 52|0x100U ,   kXBARA1_OutputFlexpwm1Pwm0ExtSync = 53|0x100U , kXBARA1_OutputFlexpwm1Pwm1ExtSync = 54|0x100U , kXBARA1_OutputFlexpwm1Pwm2ExtSync = 55|0x100U , kXBARA1_OutputFlexpwm1Pwm3ExtSync = 56|0x100U ,   kXBARA1_OutputFlexpwm1ExtClk = 57|0x100U , kXBARA1_OutputFlexpwm1Fault0 = 58|0x100U , kXBARA1_OutputFlexpwm1Fault1 = 59|0x100U , kXBARA1_OutputFlexpwm1234Fault2 = 60|0x100U ,   kXBARA1_OutputFlexpwm1234Fault3 = 61|0x100U , kXBARA1_OutputFlexpwm1ExtForce = 62|0x100U , kXBARA1_OutputFlexpwm2Pwm0Exta = 63|0x100U , kXBARA1_OutputFlexpwm2Pwm1Exta = 64|0x100U ,   kXBARA1_OutputFlexpwm2Pwm2Exta = 65|0x100U , kXBARA1_OutputFlexpwm2Pwm3Exta = 66|0x100U , kXBARA1_OutputFlexpwm2Pwm0ExtSync = 67|0x100U , kXBARA1_OutputFlexpwm2Pwm1ExtSync = 68|0x100U ,   kXBARA1_OutputFlexpwm2Pwm2ExtSync = 69|0x100U , kXBARA1_OutputFlexpwm2Pwm3ExtSync = 70|0x100U , kXBARA1_OutputFlexpwm2ExtClk = 71|0x100U , kXBARA1_OutputFlexpwm2Fault0 = 72|0x100U ,   kXBARA1_OutputFlexpwm2Fault1 = 73|0x100U , kXBARA1_OutputFlexpwm2ExtForce = 74|0x100U , kXBARA1_OutputFlexpwm34Pwm0Exta = 75|0x100U , kXBARA1_OutputFlexpwm34Pwm1Exta = 76|0x100U ,   kXBARA1_OutputFlexpwm34Pwm2Exta = 77|0x100U , kXBARA1_OutputFlexpwm34Pwm3Exta = 78|0x100U , kXBARA1_OutputFlexpwm34ExtClk = 79|0x100U , kXBARA1_OutputFlexpwm3Pwm0ExtSync = 80|0x100U ,   kXBARA1_OutputFlexpwm3Pwm1ExtSync = 81|0x100U , kXBARA1_OutputFlexpwm3Pwm2ExtSync = 82|0x100U , kXBARA1_OutputFlexpwm3Pwm3ExtSync = 83|0x100U , kXBARA1_OutputFlexpwm3Fault0 = 84|0x100U ,   kXBARA1_OutputFlexpwm3Fault1 = 85|0x100U , kXBARA1_OutputFlexpwm3ExtForce = 86|0x100U , kXBARA1_OutputFlexpwm4Pwm0ExtSync = 87|0x100U , kXBARA1_OutputFlexpwm4Pwm1ExtSync = 88|0x100U ,   kXBARA1_OutputFlexpwm4Pwm2ExtSync = 89|0x100U , kXBARA1_OutputFlexpwm4Pwm3ExtSync = 90|0x100U , kXBARA1_OutputFlexpwm4Fault0 = 91|0x100U , kXBARA1_OutputFlexpwm4Fault1 = 92|0x100U ,   kXBARA1_OutputFlexpwm4ExtForce = 93|0x100U , kXBARA1_OutputRESERVED94 = 94|0x100U , kXBARA1_OutputRESERVED95 = 95|0x100U , kXBARA1_OutputRESERVED96 = 96|0x100U ,   kXBARA1_OutputRESERVED97 = 97|0x100U , kXBARA1_OutputRESERVED98 = 98|0x100U , kXBARA1_OutputRESERVED99 = 99|0x100U , kXBARA1_OutputRESERVED100 = 100|0x100U ,   kXBARA1_OutputRESERVED101 = 101|0x100U , kXBARA1_OutputRESERVED102 = 102|0x100U , kXBARA1_OutputRESERVED103 = 103|0x100U , kXBARA1_OutputRESERVED104 = 104|0x100U ,   kXBARA1_OutputRESERVED105 = 105|0x100U , kXBARA1_OutputRESERVED106 = 106|0x100U , kXBARA1_OutputRESERVED107 = 107|0x100U , kXBARA1_OutputDec1Phasea = 108|0x100U ,   kXBARA1_OutputDec1Phaseb = 109|0x100U , kXBARA1_OutputDec1Index = 110|0x100U , kXBARA1_OutputDec1Home = 111|0x100U , kXBARA1_OutputDec1Trigger = 112|0x100U ,   kXBARA1_OutputDec2Phasea = 113|0x100U , kXBARA1_OutputDec2Phaseb = 114|0x100U , kXBARA1_OutputDec2Index = 115|0x100U , kXBARA1_OutputDec2Home = 116|0x100U ,   kXBARA1_OutputDec2Trigger = 117|0x100U , kXBARA1_OutputDec3Phasea = 118|0x100U , kXBARA1_OutputDec3Phaseb = 119|0x100U , kXBARA1_OutputDec3Index = 120|0x100U ,   kXBARA1_OutputDec3Home = 121|0x100U , kXBARA1_OutputDec3Trigger = 122|0x100U , kXBARA1_OutputDec4Phasea = 123|0x100U , kXBARA1_OutputDec4Phaseb = 124|0x100U ,   kXBARA1_OutputDec4Index = 125|0x100U , kXBARA1_OutputDec4Home = 126|0x100U , kXBARA1_OutputDec4Trigger = 127|0x100U , kXBARA1_OutputRESERVED128 = 128|0x100U ,   kXBARA1_OutputRESERVED129 = 129|0x100U , kXBARA1_OutputRESERVED130 = 130|0x100U , kXBARA1_OutputRESERVED131 = 131|0x100U , kXBARA1_OutputCan1 = 132|0x100U ,   kXBARA1_OutputCan2 = 133|0x100U , kXBARA1_OutputRESERVED134 = 134|0x100U , kXBARA1_OutputRESERVED135 = 135|0x100U , kXBARA1_OutputRESERVED136 = 136|0x100U ,   kXBARA1_OutputRESERVED137 = 137|0x100U , kXBARA1_OutputQtimer1Timer0 = 138|0x100U , kXBARA1_OutputQtimer1Timer1 = 139|0x100U , kXBARA1_OutputQtimer1Timer2 = 140|0x100U ,   kXBARA1_OutputQtimer1Timer3 = 141|0x100U , kXBARA1_OutputQtimer2Timer0 = 142|0x100U , kXBARA1_OutputQtimer2Timer1 = 143|0x100U , kXBARA1_OutputQtimer2Timer2 = 144|0x100U ,   kXBARA1_OutputQtimer2Timer3 = 145|0x100U , kXBARA1_OutputQtimer3Timer0 = 146|0x100U , kXBARA1_OutputQtimer3Timer1 = 147|0x100U , kXBARA1_OutputQtimer3Timer2 = 148|0x100U ,   kXBARA1_OutputQtimer3Timer3 = 149|0x100U , kXBARA1_OutputQtimer4Timer0 = 150|0x100U , kXBARA1_OutputQtimer4Timer1 = 151|0x100U , kXBARA1_OutputQtimer4Timer2 = 152|0x100U ,   kXBARA1_OutputQtimer4Timer3 = 153|0x100U , kXBARA1_OutputEwmEwmIn = 154|0x100U , kXBARA1_OutputAdcEtc0Coco0 = 155|0x100U , kXBARA1_OutputAdcEtc0Coco1 = 156|0x100U ,   kXBARA1_OutputAdcEtc0Coco2 = 157|0x100U , kXBARA1_OutputAdcEtc0Coco3 = 158|0x100U , kXBARA1_OutputAdcEtc1Coco0 = 159|0x100U , kXBARA1_OutputAdcEtc1Coco1 = 160|0x100U ,   kXBARA1_OutputAdcEtc1Coco2 = 161|0x100U , kXBARA1_OutputAdcEtc1Coco3 = 162|0x100U , kXBARA1_OutputRESERVED163 = 163|0x100U , kXBARA1_OutputRESERVED164 = 164|0x100U ,   kXBARA1_OutputRESERVED165 = 165|0x100U , kXBARA1_OutputRESERVED166 = 166|0x100U , kXBARA1_OutputRESERVED167 = 167|0x100U , kXBARA1_OutputRESERVED168 = 168|0x100U ,   kXBARA1_OutputRESERVED169 = 169|0x100U , kXBARA1_OutputRESERVED170 = 170|0x100U , kXBARA1_OutputFlexio1TrigIn0 = 171|0x100U , kXBARA1_OutputFlexio1TrigIn1 = 172|0x100U ,   kXBARA1_OutputFlexio2TrigIn0 = 173|0x100U , kXBARA1_OutputFlexio2TrigIn1 = 174|0x100U , kXBARB2_OutputAoi1In00 = 0|0x200U , kXBARB2_OutputAoi1In01 = 1|0x200U ,   kXBARB2_OutputAoi1In02 = 2|0x200U , kXBARB2_OutputAoi1In03 = 3|0x200U , kXBARB2_OutputAoi1In04 = 4|0x200U , kXBARB2_OutputAoi1In05 = 5|0x200U ,   kXBARB2_OutputAoi1In06 = 6|0x200U , kXBARB2_OutputAoi1In07 = 7|0x200U , kXBARB2_OutputAoi1In08 = 8|0x200U , kXBARB2_OutputAoi1In09 = 9|0x200U ,   kXBARB2_OutputAoi1In10 = 10|0x200U , kXBARB2_OutputAoi1In11 = 11|0x200U , kXBARB2_OutputAoi1In12 = 12|0x200U , kXBARB2_OutputAoi1In13 = 13|0x200U ,   kXBARB2_OutputAoi1In14 = 14|0x200U , kXBARB2_OutputAoi1In15 = 15|0x200U , kXBARB3_OutputAoi2In00 = 0|0x300U , kXBARB3_OutputAoi2In01 = 1|0x300U ,   kXBARB3_OutputAoi2In02 = 2|0x300U , kXBARB3_OutputAoi2In03 = 3|0x300U , kXBARB3_OutputAoi2In04 = 4|0x300U , kXBARB3_OutputAoi2In05 = 5|0x300U ,   kXBARB3_OutputAoi2In06 = 6|0x300U , kXBARB3_OutputAoi2In07 = 7|0x300U , kXBARB3_OutputAoi2In08 = 8|0x300U , kXBARB3_OutputAoi2In09 = 9|0x300U ,   kXBARB3_OutputAoi2In10 = 10|0x300U , kXBARB3_OutputAoi2In11 = 11|0x300U , kXBARB3_OutputAoi2In12 = 12|0x300U , kXBARB3_OutputAoi2In13 = 13|0x300U ,   kXBARB3_OutputAoi2In14 = 14|0x300U , kXBARB3_OutputAoi2In15 = 15|0x300U , kXBARA1_OutputDmaChMuxReq81 = 0|0x100U , kXBARA1_OutputDmaChMuxReq82 = 1|0x100U ,   kXBARA1_OutputDmaChMuxReq83 = 2|0x100U , kXBARA1_OutputDmaChMuxReq84 = 3|0x100U , kXBARA1_OutputIomuxXbarInout04 = 4|0x100U , kXBARA1_OutputIomuxXbarInout05 = 5|0x100U ,   kXBARA1_OutputIomuxXbarInout06 = 6|0x100U , kXBARA1_OutputIomuxXbarInout07 = 7|0x100U , kXBARA1_OutputIomuxXbarInout08 = 8|0x100U , kXBARA1_OutputIomuxXbarInout09 = 9|0x100U ,   kXBARA1_OutputIomuxXbarInout10 = 10|0x100U , kXBARA1_OutputIomuxXbarInout11 = 11|0x100U , kXBARA1_OutputIomuxXbarInout12 = 12|0x100U , kXBARA1_OutputIomuxXbarInout13 = 13|0x100U ,   kXBARA1_OutputIomuxXbarInout14 = 14|0x100U , kXBARA1_OutputIomuxXbarInout15 = 15|0x100U , kXBARA1_OutputIomuxXbarInout16 = 16|0x100U , kXBARA1_OutputIomuxXbarInout17 = 17|0x100U ,   kXBARA1_OutputIomuxXbarInout18 = 18|0x100U , kXBARA1_OutputIomuxXbarInout19 = 19|0x100U , kXBARA1_OutputIomuxXbarInout20 = 20|0x100U , kXBARA1_OutputIomuxXbarInout21 = 21|0x100U ,   kXBARA1_OutputIomuxXbarInout22 = 22|0x100U , kXBARA1_OutputIomuxXbarInout23 = 23|0x100U , kXBARA1_OutputIomuxXbarInout24 = 24|0x100U , kXBARA1_OutputIomuxXbarInout25 = 25|0x100U ,   kXBARA1_OutputIomuxXbarInout26 = 26|0x100U , kXBARA1_OutputIomuxXbarInout27 = 27|0x100U , kXBARA1_OutputIomuxXbarInout28 = 28|0x100U , kXBARA1_OutputIomuxXbarInout29 = 29|0x100U ,   kXBARA1_OutputIomuxXbarInout30 = 30|0x100U , kXBARA1_OutputIomuxXbarInout31 = 31|0x100U , kXBARA1_OutputIomuxXbarInout32 = 32|0x100U , kXBARA1_OutputIomuxXbarInout33 = 33|0x100U ,   kXBARA1_OutputIomuxXbarInout34 = 34|0x100U , kXBARA1_OutputIomuxXbarInout35 = 35|0x100U , kXBARA1_OutputIomuxXbarInout36 = 36|0x100U , kXBARA1_OutputIomuxXbarInout37 = 37|0x100U ,   kXBARA1_OutputIomuxXbarInout38 = 38|0x100U , kXBARA1_OutputIomuxXbarInout39 = 39|0x100U , kXBARA1_OutputIomuxXbarInout40 = 40|0x100U , kXBARA1_OutputAcmp1Sample = 41|0x100U ,   kXBARA1_OutputAcmp2Sample = 42|0x100U , kXBARA1_OutputAcmp3Sample = 43|0x100U , kXBARA1_OutputAcmp4Sample = 44|0x100U , kXBARA1_OutputRESERVED45 = 45|0x100U ,   kXBARA1_OutputRESERVED46 = 46|0x100U , kXBARA1_OutputRESERVED47 = 47|0x100U , kXBARA1_OutputRESERVED48 = 48|0x100U , kXBARA1_OutputFlexpwm1Pwm0Exta = 49|0x100U ,   kXBARA1_OutputFlexpwm1Pwm1Exta = 50|0x100U , kXBARA1_OutputFlexpwm1Pwm2Exta = 51|0x100U , kXBARA1_OutputFlexpwm1Pwm3Exta = 52|0x100U , kXBARA1_OutputFlexpwm1Pwm0ExtSync = 53|0x100U ,   kXBARA1_OutputFlexpwm1Pwm1ExtSync = 54|0x100U , kXBARA1_OutputFlexpwm1Pwm2ExtSync = 55|0x100U , kXBARA1_OutputFlexpwm1Pwm3ExtSync = 56|0x100U , kXBARA1_OutputFlexpwm1ExtClk = 57|0x100U ,   kXBARA1_OutputFlexpwm1Fault0 = 58|0x100U , kXBARA1_OutputFlexpwm1Fault1 = 59|0x100U , kXBARA1_OutputFlexpwm1234Fault2 = 60|0x100U , kXBARA1_OutputFlexpwm1234Fault3 = 61|0x100U ,   kXBARA1_OutputFlexpwm1ExtForce = 62|0x100U , kXBARA1_OutputFlexpwm2Pwm0Exta = 63|0x100U , kXBARA1_OutputFlexpwm2Pwm1Exta = 64|0x100U , kXBARA1_OutputFlexpwm2Pwm2Exta = 65|0x100U ,   kXBARA1_OutputFlexpwm2Pwm3Exta = 66|0x100U , kXBARA1_OutputFlexpwm2Pwm0ExtSync = 67|0x100U , kXBARA1_OutputFlexpwm2Pwm1ExtSync = 68|0x100U , kXBARA1_OutputFlexpwm2Pwm2ExtSync = 69|0x100U ,   kXBARA1_OutputFlexpwm2Pwm3ExtSync = 70|0x100U , kXBARA1_OutputFlexpwm2ExtClk = 71|0x100U , kXBARA1_OutputFlexpwm2Fault0 = 72|0x100U , kXBARA1_OutputFlexpwm2Fault1 = 73|0x100U ,   kXBARA1_OutputFlexpwm2ExtForce = 74|0x100U , kXBARA1_OutputFlexpwm34Pwm0Exta = 75|0x100U , kXBARA1_OutputFlexpwm34Pwm1Exta = 76|0x100U , kXBARA1_OutputFlexpwm34Pwm2Exta = 77|0x100U ,   kXBARA1_OutputFlexpwm34Pwm3Exta = 78|0x100U , kXBARA1_OutputFlexpwm34ExtClk = 79|0x100U , kXBARA1_OutputFlexpwm3Pwm0ExtSync = 80|0x100U , kXBARA1_OutputFlexpwm3Pwm1ExtSync = 81|0x100U ,   kXBARA1_OutputFlexpwm3Pwm2ExtSync = 82|0x100U , kXBARA1_OutputFlexpwm3Pwm3ExtSync = 83|0x100U , kXBARA1_OutputFlexpwm3Fault0 = 84|0x100U , kXBARA1_OutputFlexpwm3Fault1 = 85|0x100U ,   kXBARA1_OutputFlexpwm3ExtForce = 86|0x100U , kXBARA1_OutputFlexpwm4Pwm0ExtSync = 87|0x100U , kXBARA1_OutputFlexpwm4Pwm1ExtSync = 88|0x100U , kXBARA1_OutputFlexpwm4Pwm2ExtSync = 89|0x100U ,   kXBARA1_OutputFlexpwm4Pwm3ExtSync = 90|0x100U , kXBARA1_OutputFlexpwm4Fault0 = 91|0x100U , kXBARA1_OutputFlexpwm4Fault1 = 92|0x100U , kXBARA1_OutputFlexpwm4ExtForce = 93|0x100U ,   kXBARA1_OutputRESERVED94 = 94|0x100U , kXBARA1_OutputRESERVED95 = 95|0x100U , kXBARA1_OutputRESERVED96 = 96|0x100U , kXBARA1_OutputRESERVED97 = 97|0x100U ,   kXBARA1_OutputRESERVED98 = 98|0x100U , kXBARA1_OutputRESERVED99 = 99|0x100U , kXBARA1_OutputRESERVED100 = 100|0x100U , kXBARA1_OutputRESERVED101 = 101|0x100U ,   kXBARA1_OutputRESERVED102 = 102|0x100U , kXBARA1_OutputRESERVED103 = 103|0x100U , kXBARA1_OutputRESERVED104 = 104|0x100U , kXBARA1_OutputRESERVED105 = 105|0x100U ,   kXBARA1_OutputRESERVED106 = 106|0x100U , kXBARA1_OutputRESERVED107 = 107|0x100U , kXBARA1_OutputDec1Phasea = 108|0x100U , kXBARA1_OutputDec1Phaseb = 109|0x100U ,   kXBARA1_OutputDec1Index = 110|0x100U , kXBARA1_OutputDec1Home = 111|0x100U , kXBARA1_OutputDec1Trigger = 112|0x100U , kXBARA1_OutputDec2Phasea = 113|0x100U ,   kXBARA1_OutputDec2Phaseb = 114|0x100U , kXBARA1_OutputDec2Index = 115|0x100U , kXBARA1_OutputDec2Home = 116|0x100U , kXBARA1_OutputDec2Trigger = 117|0x100U ,   kXBARA1_OutputDec3Phasea = 118|0x100U , kXBARA1_OutputDec3Phaseb = 119|0x100U , kXBARA1_OutputDec3Index = 120|0x100U , kXBARA1_OutputDec3Home = 121|0x100U ,   kXBARA1_OutputDec3Trigger = 122|0x100U , kXBARA1_OutputDec4Phasea = 123|0x100U , kXBARA1_OutputDec4Phaseb = 124|0x100U , kXBARA1_OutputDec4Index = 125|0x100U ,   kXBARA1_OutputDec4Home = 126|0x100U , kXBARA1_OutputDec4Trigger = 127|0x100U , kXBARA1_OutputRESERVED128 = 128|0x100U , kXBARA1_OutputRESERVED129 = 129|0x100U ,   kXBARA1_OutputRESERVED130 = 130|0x100U , kXBARA1_OutputRESERVED131 = 131|0x100U , kXBARA1_OutputCan1 = 132|0x100U , kXBARA1_OutputCan2 = 133|0x100U ,   kXBARA1_OutputRESERVED134 = 134|0x100U , kXBARA1_OutputRESERVED135 = 135|0x100U , kXBARA1_OutputRESERVED136 = 136|0x100U , kXBARA1_OutputRESERVED137 = 137|0x100U ,   kXBARA1_OutputQtimer1Timer0 = 138|0x100U , kXBARA1_OutputQtimer1Timer1 = 139|0x100U , kXBARA1_OutputQtimer1Timer2 = 140|0x100U , kXBARA1_OutputQtimer1Timer3 = 141|0x100U ,   kXBARA1_OutputQtimer2Timer0 = 142|0x100U , kXBARA1_OutputQtimer2Timer1 = 143|0x100U , kXBARA1_OutputQtimer2Timer2 = 144|0x100U , kXBARA1_OutputQtimer2Timer3 = 145|0x100U ,   kXBARA1_OutputQtimer3Timer0 = 146|0x100U , kXBARA1_OutputQtimer3Timer1 = 147|0x100U , kXBARA1_OutputQtimer3Timer2 = 148|0x100U , kXBARA1_OutputQtimer3Timer3 = 149|0x100U ,   kXBARA1_OutputQtimer4Timer0 = 150|0x100U , kXBARA1_OutputQtimer4Timer1 = 151|0x100U , kXBARA1_OutputQtimer4Timer2 = 152|0x100U , kXBARA1_OutputQtimer4Timer3 = 153|0x100U ,   kXBARA1_OutputEwmEwmIn = 154|0x100U , kXBARA1_OutputAdcEtc0Coco0 = 155|0x100U , kXBARA1_OutputAdcEtc0Coco1 = 156|0x100U , kXBARA1_OutputAdcEtc0Coco2 = 157|0x100U ,   kXBARA1_OutputAdcEtc0Coco3 = 158|0x100U , kXBARA1_OutputAdcEtc1Coco0 = 159|0x100U , kXBARA1_OutputAdcEtc1Coco1 = 160|0x100U , kXBARA1_OutputAdcEtc1Coco2 = 161|0x100U ,   kXBARA1_OutputAdcEtc1Coco3 = 162|0x100U , kXBARA1_OutputRESERVED163 = 163|0x100U , kXBARA1_OutputRESERVED164 = 164|0x100U , kXBARA1_OutputRESERVED165 = 165|0x100U ,   kXBARA1_OutputRESERVED166 = 166|0x100U , kXBARA1_OutputRESERVED167 = 167|0x100U , kXBARA1_OutputRESERVED168 = 168|0x100U , kXBARA1_OutputRESERVED169 = 169|0x100U ,   kXBARA1_OutputRESERVED170 = 170|0x100U , kXBARA1_OutputFlexio1TrigIn0 = 171|0x100U , kXBARA1_OutputFlexio1TrigIn1 = 172|0x100U , kXBARA1_OutputFlexio2TrigIn0 = 173|0x100U ,   kXBARA1_OutputFlexio2TrigIn1 = 174|0x100U , kXBARB2_OutputAoi1In00 = 0|0x200U , kXBARB2_OutputAoi1In01 = 1|0x200U , kXBARB2_OutputAoi1In02 = 2|0x200U ,   kXBARB2_OutputAoi1In03 = 3|0x200U , kXBARB2_OutputAoi1In04 = 4|0x200U , kXBARB2_OutputAoi1In05 = 5|0x200U , kXBARB2_OutputAoi1In06 = 6|0x200U ,   kXBARB2_OutputAoi1In07 = 7|0x200U , kXBARB2_OutputAoi1In08 = 8|0x200U , kXBARB2_OutputAoi1In09 = 9|0x200U , kXBARB2_OutputAoi1In10 = 10|0x200U ,   kXBARB2_OutputAoi1In11 = 11|0x200U , kXBARB2_OutputAoi1In12 = 12|0x200U , kXBARB2_OutputAoi1In13 = 13|0x200U , kXBARB2_OutputAoi1In14 = 14|0x200U ,   kXBARB2_OutputAoi1In15 = 15|0x200U , kXBARB3_OutputAoi2In00 = 0|0x300U , kXBARB3_OutputAoi2In01 = 1|0x300U , kXBARB3_OutputAoi2In02 = 2|0x300U ,   kXBARB3_OutputAoi2In03 = 3|0x300U , kXBARB3_OutputAoi2In04 = 4|0x300U , kXBARB3_OutputAoi2In05 = 5|0x300U , kXBARB3_OutputAoi2In06 = 6|0x300U ,   kXBARB3_OutputAoi2In07 = 7|0x300U , kXBARB3_OutputAoi2In08 = 8|0x300U , kXBARB3_OutputAoi2In09 = 9|0x300U , kXBARB3_OutputAoi2In10 = 10|0x300U ,   kXBARB3_OutputAoi2In11 = 11|0x300U , kXBARB3_OutputAoi2In12 = 12|0x300U , kXBARB3_OutputAoi2In13 = 13|0x300U , kXBARB3_OutputAoi2In14 = 14|0x300U ,   kXBARB3_OutputAoi2In15 = 15|0x300U }
enum	_rdc_master {   kRDC_Master_ENET_1G_TX = 1U , kRDC_Master_ENET_1G_RX = 2U , kRDC_Master_ENET = 3U , kRDC_Master_ENET_QOS = 4U ,   kRDC_Master_USDHC1 = 5U , kRDC_Master_USDHC2 = 6U , kRDC_Master_USB = 7U , kRDC_Master_GPU = 8U ,   kRDC_Master_PXP = 9U , kRDC_Master_LCDIF = 10U , kRDC_Master_CSI = 11U , kRDC_Master_ENET_1G_TX = 1U ,   kRDC_Master_ENET_1G_RX = 2U , kRDC_Master_ENET = 3U , kRDC_Master_ENET_QOS = 4U , kRDC_Master_USDHC1 = 5U ,   kRDC_Master_USDHC2 = 6U , kRDC_Master_USB = 7U , kRDC_Master_GPU = 8U , kRDC_Master_PXP = 9U ,   kRDC_Master_LCDIF = 10U , kRDC_Master_CSI = 11U }
	Structure for the RDC mapping. More...
enum	_rdc_mem {   kRDC_Mem_MRC0_0 = 0U , kRDC_Mem_MRC0_1 = 1U , kRDC_Mem_MRC0_2 = 2U , kRDC_Mem_MRC0_3 = 3U ,   kRDC_Mem_MRC0_4 = 4U , kRDC_Mem_MRC0_5 = 5U , kRDC_Mem_MRC0_6 = 6U , kRDC_Mem_MRC0_7 = 7U ,   kRDC_Mem_MRC1_0 = 8U , kRDC_Mem_MRC1_1 = 9U , kRDC_Mem_MRC1_2 = 10U , kRDC_Mem_MRC1_3 = 11U ,   kRDC_Mem_MRC1_4 = 12U , kRDC_Mem_MRC1_5 = 13U , kRDC_Mem_MRC1_6 = 14U , kRDC_Mem_MRC1_7 = 15U ,   kRDC_Mem_MRC2_0 = 16U , kRDC_Mem_MRC2_1 = 17U , kRDC_Mem_MRC2_2 = 18U , kRDC_Mem_MRC2_3 = 19U ,   kRDC_Mem_MRC2_4 = 20U , kRDC_Mem_MRC2_5 = 21U , kRDC_Mem_MRC2_6 = 22U , kRDC_Mem_MRC2_7 = 23U ,   kRDC_Mem_MRC3_0 = 24U , kRDC_Mem_MRC3_1 = 25U , kRDC_Mem_MRC3_2 = 26U , kRDC_Mem_MRC3_3 = 27U ,   kRDC_Mem_MRC3_4 = 28U , kRDC_Mem_MRC3_5 = 29U , kRDC_Mem_MRC3_6 = 30U , kRDC_Mem_MRC3_7 = 31U ,   kRDC_Mem_MRC4_0 = 32U , kRDC_Mem_MRC4_1 = 33U , kRDC_Mem_MRC4_2 = 34U , kRDC_Mem_MRC4_3 = 35U ,   kRDC_Mem_MRC4_4 = 36U , kRDC_Mem_MRC4_5 = 37U , kRDC_Mem_MRC4_6 = 38U , kRDC_Mem_MRC4_7 = 39U ,   kRDC_Mem_MRC5_0 = 40U , kRDC_Mem_MRC5_1 = 41U , kRDC_Mem_MRC5_2 = 42U , kRDC_Mem_MRC5_3 = 43U ,   kRDC_Mem_MRC6_0 = 44U , kRDC_Mem_MRC6_1 = 45U , kRDC_Mem_MRC6_2 = 46U , kRDC_Mem_MRC6_3 = 47U ,   kRDC_Mem_MRC7_0 = 48U , kRDC_Mem_MRC7_1 = 49U , kRDC_Mem_MRC7_2 = 50U , kRDC_Mem_MRC7_3 = 51U ,   kRDC_Mem_MRC7_4 = 52U , kRDC_Mem_MRC7_5 = 53U , kRDC_Mem_MRC7_6 = 54U , kRDC_Mem_MRC7_7 = 55U ,   kRDC_Mem_MRC8_0 = 56U , kRDC_Mem_MRC8_1 = 57U , kRDC_Mem_MRC8_2 = 58U , kRDC_Mem_MRC0_0 = 0U ,   kRDC_Mem_MRC0_1 = 1U , kRDC_Mem_MRC0_2 = 2U , kRDC_Mem_MRC0_3 = 3U , kRDC_Mem_MRC0_4 = 4U ,   kRDC_Mem_MRC0_5 = 5U , kRDC_Mem_MRC0_6 = 6U , kRDC_Mem_MRC0_7 = 7U , kRDC_Mem_MRC1_0 = 8U ,   kRDC_Mem_MRC1_1 = 9U , kRDC_Mem_MRC1_2 = 10U , kRDC_Mem_MRC1_3 = 11U , kRDC_Mem_MRC1_4 = 12U ,   kRDC_Mem_MRC1_5 = 13U , kRDC_Mem_MRC1_6 = 14U , kRDC_Mem_MRC1_7 = 15U , kRDC_Mem_MRC2_0 = 16U ,   kRDC_Mem_MRC2_1 = 17U , kRDC_Mem_MRC2_2 = 18U , kRDC_Mem_MRC2_3 = 19U , kRDC_Mem_MRC2_4 = 20U ,   kRDC_Mem_MRC2_5 = 21U , kRDC_Mem_MRC2_6 = 22U , kRDC_Mem_MRC2_7 = 23U , kRDC_Mem_MRC3_0 = 24U ,   kRDC_Mem_MRC3_1 = 25U , kRDC_Mem_MRC3_2 = 26U , kRDC_Mem_MRC3_3 = 27U , kRDC_Mem_MRC3_4 = 28U ,   kRDC_Mem_MRC3_5 = 29U , kRDC_Mem_MRC3_6 = 30U , kRDC_Mem_MRC3_7 = 31U , kRDC_Mem_MRC4_0 = 32U ,   kRDC_Mem_MRC4_1 = 33U , kRDC_Mem_MRC4_2 = 34U , kRDC_Mem_MRC4_3 = 35U , kRDC_Mem_MRC4_4 = 36U ,   kRDC_Mem_MRC4_5 = 37U , kRDC_Mem_MRC4_6 = 38U , kRDC_Mem_MRC4_7 = 39U , kRDC_Mem_MRC5_0 = 40U ,   kRDC_Mem_MRC5_1 = 41U , kRDC_Mem_MRC5_2 = 42U , kRDC_Mem_MRC5_3 = 43U , kRDC_Mem_MRC6_0 = 44U ,   kRDC_Mem_MRC6_1 = 45U , kRDC_Mem_MRC6_2 = 46U , kRDC_Mem_MRC6_3 = 47U , kRDC_Mem_MRC7_0 = 48U ,   kRDC_Mem_MRC7_1 = 49U , kRDC_Mem_MRC7_2 = 50U , kRDC_Mem_MRC7_3 = 51U , kRDC_Mem_MRC7_4 = 52U ,   kRDC_Mem_MRC7_5 = 53U , kRDC_Mem_MRC7_6 = 54U , kRDC_Mem_MRC7_7 = 55U , kRDC_Mem_MRC8_0 = 56U ,   kRDC_Mem_MRC8_1 = 57U , kRDC_Mem_MRC8_2 = 58U }
enum	_rdc_periph {   kRDC_Periph_MTR = 0U , kRDC_Periph_MECC1 = 1U , kRDC_Periph_MECC2 = 2U , kRDC_Periph_FLEXSPI1 = 3U ,   kRDC_Periph_FLEXSPI2 = 4U , kRDC_Periph_SEMC = 5U , kRDC_Periph_CM7_IMXRT = 6U , kRDC_Periph_EWM = 7U ,   kRDC_Periph_WDOG1 = 8U , kRDC_Periph_WDOG2 = 9U , kRDC_Periph_WDOG3 = 10U , kRDC_Periph_AOI_XBAR = 11U ,   kRDC_Periph_ADC_ETC = 12U , kRDC_Periph_CAAM_1 = 13U , kRDC_Periph_ADC1 = 14U , kRDC_Periph_ADC2 = 15U ,   kRDC_Periph_TSC_DIG = 16U , kRDC_Periph_DAC = 17U , kRDC_Periph_IEE = 18U , kRDC_Periph_DMAMUX = 19U ,   kRDC_Periph_EDMA = 19U , kRDC_Periph_LPUART1 = 20U , kRDC_Periph_LPUART2 = 21U , kRDC_Periph_LPUART3 = 22U ,   kRDC_Periph_LPUART4 = 23U , kRDC_Periph_LPUART5 = 24U , kRDC_Periph_LPUART6 = 25U , kRDC_Periph_LPUART7 = 26U ,   kRDC_Periph_LPUART8 = 27U , kRDC_Periph_LPUART9 = 28U , kRDC_Periph_LPUART10 = 29U , kRDC_Periph_FLEXIO1 = 30U ,   kRDC_Periph_FLEXIO2 = 31U , kRDC_Periph_CAN1 = 32U , kRDC_Periph_CAN2 = 33U , kRDC_Periph_PIT1 = 34U ,   kRDC_Periph_KPP = 35U , kRDC_Periph_IOMUXC_GPR = 36U , kRDC_Periph_IOMUXC = 37U , kRDC_Periph_GPT1 = 38U ,   kRDC_Periph_GPT2 = 39U , kRDC_Periph_GPT3 = 40U , kRDC_Periph_GPT4 = 41U , kRDC_Periph_GPT5 = 42U ,   kRDC_Periph_GPT6 = 43U , kRDC_Periph_LPI2C1 = 44U , kRDC_Periph_LPI2C2 = 45U , kRDC_Periph_LPI2C3 = 46U ,   kRDC_Periph_LPI2C4 = 47U , kRDC_Periph_LPSPI1 = 48U , kRDC_Periph_LPSPI2 = 49U , kRDC_Periph_LPSPI3 = 50U ,   kRDC_Periph_LPSPI4 = 51U , kRDC_Periph_GPIO_1_6 = 52U , kRDC_Periph_CCM_OBS = 53U , kRDC_Periph_SIM1 = 54U ,   kRDC_Periph_SIM2 = 55U , kRDC_Periph_QTIMER1 = 56U , kRDC_Periph_QTIMER2 = 57U , kRDC_Periph_QTIMER3 = 58U ,   kRDC_Periph_QTIMER4 = 59U , kRDC_Periph_ENC1 = 60U , kRDC_Periph_ENC2 = 61U , kRDC_Periph_ENC3 = 62U ,   kRDC_Periph_ENC4 = 63U , kRDC_Periph_FLEXPWM1 = 64U , kRDC_Periph_FLEXPWM2 = 65U , kRDC_Periph_FLEXPWM3 = 66U ,   kRDC_Periph_FLEXPWM4 = 67U , kRDC_Periph_CAAM_2 = 68U , kRDC_Periph_CAAM_3 = 69U , kRDC_Periph_ACMP1 = 70U ,   kRDC_Periph_ACMP2 = 71U , kRDC_Periph_ACMP3 = 72U , kRDC_Periph_ACMP4 = 73U , kRDC_Periph_CAAM = 74U ,   kRDC_Periph_SPDIF = 75U , kRDC_Periph_SAI1 = 76U , kRDC_Periph_SAI2 = 77U , kRDC_Periph_SAI3 = 78U ,   kRDC_Periph_ASRC = 79U , kRDC_Periph_USDHC1 = 80U , kRDC_Periph_USDHC2 = 81U , kRDC_Periph_ENET_1G = 82U ,   kRDC_Periph_ENET = 83U , kRDC_Periph_USB_PL301 = 84U , kRDC_Periph_USBPHY2 = 85U , kRDC_Periph_USB_OTG2 = 85U ,   kRDC_Periph_USBPHY1 = 86U , kRDC_Periph_USB_OTG1 = 86U , kRDC_Periph_ENET_QOS = 87U , kRDC_Periph_CAAM_5 = 88U ,   kRDC_Periph_CSI = 89U , kRDC_Periph_LCDIF1 = 90U , kRDC_Periph_LCDIF2 = 91U , kRDC_Periph_MIPI_DSI = 92U ,   kRDC_Periph_MIPI_CSI = 93U , kRDC_Periph_PXP = 94U , kRDC_Periph_VIDEO_MUX = 95U , kRDC_Periph_PGMC_SRC_GPC = 96U ,   kRDC_Periph_IOMUXC_LPSR = 97U , kRDC_Periph_IOMUXC_LPSR_GPR = 98U , kRDC_Periph_WDOG4 = 99U , kRDC_Periph_DMAMUX_LPSR = 100U ,   kRDC_Periph_EDMA_LPSR = 100U , kRDC_Periph_Reserved = 101U , kRDC_Periph_MIC = 102U , kRDC_Periph_LPUART11 = 103U ,   kRDC_Periph_LPUART12 = 104U , kRDC_Periph_LPSPI5 = 105U , kRDC_Periph_LPSPI6 = 106U , kRDC_Periph_LPI2C5 = 107U ,   kRDC_Periph_LPI2C6 = 108U , kRDC_Periph_CAN3 = 109U , kRDC_Periph_SAI4 = 110U , kRDC_Periph_SEMA1 = 111U ,   kRDC_Periph_GPIO_7_12 = 112U , kRDC_Periph_KEY_MANAGER = 113U , kRDC_Periph_ANATOP = 114U , kRDC_Periph_SNVS_HP_WRAPPER = 115U ,   kRDC_Periph_IOMUXC_SNVS = 116U , kRDC_Periph_IOMUXC_SNVS_GPR = 117U , kRDC_Periph_SNVS_SRAM = 118U , kRDC_Periph_GPIO13 = 119U ,   kRDC_Periph_ROMCP = 120U , kRDC_Periph_DCDC = 121U , kRDC_Periph_OCOTP_CTRL_WRAPPER = 122U , kRDC_Periph_PIT2 = 123U ,   kRDC_Periph_SSARC = 124U , kRDC_Periph_CCM = 125U , kRDC_Periph_CAAM_6 = 126U , kRDC_Periph_CAAM_7 = 127U ,   kRDC_Periph_MTR = 0U , kRDC_Periph_MECC1 = 1U , kRDC_Periph_MECC2 = 2U , kRDC_Periph_FLEXSPI1 = 3U ,   kRDC_Periph_FLEXSPI2 = 4U , kRDC_Periph_SEMC = 5U , kRDC_Periph_CM7_IMXRT = 6U , kRDC_Periph_EWM = 7U ,   kRDC_Periph_WDOG1 = 8U , kRDC_Periph_WDOG2 = 9U , kRDC_Periph_WDOG3 = 10U , kRDC_Periph_AOI_XBAR = 11U ,   kRDC_Periph_ADC_ETC = 12U , kRDC_Periph_CAAM_1 = 13U , kRDC_Periph_ADC1 = 14U , kRDC_Periph_ADC2 = 15U ,   kRDC_Periph_TSC_DIG = 16U , kRDC_Periph_DAC = 17U , kRDC_Periph_IEE = 18U , kRDC_Periph_DMAMUX = 19U ,   kRDC_Periph_EDMA = 19U , kRDC_Periph_LPUART1 = 20U , kRDC_Periph_LPUART2 = 21U , kRDC_Periph_LPUART3 = 22U ,   kRDC_Periph_LPUART4 = 23U , kRDC_Periph_LPUART5 = 24U , kRDC_Periph_LPUART6 = 25U , kRDC_Periph_LPUART7 = 26U ,   kRDC_Periph_LPUART8 = 27U , kRDC_Periph_LPUART9 = 28U , kRDC_Periph_LPUART10 = 29U , kRDC_Periph_FLEXIO1 = 30U ,   kRDC_Periph_FLEXIO2 = 31U , kRDC_Periph_CAN1 = 32U , kRDC_Periph_CAN2 = 33U , kRDC_Periph_PIT1 = 34U ,   kRDC_Periph_KPP = 35U , kRDC_Periph_IOMUXC_GPR = 36U , kRDC_Periph_IOMUXC = 37U , kRDC_Periph_GPT1 = 38U ,   kRDC_Periph_GPT2 = 39U , kRDC_Periph_GPT3 = 40U , kRDC_Periph_GPT4 = 41U , kRDC_Periph_GPT5 = 42U ,   kRDC_Periph_GPT6 = 43U , kRDC_Periph_LPI2C1 = 44U , kRDC_Periph_LPI2C2 = 45U , kRDC_Periph_LPI2C3 = 46U ,   kRDC_Periph_LPI2C4 = 47U , kRDC_Periph_LPSPI1 = 48U , kRDC_Periph_LPSPI2 = 49U , kRDC_Periph_LPSPI3 = 50U ,   kRDC_Periph_LPSPI4 = 51U , kRDC_Periph_GPIO_1_6 = 52U , kRDC_Periph_CCM_OBS = 53U , kRDC_Periph_SIM1 = 54U ,   kRDC_Periph_SIM2 = 55U , kRDC_Periph_QTIMER1 = 56U , kRDC_Periph_QTIMER2 = 57U , kRDC_Periph_QTIMER3 = 58U ,   kRDC_Periph_QTIMER4 = 59U , kRDC_Periph_ENC1 = 60U , kRDC_Periph_ENC2 = 61U , kRDC_Periph_ENC3 = 62U ,   kRDC_Periph_ENC4 = 63U , kRDC_Periph_FLEXPWM1 = 64U , kRDC_Periph_FLEXPWM2 = 65U , kRDC_Periph_FLEXPWM3 = 66U ,   kRDC_Periph_FLEXPWM4 = 67U , kRDC_Periph_CAAM_2 = 68U , kRDC_Periph_CAAM_3 = 69U , kRDC_Periph_ACMP1 = 70U ,   kRDC_Periph_ACMP2 = 71U , kRDC_Periph_ACMP3 = 72U , kRDC_Periph_ACMP4 = 73U , kRDC_Periph_CAAM = 74U ,   kRDC_Periph_SPDIF = 75U , kRDC_Periph_SAI1 = 76U , kRDC_Periph_SAI2 = 77U , kRDC_Periph_SAI3 = 78U ,   kRDC_Periph_ASRC = 79U , kRDC_Periph_USDHC1 = 80U , kRDC_Periph_USDHC2 = 81U , kRDC_Periph_ENET_1G = 82U ,   kRDC_Periph_ENET = 83U , kRDC_Periph_USB_PL301 = 84U , kRDC_Periph_USBPHY2 = 85U , kRDC_Periph_USB_OTG2 = 85U ,   kRDC_Periph_USBPHY1 = 86U , kRDC_Periph_USB_OTG1 = 86U , kRDC_Periph_ENET_QOS = 87U , kRDC_Periph_CAAM_5 = 88U ,   kRDC_Periph_CSI = 89U , kRDC_Periph_LCDIF1 = 90U , kRDC_Periph_LCDIF2 = 91U , kRDC_Periph_MIPI_DSI = 92U ,   kRDC_Periph_MIPI_CSI = 93U , kRDC_Periph_PXP = 94U , kRDC_Periph_VIDEO_MUX = 95U , kRDC_Periph_PGMC_SRC_GPC = 96U ,   kRDC_Periph_IOMUXC_LPSR = 97U , kRDC_Periph_IOMUXC_LPSR_GPR = 98U , kRDC_Periph_WDOG4 = 99U , kRDC_Periph_DMAMUX_LPSR = 100U ,   kRDC_Periph_EDMA_LPSR = 100U , kRDC_Periph_Reserved = 101U , kRDC_Periph_MIC = 102U , kRDC_Periph_LPUART11 = 103U ,   kRDC_Periph_LPUART12 = 104U , kRDC_Periph_LPSPI5 = 105U , kRDC_Periph_LPSPI6 = 106U , kRDC_Periph_LPI2C5 = 107U ,   kRDC_Periph_LPI2C6 = 108U , kRDC_Periph_CAN3 = 109U , kRDC_Periph_SAI4 = 110U , kRDC_Periph_SEMA1 = 111U ,   kRDC_Periph_GPIO_7_12 = 112U , kRDC_Periph_KEY_MANAGER = 113U , kRDC_Periph_ANATOP = 114U , kRDC_Periph_SNVS_HP_WRAPPER = 115U ,   kRDC_Periph_IOMUXC_SNVS = 116U , kRDC_Periph_IOMUXC_SNVS_GPR = 117U , kRDC_Periph_SNVS_SRAM = 118U , kRDC_Periph_GPIO13 = 119U ,   kRDC_Periph_ROMCP = 120U , kRDC_Periph_DCDC = 121U , kRDC_Periph_OCOTP_CTRL_WRAPPER = 122U , kRDC_Periph_PIT2 = 123U ,   kRDC_Periph_SSARC = 124U , kRDC_Periph_CCM = 125U , kRDC_Periph_CAAM_6 = 126U , kRDC_Periph_CAAM_7 = 127U }
enum	_xbar_input_signal {   kXBARA1_InputLogicLow = 0|0x100U , kXBARA1_InputLogicHigh = 1|0x100U , kXBARA1_InputIomuxXbarIn02 = 2|0x100U , kXBARA1_InputIomuxXbarIn03 = 3|0x100U ,   kXBARA1_InputIomuxXbarInout04 = 4|0x100U , kXBARA1_InputIomuxXbarInout05 = 5|0x100U , kXBARA1_InputIomuxXbarInout06 = 6|0x100U , kXBARA1_InputIomuxXbarInout07 = 7|0x100U ,   kXBARA1_InputIomuxXbarInout08 = 8|0x100U , kXBARA1_InputIomuxXbarInout09 = 9|0x100U , kXBARA1_InputIomuxXbarInout10 = 10|0x100U , kXBARA1_InputIomuxXbarInout11 = 11|0x100U ,   kXBARA1_InputIomuxXbarInout12 = 12|0x100U , kXBARA1_InputIomuxXbarInout13 = 13|0x100U , kXBARA1_InputIomuxXbarInout14 = 14|0x100U , kXBARA1_InputIomuxXbarInout15 = 15|0x100U ,   kXBARA1_InputIomuxXbarInout16 = 16|0x100U , kXBARA1_InputIomuxXbarInout17 = 17|0x100U , kXBARA1_InputIomuxXbarInout18 = 18|0x100U , kXBARA1_InputIomuxXbarInout19 = 19|0x100U ,   kXBARA1_InputIomuxXbarIn20 = 20|0x100U , kXBARA1_InputIomuxXbarIn21 = 21|0x100U , kXBARA1_InputIomuxXbarIn22 = 22|0x100U , kXBARA1_InputIomuxXbarIn23 = 23|0x100U ,   kXBARA1_InputIomuxXbarIn24 = 24|0x100U , kXBARA1_InputIomuxXbarIn25 = 25|0x100U , kXBARA1_InputAcmp1Out = 26|0x100U , kXBARA1_InputAcmp2Out = 27|0x100U ,   kXBARA1_InputAcmp3Out = 28|0x100U , kXBARA1_InputAcmp4Out = 29|0x100U , kXBARA1_InputRESERVED30 = 30|0x100U , kXBARA1_InputRESERVED31 = 31|0x100U ,   kXBARA1_InputQtimer3Tmr0Output = 32|0x100U , kXBARA1_InputQtimer3Tmr1Output = 33|0x100U , kXBARA1_InputQtimer3Tmr2Output = 34|0x100U , kXBARA1_InputQtimer3Tmr3Output = 35|0x100U ,   kXBARA1_InputQtimer4Tmr0Output = 36|0x100U , kXBARA1_InputQtimer4Tmr1Output = 37|0x100U , kXBARA1_InputQtimer4Tmr2Output = 38|0x100U , kXBARA1_InputQtimer4Tmr3Output = 39|0x100U ,   kXBARA1_InputFlexpwm1Pwm1OutTrig01 = 40|0x100U , kXBARA1_InputFlexpwm1Pwm2OutTrig01 = 41|0x100U , kXBARA1_InputFlexpwm1Pwm3OutTrig01 = 42|0x100U , kXBARA1_InputFlexpwm1Pwm4OutTrig01 = 43|0x100U ,   kXBARA1_InputFlexpwm2Pwm1OutTrig01 = 44|0x100U , kXBARA1_InputFlexpwm2Pwm2OutTrig01 = 45|0x100U , kXBARA1_InputFlexpwm2Pwm3OutTrig01 = 46|0x100U , kXBARA1_InputFlexpwm2Pwm4OutTrig01 = 47|0x100U ,   kXBARA1_InputFlexpwm3Pwm1OutTrig01 = 48|0x100U , kXBARA1_InputFlexpwm3Pwm2OutTrig01 = 49|0x100U , kXBARA1_InputFlexpwm3Pwm3OutTrig01 = 50|0x100U , kXBARA1_InputFlexpwm3Pwm4OutTrig01 = 51|0x100U ,   kXBARA1_InputFlexpwm4Pwm1OutTrig01 = 52|0x100U , kXBARA1_InputFlexpwm4Pwm2OutTrig01 = 53|0x100U , kXBARA1_InputFlexpwm4Pwm3OutTrig01 = 54|0x100U , kXBARA1_InputFlexpwm4Pwm4OutTrig01 = 55|0x100U ,   kXBARA1_InputPitTrigger0 = 56|0x100U , kXBARA1_InputPitTrigger1 = 57|0x100U , kXBARA1_InputPitTrigger2 = 58|0x100U , kXBARA1_InputPitTrigger3 = 59|0x100U ,   kXBARA1_InputEnc1PosMatch = 60|0x100U , kXBARA1_InputEnc2PosMatch = 61|0x100U , kXBARA1_InputEnc3PosMatch = 62|0x100U , kXBARA1_InputEnc4PosMatch = 63|0x100U ,   kXBARA1_InputDmaDone0 = 64|0x100U , kXBARA1_InputDmaDone1 = 65|0x100U , kXBARA1_InputDmaDone2 = 66|0x100U , kXBARA1_InputDmaDone3 = 67|0x100U ,   kXBARA1_InputDmaDone4 = 68|0x100U , kXBARA1_InputDmaDone5 = 69|0x100U , kXBARA1_InputDmaDone6 = 70|0x100U , kXBARA1_InputDmaDone7 = 71|0x100U ,   kXBARA1_InputAoi1Out0 = 72|0x100U , kXBARA1_InputAoi1Out1 = 73|0x100U , kXBARA1_InputAoi1Out2 = 74|0x100U , kXBARA1_InputAoi1Out3 = 75|0x100U ,   kXBARA1_InputAoi2Out0 = 76|0x100U , kXBARA1_InputAoi2Out1 = 77|0x100U , kXBARA1_InputAoi2Out2 = 78|0x100U , kXBARA1_InputAoi2Out3 = 79|0x100U ,   kXBARA1_InputAdcEtcXbar0Coco0 = 80|0x100U , kXBARA1_InputAdcEtcXbar0Coco1 = 81|0x100U , kXBARA1_InputAdcEtcXbar0Coco2 = 82|0x100U , kXBARA1_InputAdcEtcXbar0Coco3 = 83|0x100U ,   kXBARA1_InputAdcEtcXbar1Coco0 = 84|0x100U , kXBARA1_InputAdcEtcXbar1Coco1 = 85|0x100U , kXBARA1_InputAdcEtcXbar1Coco2 = 86|0x100U , kXBARA1_InputAdcEtcXbar1Coco3 = 87|0x100U ,   kXBARB2_InputLogicLow = 0|0x200U , kXBARB2_InputLogicHigh = 1|0x200U , kXBARB2_InputRESERVED2 = 2|0x200U , kXBARB2_InputRESERVED3 = 3|0x200U ,   kXBARB2_InputRESERVED4 = 4|0x200U , kXBARB2_InputRESERVED5 = 5|0x200U , kXBARB2_InputAcmp1Out = 6|0x200U , kXBARB2_InputAcmp2Out = 7|0x200U ,   kXBARB2_InputAcmp3Out = 8|0x200U , kXBARB2_InputAcmp4Out = 9|0x200U , kXBARB2_InputRESERVED10 = 10|0x200U , kXBARB2_InputRESERVED11 = 11|0x200U ,   kXBARB2_InputQtimer3Tmr0Output = 12|0x200U , kXBARB2_InputQtimer3Tmr1Output = 13|0x200U , kXBARB2_InputQtimer3Tmr2Output = 14|0x200U , kXBARB2_InputQtimer3Tmr3Output = 15|0x200U ,   kXBARB2_InputQtimer4Tmr0Output = 16|0x200U , kXBARB2_InputQtimer4Tmr1Output = 17|0x200U , kXBARB2_InputQtimer4Tmr2Output = 18|0x200U , kXBARB2_InputQtimer4Tmr3Output = 19|0x200U ,   kXBARB2_InputFlexpwm1Pwm1OutTrig01 = 20|0x200U , kXBARB2_InputFlexpwm1Pwm2OutTrig01 = 21|0x200U , kXBARB2_InputFlexpwm1Pwm3OutTrig01 = 22|0x200U , kXBARB2_InputFlexpwm1Pwm4OutTrig01 = 23|0x200U ,   kXBARB2_InputFlexpwm2Pwm1OutTrig01 = 24|0x200U , kXBARB2_InputFlexpwm2Pwm2OutTrig01 = 25|0x200U , kXBARB2_InputFlexpwm2Pwm3OutTrig01 = 26|0x200U , kXBARB2_InputFlexpwm2Pwm4OutTrig01 = 27|0x200U ,   kXBARB2_InputFlexpwm3Pwm1OutTrig01 = 28|0x200U , kXBARB2_InputFlexpwm3Pwm2OutTrig01 = 29|0x200U , kXBARB2_InputFlexpwm3Pwm3OutTrig01 = 30|0x200U , kXBARB2_InputFlexpwm3Pwm4OutTrig01 = 31|0x200U ,   kXBARB2_InputFlexpwm4Pwm1OutTrig01 = 32|0x200U , kXBARB2_InputFlexpwm4Pwm2OutTrig01 = 33|0x200U , kXBARB2_InputFlexpwm4Pwm3OutTrig01 = 34|0x200U , kXBARB2_InputFlexpwm4Pwm4OutTrig01 = 35|0x200U ,   kXBARB2_InputPitTrigger0 = 36|0x200U , kXBARB2_InputPitTrigger1 = 37|0x200U , kXBARB2_InputAdcEtcXbar0Coco0 = 38|0x200U , kXBARB2_InputAdcEtcXbar0Coco1 = 39|0x200U ,   kXBARB2_InputAdcEtcXbar0Coco2 = 40|0x200U , kXBARB2_InputAdcEtcXbar0Coco3 = 41|0x200U , kXBARB2_InputAdcEtcXbar1Coco0 = 42|0x200U , kXBARB2_InputAdcEtcXbar1Coco1 = 43|0x200U ,   kXBARB2_InputAdcEtcXbar1Coco2 = 44|0x200U , kXBARB2_InputAdcEtcXbar1Coco3 = 45|0x200U , kXBARB2_InputEnc1PosMatch = 46|0x200U , kXBARB2_InputEnc2PosMatch = 47|0x200U ,   kXBARB2_InputEnc3PosMatch = 48|0x200U , kXBARB2_InputEnc4PosMatch = 49|0x200U , kXBARB2_InputDmaDone0 = 50|0x200U , kXBARB2_InputDmaDone1 = 51|0x200U ,   kXBARB2_InputDmaDone2 = 52|0x200U , kXBARB2_InputDmaDone3 = 53|0x200U , kXBARB2_InputDmaDone4 = 54|0x200U , kXBARB2_InputDmaDone5 = 55|0x200U ,   kXBARB2_InputDmaDone6 = 56|0x200U , kXBARB2_InputDmaDone7 = 57|0x200U , kXBARB3_InputLogicLow = 0|0x300U , kXBARB3_InputLogicHigh = 1|0x300U ,   kXBARB3_InputRESERVED2 = 2|0x300U , kXBARB3_InputRESERVED3 = 3|0x300U , kXBARB3_InputRESERVED4 = 4|0x300U , kXBARB3_InputRESERVED5 = 5|0x300U ,   kXBARB3_InputAcmp1Out = 6|0x300U , kXBARB3_InputAcmp2Out = 7|0x300U , kXBARB3_InputAcmp3Out = 8|0x300U , kXBARB3_InputAcmp4Out = 9|0x300U ,   kXBARB3_InputRESERVED10 = 10|0x300U , kXBARB3_InputRESERVED11 = 11|0x300U , kXBARB3_InputQtimer3Tmr0Output = 12|0x300U , kXBARB3_InputQtimer3Tmr1Output = 13|0x300U ,   kXBARB3_InputQtimer3Tmr2Output = 14|0x300U , kXBARB3_InputQtimer3Tmr3Output = 15|0x300U , kXBARB3_InputQtimer4Tmr0Output = 16|0x300U , kXBARB3_InputQtimer4Tmr1Output = 17|0x300U ,   kXBARB3_InputQtimer4Tmr2Output = 18|0x300U , kXBARB3_InputQtimer4Tmr3Output = 19|0x300U , kXBARB3_InputFlexpwm1Pwm1OutTrig01 = 20|0x300U , kXBARB3_InputFlexpwm1Pwm2OutTrig01 = 21|0x300U ,   kXBARB3_InputFlexpwm1Pwm3OutTrig01 = 22|0x300U , kXBARB3_InputFlexpwm1Pwm4OutTrig01 = 23|0x300U , kXBARB3_InputFlexpwm2Pwm1OutTrig01 = 24|0x300U , kXBARB3_InputFlexpwm2Pwm2OutTrig01 = 25|0x300U ,   kXBARB3_InputFlexpwm2Pwm3OutTrig01 = 26|0x300U , kXBARB3_InputFlexpwm2Pwm4OutTrig01 = 27|0x300U , kXBARB3_InputFlexpwm3Pwm1OutTrig01 = 28|0x300U , kXBARB3_InputFlexpwm3Pwm2OutTrig01 = 29|0x300U ,   kXBARB3_InputFlexpwm3Pwm3OutTrig01 = 30|0x300U , kXBARB3_InputFlexpwm3Pwm4OutTrig01 = 31|0x300U , kXBARB3_InputFlexpwm4Pwm1OutTrig01 = 32|0x300U , kXBARB3_InputFlexpwm4Pwm2OutTrig01 = 33|0x300U ,   kXBARB3_InputFlexpwm4Pwm3OutTrig01 = 34|0x300U , kXBARB3_InputFlexpwm4Pwm4OutTrig01 = 35|0x300U , kXBARB3_InputPitTrigger0 = 36|0x300U , kXBARB3_InputPitTrigger1 = 37|0x300U ,   kXBARB3_InputAdcEtcXbar0Coco0 = 38|0x300U , kXBARB3_InputAdcEtcXbar0Coco1 = 39|0x300U , kXBARB3_InputAdcEtcXbar0Coco2 = 40|0x300U , kXBARB3_InputAdcEtcXbar0Coco3 = 41|0x300U ,   kXBARB3_InputAdcEtcXbar1Coco0 = 42|0x300U , kXBARB3_InputAdcEtcXbar1Coco1 = 43|0x300U , kXBARB3_InputAdcEtcXbar1Coco2 = 44|0x300U , kXBARB3_InputAdcEtcXbar1Coco3 = 45|0x300U ,   kXBARB3_InputEnc1PosMatch = 46|0x300U , kXBARB3_InputEnc2PosMatch = 47|0x300U , kXBARB3_InputEnc3PosMatch = 48|0x300U , kXBARB3_InputEnc4PosMatch = 49|0x300U ,   kXBARB3_InputDmaDone0 = 50|0x300U , kXBARB3_InputDmaDone1 = 51|0x300U , kXBARB3_InputDmaDone2 = 52|0x300U , kXBARB3_InputDmaDone3 = 53|0x300U ,   kXBARB3_InputDmaDone4 = 54|0x300U , kXBARB3_InputDmaDone5 = 55|0x300U , kXBARB3_InputDmaDone6 = 56|0x300U , kXBARB3_InputDmaDone7 = 57|0x300U ,   kXBARA1_InputLogicLow = 0|0x100U , kXBARA1_InputLogicHigh = 1|0x100U , kXBARA1_InputRESERVED2 = 2|0x100U , kXBARA1_InputRESERVED3 = 3|0x100U ,   kXBARA1_InputIomuxXbarInout04 = 4|0x100U , kXBARA1_InputIomuxXbarInout05 = 5|0x100U , kXBARA1_InputIomuxXbarInout06 = 6|0x100U , kXBARA1_InputIomuxXbarInout07 = 7|0x100U ,   kXBARA1_InputIomuxXbarInout08 = 8|0x100U , kXBARA1_InputIomuxXbarInout09 = 9|0x100U , kXBARA1_InputIomuxXbarInout10 = 10|0x100U , kXBARA1_InputIomuxXbarInout11 = 11|0x100U ,   kXBARA1_InputIomuxXbarInout12 = 12|0x100U , kXBARA1_InputIomuxXbarInout13 = 13|0x100U , kXBARA1_InputIomuxXbarInout14 = 14|0x100U , kXBARA1_InputIomuxXbarInout15 = 15|0x100U ,   kXBARA1_InputIomuxXbarInout16 = 16|0x100U , kXBARA1_InputIomuxXbarInout17 = 17|0x100U , kXBARA1_InputIomuxXbarInout18 = 18|0x100U , kXBARA1_InputIomuxXbarInout19 = 19|0x100U ,   kXBARA1_InputIomuxXbarInout20 = 20|0x100U , kXBARA1_InputIomuxXbarInout21 = 21|0x100U , kXBARA1_InputIomuxXbarInout22 = 22|0x100U , kXBARA1_InputIomuxXbarInout23 = 23|0x100U ,   kXBARA1_InputIomuxXbarInout24 = 24|0x100U , kXBARA1_InputIomuxXbarInout25 = 25|0x100U , kXBARA1_InputIomuxXbarInout26 = 26|0x100U , kXBARA1_InputIomuxXbarInout27 = 27|0x100U ,   kXBARA1_InputIomuxXbarInout28 = 28|0x100U , kXBARA1_InputIomuxXbarInout29 = 29|0x100U , kXBARA1_InputIomuxXbarInout30 = 30|0x100U , kXBARA1_InputIomuxXbarInout31 = 31|0x100U ,   kXBARA1_InputIomuxXbarInout32 = 32|0x100U , kXBARA1_InputIomuxXbarInout33 = 33|0x100U , kXBARA1_InputIomuxXbarInout34 = 34|0x100U , kXBARA1_InputIomuxXbarInout35 = 35|0x100U ,   kXBARA1_InputIomuxXbarInout36 = 36|0x100U , kXBARA1_InputIomuxXbarInout37 = 37|0x100U , kXBARA1_InputIomuxXbarInout38 = 38|0x100U , kXBARA1_InputIomuxXbarInout39 = 39|0x100U ,   kXBARA1_InputIomuxXbarInout40 = 40|0x100U , kXBARA1_InputRESERVED41 = 41|0x100U , kXBARA1_InputAcmp1Out = 42|0x100U , kXBARA1_InputAcmp2Out = 43|0x100U ,   kXBARA1_InputAcmp3Out = 44|0x100U , kXBARA1_InputAcmp4Out = 45|0x100U , kXBARA1_InputRESERVED46 = 46|0x100U , kXBARA1_InputRESERVED47 = 47|0x100U ,   kXBARA1_InputRESERVED48 = 48|0x100U , kXBARA1_InputRESERVED49 = 49|0x100U , kXBARA1_InputQtimer1Timer0 = 50|0x100U , kXBARA1_InputQtimer1Timer1 = 51|0x100U ,   kXBARA1_InputQtimer1Timer2 = 52|0x100U , kXBARA1_InputQtimer1Timer3 = 53|0x100U , kXBARA1_InputQtimer2Timer0 = 54|0x100U , kXBARA1_InputQtimer2Timer1 = 55|0x100U ,   kXBARA1_InputQtimer2Timer2 = 56|0x100U , kXBARA1_InputQtimer2Timer3 = 57|0x100U , kXBARA1_InputQtimer3Timer0 = 58|0x100U , kXBARA1_InputQtimer3Timer1 = 59|0x100U ,   kXBARA1_InputQtimer3Timer2 = 60|0x100U , kXBARA1_InputQtimer3Timer3 = 61|0x100U , kXBARA1_InputQtimer4Timer0 = 62|0x100U , kXBARA1_InputQtimer4Timer1 = 63|0x100U ,   kXBARA1_InputQtimer4Timer2 = 64|0x100U , kXBARA1_InputQtimer4Timer3 = 65|0x100U , kXBARA1_InputRESERVED66 = 66|0x100U , kXBARA1_InputRESERVED67 = 67|0x100U ,   kXBARA1_InputRESERVED68 = 68|0x100U , kXBARA1_InputRESERVED69 = 69|0x100U , kXBARA1_InputRESERVED70 = 70|0x100U , kXBARA1_InputRESERVED71 = 71|0x100U ,   kXBARA1_InputRESERVED72 = 72|0x100U , kXBARA1_InputRESERVED73 = 73|0x100U , kXBARA1_InputFlexpwm1Pwm0OutTrig0 = 74|0x100U , kXBARA1_InputFlexpwm1Pwm0OutTrig1 = 75|0x100U ,   kXBARA1_InputFlexpwm1Pwm1OutTrig0 = 76|0x100U , kXBARA1_InputFlexpwm1Pwm1OutTrig1 = 77|0x100U , kXBARA1_InputFlexpwm1Pwm2OutTrig0 = 78|0x100U , kXBARA1_InputFlexpwm1Pwm2OutTrig1 = 79|0x100U ,   kXBARA1_InputFlexpwm1Pwm3OutTrig0 = 80|0x100U , kXBARA1_InputFlexpwm1Pwm3OutTrig1 = 81|0x100U , kXBARA1_InputFlexpwm2Pwm0OutTrig01 = 82|0x100U , kXBARA1_InputFlexpwm2Pwm1OutTrig01 = 83|0x100U ,   kXBARA1_InputFlexpwm2Pwm2OutTrig01 = 84|0x100U , kXBARA1_InputFlexpwm2Pwm3OutTrig01 = 85|0x100U , kXBARA1_InputFlexpwm3Pwm0OutTrig01 = 86|0x100U , kXBARA1_InputFlexpwm3Pwm1OutTrig01 = 87|0x100U ,   kXBARA1_InputFlexpwm3Pwm2OutTrig01 = 88|0x100U , kXBARA1_InputFlexpwm3Pwm3OutTrig01 = 89|0x100U , kXBARA1_InputFlexpwm4Pwm0OutTrig01 = 90|0x100U , kXBARA1_InputFlexpwm4Pwm1OutTrig01 = 91|0x100U ,   kXBARA1_InputFlexpwm4Pwm2OutTrig01 = 92|0x100U , kXBARA1_InputFlexpwm4Pwm3OutTrig01 = 93|0x100U , kXBARA1_InputRESERVED94 = 94|0x100U , kXBARA1_InputRESERVED95 = 95|0x100U ,   kXBARA1_InputRESERVED96 = 96|0x100U , kXBARA1_InputRESERVED97 = 97|0x100U , kXBARA1_InputRESERVED98 = 98|0x100U , kXBARA1_InputRESERVED99 = 99|0x100U ,   kXBARA1_InputRESERVED100 = 100|0x100U , kXBARA1_InputRESERVED101 = 101|0x100U , kXBARA1_InputPit1Trigger0 = 102|0x100U , kXBARA1_InputPit1Trigger1 = 103|0x100U ,   kXBARA1_InputPit1Trigger2 = 104|0x100U , kXBARA1_InputPit1Trigger3 = 105|0x100U , kXBARA1_InputDec1PosMatch = 106|0x100U , kXBARA1_InputDec2PosMatch = 107|0x100U ,   kXBARA1_InputDec3PosMatch = 108|0x100U , kXBARA1_InputDec4PosMatch = 109|0x100U , kXBARA1_InputRESERVED110 = 110|0x100U , kXBARA1_InputRESERVED111 = 111|0x100U ,   kXBARA1_InputDmaDone0 = 112|0x100U , kXBARA1_InputDmaDone1 = 113|0x100U , kXBARA1_InputDmaDone2 = 114|0x100U , kXBARA1_InputDmaDone3 = 115|0x100U ,   kXBARA1_InputDmaDone4 = 116|0x100U , kXBARA1_InputDmaDone5 = 117|0x100U , kXBARA1_InputDmaDone6 = 118|0x100U , kXBARA1_InputDmaDone7 = 119|0x100U ,   kXBARA1_InputDmaLpsrDone0 = 120|0x100U , kXBARA1_InputDmaLpsrDone1 = 121|0x100U , kXBARA1_InputDmaLpsrDone2 = 122|0x100U , kXBARA1_InputDmaLpsrDone3 = 123|0x100U ,   kXBARA1_InputDmaLpsrDone4 = 124|0x100U , kXBARA1_InputDmaLpsrDone5 = 125|0x100U , kXBARA1_InputDmaLpsrDone6 = 126|0x100U , kXBARA1_InputDmaLpsrDone7 = 127|0x100U ,   kXBARA1_InputAoi1Out0 = 128|0x100U , kXBARA1_InputAoi1Out1 = 129|0x100U , kXBARA1_InputAoi1Out2 = 130|0x100U , kXBARA1_InputAoi1Out3 = 131|0x100U ,   kXBARA1_InputAoi2Out0 = 132|0x100U , kXBARA1_InputAoi2Out1 = 133|0x100U , kXBARA1_InputAoi2Out2 = 134|0x100U , kXBARA1_InputAoi2Out3 = 135|0x100U ,   kXBARA1_InputAdcEtc0Coco0 = 136|0x100U , kXBARA1_InputAdcEtc0Coco1 = 137|0x100U , kXBARA1_InputAdcEtc0Coco2 = 138|0x100U , kXBARA1_InputAdcEtc0Coco3 = 139|0x100U ,   kXBARA1_InputAdcEtc1Coco0 = 140|0x100U , kXBARA1_InputAdcEtc1Coco1 = 141|0x100U , kXBARA1_InputAdcEtc1Coco2 = 142|0x100U , kXBARA1_InputAdcEtc1Coco3 = 143|0x100U ,   kXBARB2_InputLogicLow = 0|0x200U , kXBARB2_InputLogicHigh = 1|0x200U , kXBARB2_InputAcmp1Out = 2|0x200U , kXBARB2_InputAcmp2Out = 3|0x200U ,   kXBARB2_InputAcmp3Out = 4|0x200U , kXBARB2_InputAcmp4Out = 5|0x200U , kXBARB2_InputRESERVED6 = 6|0x200U , kXBARB2_InputRESERVED7 = 7|0x200U ,   kXBARB2_InputRESERVED8 = 8|0x200U , kXBARB2_InputRESERVED9 = 9|0x200U , kXBARB2_InputQtimer1Timer0 = 10|0x200U , kXBARB2_InputQtimer1Timer1 = 11|0x200U ,   kXBARB2_InputQtimer1Timer2 = 12|0x200U , kXBARB2_InputQtimer1Timer3 = 13|0x200U , kXBARB2_InputQtimer2Timer0 = 14|0x200U , kXBARB2_InputQtimer2Timer1 = 15|0x200U ,   kXBARB2_InputQtimer2Timer2 = 16|0x200U , kXBARB2_InputQtimer2Timer3 = 17|0x200U , kXBARB2_InputQtimer3Timer0 = 18|0x200U , kXBARB2_InputQtimer3Timer1 = 19|0x200U ,   kXBARB2_InputQtimer3Timer2 = 20|0x200U , kXBARB2_InputQtimer3Timer3 = 21|0x200U , kXBARB2_InputQtimer4Timer0 = 22|0x200U , kXBARB2_InputQtimer4Timer1 = 23|0x200U ,   kXBARB2_InputQtimer4Timer2 = 24|0x200U , kXBARB2_InputQtimer4Timer3 = 25|0x200U , kXBARB2_InputRESERVED26 = 26|0x200U , kXBARB2_InputRESERVED27 = 27|0x200U ,   kXBARB2_InputRESERVED28 = 28|0x200U , kXBARB2_InputRESERVED29 = 29|0x200U , kXBARB2_InputRESERVED30 = 30|0x200U , kXBARB2_InputRESERVED31 = 31|0x200U ,   kXBARB2_InputRESERVED32 = 32|0x200U , kXBARB2_InputRESERVED33 = 33|0x200U , kXBARB2_InputFlexpwm1Pwm0OutTrig01 = 34|0x200U , kXBARB2_InputFlexpwm1Pwm1OutTrig01 = 35|0x200U ,   kXBARB2_InputFlexpwm1Pwm2OutTrig01 = 36|0x200U , kXBARB2_InputFlexpwm1Pwm3OutTrig01 = 37|0x200U , kXBARB2_InputFlexpwm2Pwm0OutTrig01 = 38|0x200U , kXBARB2_InputFlexpwm2Pwm1OutTrig01 = 39|0x200U ,   kXBARB2_InputFlexpwm2Pwm2OutTrig01 = 40|0x200U , kXBARB2_InputFlexpwm2Pwm3OutTrig01 = 41|0x200U , kXBARB2_InputFlexpwm3Pwm0OutTrig01 = 42|0x200U , kXBARB2_InputFlexpwm3Pwm1OutTrig01 = 43|0x200U ,   kXBARB2_InputFlexpwm3Pwm2OutTrig01 = 44|0x200U , kXBARB2_InputFlexpwm3Pwm3OutTrig01 = 45|0x200U , kXBARB2_InputFlexpwm4Pwm0OutTrig01 = 46|0x200U , kXBARB2_InputFlexpwm4Pwm1OutTrig01 = 47|0x200U ,   kXBARB2_InputFlexpwm4Pwm2OutTrig01 = 48|0x200U , kXBARB2_InputFlexpwm4Pwm3OutTrig01 = 49|0x200U , kXBARB2_InputRESERVED50 = 50|0x200U , kXBARB2_InputRESERVED51 = 51|0x200U ,   kXBARB2_InputRESERVED52 = 52|0x200U , kXBARB2_InputRESERVED53 = 53|0x200U , kXBARB2_InputRESERVED54 = 54|0x200U , kXBARB2_InputRESERVED55 = 55|0x200U ,   kXBARB2_InputRESERVED56 = 56|0x200U , kXBARB2_InputRESERVED57 = 57|0x200U , kXBARB2_InputPit1Trigger0 = 58|0x200U , kXBARB2_InputPit1Trigger1 = 59|0x200U ,   kXBARB2_InputAdcEtc0Coco0 = 60|0x200U , kXBARB2_InputAdcEtc0Coco1 = 61|0x200U , kXBARB2_InputAdcEtc0Coco2 = 62|0x200U , kXBARB2_InputAdcEtc0Coco3 = 63|0x200U ,   kXBARB2_InputAdcEtc1Coco0 = 64|0x200U , kXBARB2_InputAdcEtc1Coco1 = 65|0x200U , kXBARB2_InputAdcEtc1Coco2 = 66|0x200U , kXBARB2_InputAdcEtc1Coco3 = 67|0x200U ,   kXBARB2_InputRESERVED68 = 68|0x200U , kXBARB2_InputRESERVED69 = 69|0x200U , kXBARB2_InputRESERVED70 = 70|0x200U , kXBARB2_InputRESERVED71 = 71|0x200U ,   kXBARB2_InputRESERVED72 = 72|0x200U , kXBARB2_InputRESERVED73 = 73|0x200U , kXBARB2_InputRESERVED74 = 74|0x200U , kXBARB2_InputRESERVED75 = 75|0x200U ,   kXBARB2_InputDec1PosMatch = 76|0x200U , kXBARB2_InputDec2PosMatch = 77|0x200U , kXBARB2_InputDec3PosMatch = 78|0x200U , kXBARB2_InputDec4PosMatch = 79|0x200U ,   kXBARB2_InputRESERVED80 = 80|0x200U , kXBARB2_InputRESERVED81 = 81|0x200U , kXBARB2_InputDmaDone0 = 82|0x200U , kXBARB2_InputDmaDone1 = 83|0x200U ,   kXBARB2_InputDmaDone2 = 84|0x200U , kXBARB2_InputDmaDone3 = 85|0x200U , kXBARB2_InputDmaDone4 = 86|0x200U , kXBARB2_InputDmaDone5 = 87|0x200U ,   kXBARB2_InputDmaDone6 = 88|0x200U , kXBARB2_InputDmaDone7 = 89|0x200U , kXBARB2_InputDmaLpsrDone0 = 90|0x200U , kXBARB2_InputDmaLpsrDone1 = 91|0x200U ,   kXBARB2_InputDmaLpsrDone2 = 92|0x200U , kXBARB2_InputDmaLpsrDone3 = 93|0x200U , kXBARB2_InputDmaLpsrDone4 = 94|0x200U , kXBARB2_InputDmaLpsrDone5 = 95|0x200U ,   kXBARB2_InputDmaLpsrDone6 = 96|0x200U , kXBARB2_InputDmaLpsrDone7 = 97|0x200U , kXBARB3_InputLogicLow = 0|0x300U , kXBARB3_InputLogicHigh = 1|0x300U ,   kXBARB3_InputAcmp1Out = 2|0x300U , kXBARB3_InputAcmp2Out = 3|0x300U , kXBARB3_InputAcmp3Out = 4|0x300U , kXBARB3_InputAcmp4Out = 5|0x300U ,   kXBARB3_InputRESERVED6 = 6|0x300U , kXBARB3_InputRESERVED7 = 7|0x300U , kXBARB3_InputRESERVED8 = 8|0x300U , kXBARB3_InputRESERVED9 = 9|0x300U ,   kXBARB3_InputQtimer1Timer0 = 10|0x300U , kXBARB3_InputQtimer1Timer1 = 11|0x300U , kXBARB3_InputQtimer1Timer2 = 12|0x300U , kXBARB3_InputQtimer1Timer3 = 13|0x300U ,   kXBARB3_InputQtimer2Timer0 = 14|0x300U , kXBARB3_InputQtimer2Timer1 = 15|0x300U , kXBARB3_InputQtimer2Timer2 = 16|0x300U , kXBARB3_InputQtimer2Timer3 = 17|0x300U ,   kXBARB3_InputQtimer3Timer0 = 18|0x300U , kXBARB3_InputQtimer3Timer1 = 19|0x300U , kXBARB3_InputQtimer3Timer2 = 20|0x300U , kXBARB3_InputQtimer3Timer3 = 21|0x300U ,   kXBARB3_InputQtimer4Timer0 = 22|0x300U , kXBARB3_InputQtimer4Timer1 = 23|0x300U , kXBARB3_InputQtimer4Timer2 = 24|0x300U , kXBARB3_InputQtimer4Timer3 = 25|0x300U ,   kXBARB3_InputRESERVED26 = 26|0x300U , kXBARB3_InputRESERVED27 = 27|0x300U , kXBARB3_InputRESERVED28 = 28|0x300U , kXBARB3_InputRESERVED29 = 29|0x300U ,   kXBARB3_InputRESERVED30 = 30|0x300U , kXBARB3_InputRESERVED31 = 31|0x300U , kXBARB3_InputRESERVED32 = 32|0x300U , kXBARB3_InputRESERVED33 = 33|0x300U ,   kXBARB3_InputFlexpwm1Pwm0OutTrig01 = 34|0x300U , kXBARB3_InputFlexpwm1Pwm1OutTrig01 = 35|0x300U , kXBARB3_InputFlexpwm1Pwm2OutTrig01 = 36|0x300U , kXBARB3_InputFlexpwm1Pwm3OutTrig01 = 37|0x300U ,   kXBARB3_InputFlexpwm2Pwm0OutTrig01 = 38|0x300U , kXBARB3_InputFlexpwm2Pwm1OutTrig01 = 39|0x300U , kXBARB3_InputFlexpwm2Pwm2OutTrig01 = 40|0x300U , kXBARB3_InputFlexpwm2Pwm3OutTrig01 = 41|0x300U ,   kXBARB3_InputFlexpwm3Pwm0OutTrig01 = 42|0x300U , kXBARB3_InputFlexpwm3Pwm1OutTrig01 = 43|0x300U , kXBARB3_InputFlexpwm3Pwm2OutTrig01 = 44|0x300U , kXBARB3_InputFlexpwm3Pwm3OutTrig01 = 45|0x300U ,   kXBARB3_InputFlexpwm4Pwm0OutTrig01 = 46|0x300U , kXBARB3_InputFlexpwm4Pwm1OutTrig01 = 47|0x300U , kXBARB3_InputFlexpwm4Pwm2OutTrig01 = 48|0x300U , kXBARB3_InputFlexpwm4Pwm3OutTrig01 = 49|0x300U ,   kXBARB3_InputRESERVED50 = 50|0x300U , kXBARB3_InputRESERVED51 = 51|0x300U , kXBARB3_InputRESERVED52 = 52|0x300U , kXBARB3_InputRESERVED53 = 53|0x300U ,   kXBARB3_InputRESERVED54 = 54|0x300U , kXBARB3_InputRESERVED55 = 55|0x300U , kXBARB3_InputRESERVED56 = 56|0x300U , kXBARB3_InputRESERVED57 = 57|0x300U ,   kXBARB3_InputPit1Trigger0 = 58|0x300U , kXBARB3_InputPit1Trigger1 = 59|0x300U , kXBARB3_InputAdcEtc0Coco0 = 60|0x300U , kXBARB3_InputAdcEtc0Coco1 = 61|0x300U ,   kXBARB3_InputAdcEtc0Coco2 = 62|0x300U , kXBARB3_InputAdcEtc0Coco3 = 63|0x300U , kXBARB3_InputAdcEtc1Coco0 = 64|0x300U , kXBARB3_InputAdcEtc1Coco1 = 65|0x300U ,   kXBARB3_InputAdcEtc1Coco2 = 66|0x300U , kXBARB3_InputAdcEtc1Coco3 = 67|0x300U , kXBARB3_InputRESERVED68 = 68|0x300U , kXBARB3_InputRESERVED69 = 69|0x300U ,   kXBARB3_InputRESERVED70 = 70|0x300U , kXBARB3_InputRESERVED71 = 71|0x300U , kXBARB3_InputRESERVED72 = 72|0x300U , kXBARB3_InputRESERVED73 = 73|0x300U ,   kXBARB3_InputRESERVED74 = 74|0x300U , kXBARB3_InputRESERVED75 = 75|0x300U , kXBARB3_InputDec1PosMatch = 76|0x300U , kXBARB3_InputDec2PosMatch = 77|0x300U ,   kXBARB3_InputDec3PosMatch = 78|0x300U , kXBARB3_InputDec4PosMatch = 79|0x300U , kXBARB3_InputRESERVED80 = 80|0x300U , kXBARB3_InputRESERVED81 = 81|0x300U ,   kXBARB3_InputDmaDone0 = 82|0x300U , kXBARB3_InputDmaDone1 = 83|0x300U , kXBARB3_InputDmaDone2 = 84|0x300U , kXBARB3_InputDmaDone3 = 85|0x300U ,   kXBARB3_InputDmaDone4 = 86|0x300U , kXBARB3_InputDmaDone5 = 87|0x300U , kXBARB3_InputDmaDone6 = 88|0x300U , kXBARB3_InputDmaDone7 = 89|0x300U ,   kXBARB3_InputDmaLpsrDone0 = 90|0x300U , kXBARB3_InputDmaLpsrDone1 = 91|0x300U , kXBARB3_InputDmaLpsrDone2 = 92|0x300U , kXBARB3_InputDmaLpsrDone3 = 93|0x300U ,   kXBARB3_InputDmaLpsrDone4 = 94|0x300U , kXBARB3_InputDmaLpsrDone5 = 95|0x300U , kXBARB3_InputDmaLpsrDone6 = 96|0x300U , kXBARB3_InputDmaLpsrDone7 = 97|0x300U ,   kXBARA1_InputLogicLow = 0|0x100U , kXBARA1_InputLogicHigh = 1|0x100U , kXBARA1_InputRESERVED2 = 2|0x100U , kXBARA1_InputRESERVED3 = 3|0x100U ,   kXBARA1_InputIomuxXbarInout04 = 4|0x100U , kXBARA1_InputIomuxXbarInout05 = 5|0x100U , kXBARA1_InputIomuxXbarInout06 = 6|0x100U , kXBARA1_InputIomuxXbarInout07 = 7|0x100U ,   kXBARA1_InputIomuxXbarInout08 = 8|0x100U , kXBARA1_InputIomuxXbarInout09 = 9|0x100U , kXBARA1_InputIomuxXbarInout10 = 10|0x100U , kXBARA1_InputIomuxXbarInout11 = 11|0x100U ,   kXBARA1_InputIomuxXbarInout12 = 12|0x100U , kXBARA1_InputIomuxXbarInout13 = 13|0x100U , kXBARA1_InputIomuxXbarInout14 = 14|0x100U , kXBARA1_InputIomuxXbarInout15 = 15|0x100U ,   kXBARA1_InputIomuxXbarInout16 = 16|0x100U , kXBARA1_InputIomuxXbarInout17 = 17|0x100U , kXBARA1_InputIomuxXbarInout18 = 18|0x100U , kXBARA1_InputIomuxXbarInout19 = 19|0x100U ,   kXBARA1_InputIomuxXbarInout20 = 20|0x100U , kXBARA1_InputIomuxXbarInout21 = 21|0x100U , kXBARA1_InputIomuxXbarInout22 = 22|0x100U , kXBARA1_InputIomuxXbarInout23 = 23|0x100U ,   kXBARA1_InputIomuxXbarInout24 = 24|0x100U , kXBARA1_InputIomuxXbarInout25 = 25|0x100U , kXBARA1_InputIomuxXbarInout26 = 26|0x100U , kXBARA1_InputIomuxXbarInout27 = 27|0x100U ,   kXBARA1_InputIomuxXbarInout28 = 28|0x100U , kXBARA1_InputIomuxXbarInout29 = 29|0x100U , kXBARA1_InputIomuxXbarInout30 = 30|0x100U , kXBARA1_InputIomuxXbarInout31 = 31|0x100U ,   kXBARA1_InputIomuxXbarInout32 = 32|0x100U , kXBARA1_InputIomuxXbarInout33 = 33|0x100U , kXBARA1_InputIomuxXbarInout34 = 34|0x100U , kXBARA1_InputIomuxXbarInout35 = 35|0x100U ,   kXBARA1_InputIomuxXbarInout36 = 36|0x100U , kXBARA1_InputIomuxXbarInout37 = 37|0x100U , kXBARA1_InputIomuxXbarInout38 = 38|0x100U , kXBARA1_InputIomuxXbarInout39 = 39|0x100U ,   kXBARA1_InputIomuxXbarInout40 = 40|0x100U , kXBARA1_InputRESERVED41 = 41|0x100U , kXBARA1_InputAcmp1Out = 42|0x100U , kXBARA1_InputAcmp2Out = 43|0x100U ,   kXBARA1_InputAcmp3Out = 44|0x100U , kXBARA1_InputAcmp4Out = 45|0x100U , kXBARA1_InputRESERVED46 = 46|0x100U , kXBARA1_InputRESERVED47 = 47|0x100U ,   kXBARA1_InputRESERVED48 = 48|0x100U , kXBARA1_InputRESERVED49 = 49|0x100U , kXBARA1_InputQtimer1Timer0 = 50|0x100U , kXBARA1_InputQtimer1Timer1 = 51|0x100U ,   kXBARA1_InputQtimer1Timer2 = 52|0x100U , kXBARA1_InputQtimer1Timer3 = 53|0x100U , kXBARA1_InputQtimer2Timer0 = 54|0x100U , kXBARA1_InputQtimer2Timer1 = 55|0x100U ,   kXBARA1_InputQtimer2Timer2 = 56|0x100U , kXBARA1_InputQtimer2Timer3 = 57|0x100U , kXBARA1_InputQtimer3Timer0 = 58|0x100U , kXBARA1_InputQtimer3Timer1 = 59|0x100U ,   kXBARA1_InputQtimer3Timer2 = 60|0x100U , kXBARA1_InputQtimer3Timer3 = 61|0x100U , kXBARA1_InputQtimer4Timer0 = 62|0x100U , kXBARA1_InputQtimer4Timer1 = 63|0x100U ,   kXBARA1_InputQtimer4Timer2 = 64|0x100U , kXBARA1_InputQtimer4Timer3 = 65|0x100U , kXBARA1_InputRESERVED66 = 66|0x100U , kXBARA1_InputRESERVED67 = 67|0x100U ,   kXBARA1_InputRESERVED68 = 68|0x100U , kXBARA1_InputRESERVED69 = 69|0x100U , kXBARA1_InputRESERVED70 = 70|0x100U , kXBARA1_InputRESERVED71 = 71|0x100U ,   kXBARA1_InputRESERVED72 = 72|0x100U , kXBARA1_InputRESERVED73 = 73|0x100U , kXBARA1_InputFlexpwm1Pwm0OutTrig0 = 74|0x100U , kXBARA1_InputFlexpwm1Pwm0OutTrig1 = 75|0x100U ,   kXBARA1_InputFlexpwm1Pwm1OutTrig0 = 76|0x100U , kXBARA1_InputFlexpwm1Pwm1OutTrig1 = 77|0x100U , kXBARA1_InputFlexpwm1Pwm2OutTrig0 = 78|0x100U , kXBARA1_InputFlexpwm1Pwm2OutTrig1 = 79|0x100U ,   kXBARA1_InputFlexpwm1Pwm3OutTrig0 = 80|0x100U , kXBARA1_InputFlexpwm1Pwm3OutTrig1 = 81|0x100U , kXBARA1_InputFlexpwm2Pwm0OutTrig01 = 82|0x100U , kXBARA1_InputFlexpwm2Pwm1OutTrig01 = 83|0x100U ,   kXBARA1_InputFlexpwm2Pwm2OutTrig01 = 84|0x100U , kXBARA1_InputFlexpwm2Pwm3OutTrig01 = 85|0x100U , kXBARA1_InputFlexpwm3Pwm0OutTrig01 = 86|0x100U , kXBARA1_InputFlexpwm3Pwm1OutTrig01 = 87|0x100U ,   kXBARA1_InputFlexpwm3Pwm2OutTrig01 = 88|0x100U , kXBARA1_InputFlexpwm3Pwm3OutTrig01 = 89|0x100U , kXBARA1_InputFlexpwm4Pwm0OutTrig01 = 90|0x100U , kXBARA1_InputFlexpwm4Pwm1OutTrig01 = 91|0x100U ,   kXBARA1_InputFlexpwm4Pwm2OutTrig01 = 92|0x100U , kXBARA1_InputFlexpwm4Pwm3OutTrig01 = 93|0x100U , kXBARA1_InputRESERVED94 = 94|0x100U , kXBARA1_InputRESERVED95 = 95|0x100U ,   kXBARA1_InputRESERVED96 = 96|0x100U , kXBARA1_InputRESERVED97 = 97|0x100U , kXBARA1_InputRESERVED98 = 98|0x100U , kXBARA1_InputRESERVED99 = 99|0x100U ,   kXBARA1_InputRESERVED100 = 100|0x100U , kXBARA1_InputRESERVED101 = 101|0x100U , kXBARA1_InputPit1Trigger0 = 102|0x100U , kXBARA1_InputPit1Trigger1 = 103|0x100U ,   kXBARA1_InputPit1Trigger2 = 104|0x100U , kXBARA1_InputPit1Trigger3 = 105|0x100U , kXBARA1_InputDec1PosMatch = 106|0x100U , kXBARA1_InputDec2PosMatch = 107|0x100U ,   kXBARA1_InputDec3PosMatch = 108|0x100U , kXBARA1_InputDec4PosMatch = 109|0x100U , kXBARA1_InputRESERVED110 = 110|0x100U , kXBARA1_InputRESERVED111 = 111|0x100U ,   kXBARA1_InputDmaDone0 = 112|0x100U , kXBARA1_InputDmaDone1 = 113|0x100U , kXBARA1_InputDmaDone2 = 114|0x100U , kXBARA1_InputDmaDone3 = 115|0x100U ,   kXBARA1_InputDmaDone4 = 116|0x100U , kXBARA1_InputDmaDone5 = 117|0x100U , kXBARA1_InputDmaDone6 = 118|0x100U , kXBARA1_InputDmaDone7 = 119|0x100U ,   kXBARA1_InputDmaLpsrDone0 = 120|0x100U , kXBARA1_InputDmaLpsrDone1 = 121|0x100U , kXBARA1_InputDmaLpsrDone2 = 122|0x100U , kXBARA1_InputDmaLpsrDone3 = 123|0x100U ,   kXBARA1_InputDmaLpsrDone4 = 124|0x100U , kXBARA1_InputDmaLpsrDone5 = 125|0x100U , kXBARA1_InputDmaLpsrDone6 = 126|0x100U , kXBARA1_InputDmaLpsrDone7 = 127|0x100U ,   kXBARA1_InputAoi1Out0 = 128|0x100U , kXBARA1_InputAoi1Out1 = 129|0x100U , kXBARA1_InputAoi1Out2 = 130|0x100U , kXBARA1_InputAoi1Out3 = 131|0x100U ,   kXBARA1_InputAoi2Out0 = 132|0x100U , kXBARA1_InputAoi2Out1 = 133|0x100U , kXBARA1_InputAoi2Out2 = 134|0x100U , kXBARA1_InputAoi2Out3 = 135|0x100U ,   kXBARA1_InputAdcEtc0Coco0 = 136|0x100U , kXBARA1_InputAdcEtc0Coco1 = 137|0x100U , kXBARA1_InputAdcEtc0Coco2 = 138|0x100U , kXBARA1_InputAdcEtc0Coco3 = 139|0x100U ,   kXBARA1_InputAdcEtc1Coco0 = 140|0x100U , kXBARA1_InputAdcEtc1Coco1 = 141|0x100U , kXBARA1_InputAdcEtc1Coco2 = 142|0x100U , kXBARA1_InputAdcEtc1Coco3 = 143|0x100U ,   kXBARB2_InputLogicLow = 0|0x200U , kXBARB2_InputLogicHigh = 1|0x200U , kXBARB2_InputAcmp1Out = 2|0x200U , kXBARB2_InputAcmp2Out = 3|0x200U ,   kXBARB2_InputAcmp3Out = 4|0x200U , kXBARB2_InputAcmp4Out = 5|0x200U , kXBARB2_InputRESERVED6 = 6|0x200U , kXBARB2_InputRESERVED7 = 7|0x200U ,   kXBARB2_InputRESERVED8 = 8|0x200U , kXBARB2_InputRESERVED9 = 9|0x200U , kXBARB2_InputQtimer1Timer0 = 10|0x200U , kXBARB2_InputQtimer1Timer1 = 11|0x200U ,   kXBARB2_InputQtimer1Timer2 = 12|0x200U , kXBARB2_InputQtimer1Timer3 = 13|0x200U , kXBARB2_InputQtimer2Timer0 = 14|0x200U , kXBARB2_InputQtimer2Timer1 = 15|0x200U ,   kXBARB2_InputQtimer2Timer2 = 16|0x200U , kXBARB2_InputQtimer2Timer3 = 17|0x200U , kXBARB2_InputQtimer3Timer0 = 18|0x200U , kXBARB2_InputQtimer3Timer1 = 19|0x200U ,   kXBARB2_InputQtimer3Timer2 = 20|0x200U , kXBARB2_InputQtimer3Timer3 = 21|0x200U , kXBARB2_InputQtimer4Timer0 = 22|0x200U , kXBARB2_InputQtimer4Timer1 = 23|0x200U ,   kXBARB2_InputQtimer4Timer2 = 24|0x200U , kXBARB2_InputQtimer4Timer3 = 25|0x200U , kXBARB2_InputRESERVED26 = 26|0x200U , kXBARB2_InputRESERVED27 = 27|0x200U ,   kXBARB2_InputRESERVED28 = 28|0x200U , kXBARB2_InputRESERVED29 = 29|0x200U , kXBARB2_InputRESERVED30 = 30|0x200U , kXBARB2_InputRESERVED31 = 31|0x200U ,   kXBARB2_InputRESERVED32 = 32|0x200U , kXBARB2_InputRESERVED33 = 33|0x200U , kXBARB2_InputFlexpwm1Pwm0OutTrig01 = 34|0x200U , kXBARB2_InputFlexpwm1Pwm1OutTrig01 = 35|0x200U ,   kXBARB2_InputFlexpwm1Pwm2OutTrig01 = 36|0x200U , kXBARB2_InputFlexpwm1Pwm3OutTrig01 = 37|0x200U , kXBARB2_InputFlexpwm2Pwm0OutTrig01 = 38|0x200U , kXBARB2_InputFlexpwm2Pwm1OutTrig01 = 39|0x200U ,   kXBARB2_InputFlexpwm2Pwm2OutTrig01 = 40|0x200U , kXBARB2_InputFlexpwm2Pwm3OutTrig01 = 41|0x200U , kXBARB2_InputFlexpwm3Pwm0OutTrig01 = 42|0x200U , kXBARB2_InputFlexpwm3Pwm1OutTrig01 = 43|0x200U ,   kXBARB2_InputFlexpwm3Pwm2OutTrig01 = 44|0x200U , kXBARB2_InputFlexpwm3Pwm3OutTrig01 = 45|0x200U , kXBARB2_InputFlexpwm4Pwm0OutTrig01 = 46|0x200U , kXBARB2_InputFlexpwm4Pwm1OutTrig01 = 47|0x200U ,   kXBARB2_InputFlexpwm4Pwm2OutTrig01 = 48|0x200U , kXBARB2_InputFlexpwm4Pwm3OutTrig01 = 49|0x200U , kXBARB2_InputRESERVED50 = 50|0x200U , kXBARB2_InputRESERVED51 = 51|0x200U ,   kXBARB2_InputRESERVED52 = 52|0x200U , kXBARB2_InputRESERVED53 = 53|0x200U , kXBARB2_InputRESERVED54 = 54|0x200U , kXBARB2_InputRESERVED55 = 55|0x200U ,   kXBARB2_InputRESERVED56 = 56|0x200U , kXBARB2_InputRESERVED57 = 57|0x200U , kXBARB2_InputPit1Trigger0 = 58|0x200U , kXBARB2_InputPit1Trigger1 = 59|0x200U ,   kXBARB2_InputAdcEtc0Coco0 = 60|0x200U , kXBARB2_InputAdcEtc0Coco1 = 61|0x200U , kXBARB2_InputAdcEtc0Coco2 = 62|0x200U , kXBARB2_InputAdcEtc0Coco3 = 63|0x200U ,   kXBARB2_InputAdcEtc1Coco0 = 64|0x200U , kXBARB2_InputAdcEtc1Coco1 = 65|0x200U , kXBARB2_InputAdcEtc1Coco2 = 66|0x200U , kXBARB2_InputAdcEtc1Coco3 = 67|0x200U ,   kXBARB2_InputRESERVED68 = 68|0x200U , kXBARB2_InputRESERVED69 = 69|0x200U , kXBARB2_InputRESERVED70 = 70|0x200U , kXBARB2_InputRESERVED71 = 71|0x200U ,   kXBARB2_InputRESERVED72 = 72|0x200U , kXBARB2_InputRESERVED73 = 73|0x200U , kXBARB2_InputRESERVED74 = 74|0x200U , kXBARB2_InputRESERVED75 = 75|0x200U ,   kXBARB2_InputDec1PosMatch = 76|0x200U , kXBARB2_InputDec2PosMatch = 77|0x200U , kXBARB2_InputDec3PosMatch = 78|0x200U , kXBARB2_InputDec4PosMatch = 79|0x200U ,   kXBARB2_InputRESERVED80 = 80|0x200U , kXBARB2_InputRESERVED81 = 81|0x200U , kXBARB2_InputDmaDone0 = 82|0x200U , kXBARB2_InputDmaDone1 = 83|0x200U ,   kXBARB2_InputDmaDone2 = 84|0x200U , kXBARB2_InputDmaDone3 = 85|0x200U , kXBARB2_InputDmaDone4 = 86|0x200U , kXBARB2_InputDmaDone5 = 87|0x200U ,   kXBARB2_InputDmaDone6 = 88|0x200U , kXBARB2_InputDmaDone7 = 89|0x200U , kXBARB2_InputDmaLpsrDone0 = 90|0x200U , kXBARB2_InputDmaLpsrDone1 = 91|0x200U ,   kXBARB2_InputDmaLpsrDone2 = 92|0x200U , kXBARB2_InputDmaLpsrDone3 = 93|0x200U , kXBARB2_InputDmaLpsrDone4 = 94|0x200U , kXBARB2_InputDmaLpsrDone5 = 95|0x200U ,   kXBARB2_InputDmaLpsrDone6 = 96|0x200U , kXBARB2_InputDmaLpsrDone7 = 97|0x200U , kXBARB3_InputLogicLow = 0|0x300U , kXBARB3_InputLogicHigh = 1|0x300U ,   kXBARB3_InputAcmp1Out = 2|0x300U , kXBARB3_InputAcmp2Out = 3|0x300U , kXBARB3_InputAcmp3Out = 4|0x300U , kXBARB3_InputAcmp4Out = 5|0x300U ,   kXBARB3_InputRESERVED6 = 6|0x300U , kXBARB3_InputRESERVED7 = 7|0x300U , kXBARB3_InputRESERVED8 = 8|0x300U , kXBARB3_InputRESERVED9 = 9|0x300U ,   kXBARB3_InputQtimer1Timer0 = 10|0x300U , kXBARB3_InputQtimer1Timer1 = 11|0x300U , kXBARB3_InputQtimer1Timer2 = 12|0x300U , kXBARB3_InputQtimer1Timer3 = 13|0x300U ,   kXBARB3_InputQtimer2Timer0 = 14|0x300U , kXBARB3_InputQtimer2Timer1 = 15|0x300U , kXBARB3_InputQtimer2Timer2 = 16|0x300U , kXBARB3_InputQtimer2Timer3 = 17|0x300U ,   kXBARB3_InputQtimer3Timer0 = 18|0x300U , kXBARB3_InputQtimer3Timer1 = 19|0x300U , kXBARB3_InputQtimer3Timer2 = 20|0x300U , kXBARB3_InputQtimer3Timer3 = 21|0x300U ,   kXBARB3_InputQtimer4Timer0 = 22|0x300U , kXBARB3_InputQtimer4Timer1 = 23|0x300U , kXBARB3_InputQtimer4Timer2 = 24|0x300U , kXBARB3_InputQtimer4Timer3 = 25|0x300U ,   kXBARB3_InputRESERVED26 = 26|0x300U , kXBARB3_InputRESERVED27 = 27|0x300U , kXBARB3_InputRESERVED28 = 28|0x300U , kXBARB3_InputRESERVED29 = 29|0x300U ,   kXBARB3_InputRESERVED30 = 30|0x300U , kXBARB3_InputRESERVED31 = 31|0x300U , kXBARB3_InputRESERVED32 = 32|0x300U , kXBARB3_InputRESERVED33 = 33|0x300U ,   kXBARB3_InputFlexpwm1Pwm0OutTrig01 = 34|0x300U , kXBARB3_InputFlexpwm1Pwm1OutTrig01 = 35|0x300U , kXBARB3_InputFlexpwm1Pwm2OutTrig01 = 36|0x300U , kXBARB3_InputFlexpwm1Pwm3OutTrig01 = 37|0x300U ,   kXBARB3_InputFlexpwm2Pwm0OutTrig01 = 38|0x300U , kXBARB3_InputFlexpwm2Pwm1OutTrig01 = 39|0x300U , kXBARB3_InputFlexpwm2Pwm2OutTrig01 = 40|0x300U , kXBARB3_InputFlexpwm2Pwm3OutTrig01 = 41|0x300U ,   kXBARB3_InputFlexpwm3Pwm0OutTrig01 = 42|0x300U , kXBARB3_InputFlexpwm3Pwm1OutTrig01 = 43|0x300U , kXBARB3_InputFlexpwm3Pwm2OutTrig01 = 44|0x300U , kXBARB3_InputFlexpwm3Pwm3OutTrig01 = 45|0x300U ,   kXBARB3_InputFlexpwm4Pwm0OutTrig01 = 46|0x300U , kXBARB3_InputFlexpwm4Pwm1OutTrig01 = 47|0x300U , kXBARB3_InputFlexpwm4Pwm2OutTrig01 = 48|0x300U , kXBARB3_InputFlexpwm4Pwm3OutTrig01 = 49|0x300U ,   kXBARB3_InputRESERVED50 = 50|0x300U , kXBARB3_InputRESERVED51 = 51|0x300U , kXBARB3_InputRESERVED52 = 52|0x300U , kXBARB3_InputRESERVED53 = 53|0x300U ,   kXBARB3_InputRESERVED54 = 54|0x300U , kXBARB3_InputRESERVED55 = 55|0x300U , kXBARB3_InputRESERVED56 = 56|0x300U , kXBARB3_InputRESERVED57 = 57|0x300U ,   kXBARB3_InputPit1Trigger0 = 58|0x300U , kXBARB3_InputPit1Trigger1 = 59|0x300U , kXBARB3_InputAdcEtc0Coco0 = 60|0x300U , kXBARB3_InputAdcEtc0Coco1 = 61|0x300U ,   kXBARB3_InputAdcEtc0Coco2 = 62|0x300U , kXBARB3_InputAdcEtc0Coco3 = 63|0x300U , kXBARB3_InputAdcEtc1Coco0 = 64|0x300U , kXBARB3_InputAdcEtc1Coco1 = 65|0x300U ,   kXBARB3_InputAdcEtc1Coco2 = 66|0x300U , kXBARB3_InputAdcEtc1Coco3 = 67|0x300U , kXBARB3_InputRESERVED68 = 68|0x300U , kXBARB3_InputRESERVED69 = 69|0x300U ,   kXBARB3_InputRESERVED70 = 70|0x300U , kXBARB3_InputRESERVED71 = 71|0x300U , kXBARB3_InputRESERVED72 = 72|0x300U , kXBARB3_InputRESERVED73 = 73|0x300U ,   kXBARB3_InputRESERVED74 = 74|0x300U , kXBARB3_InputRESERVED75 = 75|0x300U , kXBARB3_InputDec1PosMatch = 76|0x300U , kXBARB3_InputDec2PosMatch = 77|0x300U ,   kXBARB3_InputDec3PosMatch = 78|0x300U , kXBARB3_InputDec4PosMatch = 79|0x300U , kXBARB3_InputRESERVED80 = 80|0x300U , kXBARB3_InputRESERVED81 = 81|0x300U ,   kXBARB3_InputDmaDone0 = 82|0x300U , kXBARB3_InputDmaDone1 = 83|0x300U , kXBARB3_InputDmaDone2 = 84|0x300U , kXBARB3_InputDmaDone3 = 85|0x300U ,   kXBARB3_InputDmaDone4 = 86|0x300U , kXBARB3_InputDmaDone5 = 87|0x300U , kXBARB3_InputDmaDone6 = 88|0x300U , kXBARB3_InputDmaDone7 = 89|0x300U ,   kXBARB3_InputDmaLpsrDone0 = 90|0x300U , kXBARB3_InputDmaLpsrDone1 = 91|0x300U , kXBARB3_InputDmaLpsrDone2 = 92|0x300U , kXBARB3_InputDmaLpsrDone3 = 93|0x300U ,   kXBARB3_InputDmaLpsrDone4 = 94|0x300U , kXBARB3_InputDmaLpsrDone5 = 95|0x300U , kXBARB3_InputDmaLpsrDone6 = 96|0x300U , kXBARB3_InputDmaLpsrDone7 = 97|0x300U }
enum	_xbar_output_signal {   kXBARA1_OutputDmaChMuxReq30 = 0|0x100U , kXBARA1_OutputDmaChMuxReq31 = 1|0x100U , kXBARA1_OutputDmaChMuxReq94 = 2|0x100U , kXBARA1_OutputDmaChMuxReq95 = 3|0x100U ,   kXBARA1_OutputIomuxXbarInout04 = 4|0x100U , kXBARA1_OutputIomuxXbarInout05 = 5|0x100U , kXBARA1_OutputIomuxXbarInout06 = 6|0x100U , kXBARA1_OutputIomuxXbarInout07 = 7|0x100U ,   kXBARA1_OutputIomuxXbarInout08 = 8|0x100U , kXBARA1_OutputIomuxXbarInout09 = 9|0x100U , kXBARA1_OutputIomuxXbarInout10 = 10|0x100U , kXBARA1_OutputIomuxXbarInout11 = 11|0x100U ,   kXBARA1_OutputIomuxXbarInout12 = 12|0x100U , kXBARA1_OutputIomuxXbarInout13 = 13|0x100U , kXBARA1_OutputIomuxXbarInout14 = 14|0x100U , kXBARA1_OutputIomuxXbarInout15 = 15|0x100U ,   kXBARA1_OutputIomuxXbarInout16 = 16|0x100U , kXBARA1_OutputIomuxXbarInout17 = 17|0x100U , kXBARA1_OutputIomuxXbarInout18 = 18|0x100U , kXBARA1_OutputIomuxXbarInout19 = 19|0x100U ,   kXBARA1_OutputAcmp1Sample = 20|0x100U , kXBARA1_OutputAcmp2Sample = 21|0x100U , kXBARA1_OutputAcmp3Sample = 22|0x100U , kXBARA1_OutputAcmp4Sample = 23|0x100U ,   kXBARA1_OutputRESERVED24 = 24|0x100U , kXBARA1_OutputRESERVED25 = 25|0x100U , kXBARA1_OutputFlexpwm1Exta0 = 26|0x100U , kXBARA1_OutputFlexpwm1Exta1 = 27|0x100U ,   kXBARA1_OutputFlexpwm1Exta2 = 28|0x100U , kXBARA1_OutputFlexpwm1Exta3 = 29|0x100U , kXBARA1_OutputFlexpwm1ExtSync0 = 30|0x100U , kXBARA1_OutputFlexpwm1ExtSync1 = 31|0x100U ,   kXBARA1_OutputFlexpwm1ExtSync2 = 32|0x100U , kXBARA1_OutputFlexpwm1ExtSync3 = 33|0x100U , kXBARA1_OutputFlexpwm1ExtClk = 34|0x100U , kXBARA1_OutputFlexpwm1Fault0 = 35|0x100U ,   kXBARA1_OutputFlexpwm1Fault1 = 36|0x100U , kXBARA1_OutputFlexpwm1234Fault2 = 37|0x100U , kXBARA1_OutputFlexpwm1234Fault3 = 38|0x100U , kXBARA1_OutputFlexpwm1ExtForce = 39|0x100U ,   kXBARA1_OutputFlexpwm234Exta0 = 40|0x100U , kXBARA1_OutputFlexpwm234Exta1 = 41|0x100U , kXBARA1_OutputFlexpwm234Exta2 = 42|0x100U , kXBARA1_OutputFlexpwm234Exta3 = 43|0x100U ,   kXBARA1_OutputFlexpwm2ExtSync0 = 44|0x100U , kXBARA1_OutputFlexpwm2ExtSync1 = 45|0x100U , kXBARA1_OutputFlexpwm2ExtSync2 = 46|0x100U , kXBARA1_OutputFlexpwm2ExtSync3 = 47|0x100U ,   kXBARA1_OutputFlexpwm234ExtClk = 48|0x100U , kXBARA1_OutputFlexpwm2Fault0 = 49|0x100U , kXBARA1_OutputFlexpwm2Fault1 = 50|0x100U , kXBARA1_OutputFlexpwm2ExtForce = 51|0x100U ,   kXBARA1_OutputFlexpwm3ExtSync0 = 52|0x100U , kXBARA1_OutputFlexpwm3ExtSync1 = 53|0x100U , kXBARA1_OutputFlexpwm3ExtSync2 = 54|0x100U , kXBARA1_OutputFlexpwm3ExtSync3 = 55|0x100U ,   kXBARA1_OutputFlexpwm3Fault0 = 56|0x100U , kXBARA1_OutputFlexpwm3Fault1 = 57|0x100U , kXBARA1_OutputFlexpwm3ExtForce = 58|0x100U , kXBARA1_OutputFlexpwm4ExtSync0 = 59|0x100U ,   kXBARA1_OutputFlexpwm4ExtSync1 = 60|0x100U , kXBARA1_OutputFlexpwm4ExtSync2 = 61|0x100U , kXBARA1_OutputFlexpwm4ExtSync3 = 62|0x100U , kXBARA1_OutputFlexpwm4Fault0 = 63|0x100U ,   kXBARA1_OutputFlexpwm4Fault1 = 64|0x100U , kXBARA1_OutputFlexpwm4ExtForce = 65|0x100U , kXBARA1_OutputEnc1PhaseAInput = 66|0x100U , kXBARA1_OutputEnc1PhaseBInput = 67|0x100U ,   kXBARA1_OutputEnc1Index = 68|0x100U , kXBARA1_OutputEnc1Home = 69|0x100U , kXBARA1_OutputEnc1Trigger = 70|0x100U , kXBARA1_OutputEnc2PhaseAInput = 71|0x100U ,   kXBARA1_OutputEnc2PhaseBInput = 72|0x100U , kXBARA1_OutputEnc2Index = 73|0x100U , kXBARA1_OutputEnc2Home = 74|0x100U , kXBARA1_OutputEnc2Trigger = 75|0x100U ,   kXBARA1_OutputEnc3PhaseAInput = 76|0x100U , kXBARA1_OutputEnc3PhaseBInput = 77|0x100U , kXBARA1_OutputEnc3Index = 78|0x100U , kXBARA1_OutputEnc3Home = 79|0x100U ,   kXBARA1_OutputEnc3Trigger = 80|0x100U , kXBARA1_OutputEnc4PhaseAInput = 81|0x100U , kXBARA1_OutputEnc4PhaseBInput = 82|0x100U , kXBARA1_OutputEnc4Index = 83|0x100U ,   kXBARA1_OutputEnc4Home = 84|0x100U , kXBARA1_OutputEnc4Trigger = 85|0x100U , kXBARA1_OutputQtimer1Tmr0Input = 86|0x100U , kXBARA1_OutputQtimer1Tmr1Input = 87|0x100U ,   kXBARA1_OutputQtimer1Tmr2Input = 88|0x100U , kXBARA1_OutputQtimer1Tmr3Input = 89|0x100U , kXBARA1_OutputQtimer2Tmr0Input = 90|0x100U , kXBARA1_OutputQtimer2Tmr1Input = 91|0x100U ,   kXBARA1_OutputQtimer2Tmr2Input = 92|0x100U , kXBARA1_OutputQtimer2Tmr3Input = 93|0x100U , kXBARA1_OutputQtimer3Tmr0Input = 94|0x100U , kXBARA1_OutputQtimer3Tmr1Input = 95|0x100U ,   kXBARA1_OutputQtimer3Tmr2Input = 96|0x100U , kXBARA1_OutputQtimer3Tmr3Input = 97|0x100U , kXBARA1_OutputQtimer4Tmr0Input = 98|0x100U , kXBARA1_OutputQtimer4Tmr1Input = 99|0x100U ,   kXBARA1_OutputQtimer4Tmr2Input = 100|0x100U , kXBARA1_OutputQtimer4Tmr3Input = 101|0x100U , kXBARA1_OutputEwmEwmIn = 102|0x100U , kXBARA1_OutputAdcEtcXbar0Trig0 = 103|0x100U ,   kXBARA1_OutputAdcEtcXbar0Trig1 = 104|0x100U , kXBARA1_OutputAdcEtcXbar0Trig2 = 105|0x100U , kXBARA1_OutputAdcEtcXbar0Trig3 = 106|0x100U , kXBARA1_OutputAdcEtcXbar1Trig0 = 107|0x100U ,   kXBARA1_OutputAdcEtcXbar1Trig1 = 108|0x100U , kXBARA1_OutputAdcEtcXbar1Trig2 = 109|0x100U , kXBARA1_OutputAdcEtcXbar1Trig3 = 110|0x100U , kXBARA1_OutputLpi2c1TrgInput = 111|0x100U ,   kXBARA1_OutputLpi2c2TrgInput = 112|0x100U , kXBARA1_OutputLpi2c3TrgInput = 113|0x100U , kXBARA1_OutputLpi2c4TrgInput = 114|0x100U , kXBARA1_OutputLpspi1TrgInput = 115|0x100U ,   kXBARA1_OutputLpspi2TrgInput = 116|0x100U , kXBARA1_OutputLpspi3TrgInput = 117|0x100U , kXBARA1_OutputLpspi4TrgInput = 118|0x100U , kXBARA1_OutputLpuart1TrgInput = 119|0x100U ,   kXBARA1_OutputLpuart2TrgInput = 120|0x100U , kXBARA1_OutputLpuart3TrgInput = 121|0x100U , kXBARA1_OutputLpuart4TrgInput = 122|0x100U , kXBARA1_OutputLpuart5TrgInput = 123|0x100U ,   kXBARA1_OutputLpuart6TrgInput = 124|0x100U , kXBARA1_OutputLpuart7TrgInput = 125|0x100U , kXBARA1_OutputLpuart8TrgInput = 126|0x100U , kXBARA1_OutputFlexio1TriggerIn0 = 127|0x100U ,   kXBARA1_OutputFlexio1TriggerIn1 = 128|0x100U , kXBARA1_OutputFlexio2TriggerIn0 = 129|0x100U , kXBARA1_OutputFlexio2TriggerIn1 = 130|0x100U , kXBARB2_OutputAoi1In00 = 0|0x200U ,   kXBARB2_OutputAoi1In01 = 1|0x200U , kXBARB2_OutputAoi1In02 = 2|0x200U , kXBARB2_OutputAoi1In03 = 3|0x200U , kXBARB2_OutputAoi1In04 = 4|0x200U ,   kXBARB2_OutputAoi1In05 = 5|0x200U , kXBARB2_OutputAoi1In06 = 6|0x200U , kXBARB2_OutputAoi1In07 = 7|0x200U , kXBARB2_OutputAoi1In08 = 8|0x200U ,   kXBARB2_OutputAoi1In09 = 9|0x200U , kXBARB2_OutputAoi1In10 = 10|0x200U , kXBARB2_OutputAoi1In11 = 11|0x200U , kXBARB2_OutputAoi1In12 = 12|0x200U ,   kXBARB2_OutputAoi1In13 = 13|0x200U , kXBARB2_OutputAoi1In14 = 14|0x200U , kXBARB2_OutputAoi1In15 = 15|0x200U , kXBARB3_OutputAoi2In00 = 0|0x300U ,   kXBARB3_OutputAoi2In01 = 1|0x300U , kXBARB3_OutputAoi2In02 = 2|0x300U , kXBARB3_OutputAoi2In03 = 3|0x300U , kXBARB3_OutputAoi2In04 = 4|0x300U ,   kXBARB3_OutputAoi2In05 = 5|0x300U , kXBARB3_OutputAoi2In06 = 6|0x300U , kXBARB3_OutputAoi2In07 = 7|0x300U , kXBARB3_OutputAoi2In08 = 8|0x300U ,   kXBARB3_OutputAoi2In09 = 9|0x300U , kXBARB3_OutputAoi2In10 = 10|0x300U , kXBARB3_OutputAoi2In11 = 11|0x300U , kXBARB3_OutputAoi2In12 = 12|0x300U ,   kXBARB3_OutputAoi2In13 = 13|0x300U , kXBARB3_OutputAoi2In14 = 14|0x300U , kXBARB3_OutputAoi2In15 = 15|0x300U , kXBARA1_OutputDmaChMuxReq81 = 0|0x100U ,   kXBARA1_OutputDmaChMuxReq82 = 1|0x100U , kXBARA1_OutputDmaChMuxReq83 = 2|0x100U , kXBARA1_OutputDmaChMuxReq84 = 3|0x100U , kXBARA1_OutputIomuxXbarInout04 = 4|0x100U ,   kXBARA1_OutputIomuxXbarInout05 = 5|0x100U , kXBARA1_OutputIomuxXbarInout06 = 6|0x100U , kXBARA1_OutputIomuxXbarInout07 = 7|0x100U , kXBARA1_OutputIomuxXbarInout08 = 8|0x100U ,   kXBARA1_OutputIomuxXbarInout09 = 9|0x100U , kXBARA1_OutputIomuxXbarInout10 = 10|0x100U , kXBARA1_OutputIomuxXbarInout11 = 11|0x100U , kXBARA1_OutputIomuxXbarInout12 = 12|0x100U ,   kXBARA1_OutputIomuxXbarInout13 = 13|0x100U , kXBARA1_OutputIomuxXbarInout14 = 14|0x100U , kXBARA1_OutputIomuxXbarInout15 = 15|0x100U , kXBARA1_OutputIomuxXbarInout16 = 16|0x100U ,   kXBARA1_OutputIomuxXbarInout17 = 17|0x100U , kXBARA1_OutputIomuxXbarInout18 = 18|0x100U , kXBARA1_OutputIomuxXbarInout19 = 19|0x100U , kXBARA1_OutputIomuxXbarInout20 = 20|0x100U ,   kXBARA1_OutputIomuxXbarInout21 = 21|0x100U , kXBARA1_OutputIomuxXbarInout22 = 22|0x100U , kXBARA1_OutputIomuxXbarInout23 = 23|0x100U , kXBARA1_OutputIomuxXbarInout24 = 24|0x100U ,   kXBARA1_OutputIomuxXbarInout25 = 25|0x100U , kXBARA1_OutputIomuxXbarInout26 = 26|0x100U , kXBARA1_OutputIomuxXbarInout27 = 27|0x100U , kXBARA1_OutputIomuxXbarInout28 = 28|0x100U ,   kXBARA1_OutputIomuxXbarInout29 = 29|0x100U , kXBARA1_OutputIomuxXbarInout30 = 30|0x100U , kXBARA1_OutputIomuxXbarInout31 = 31|0x100U , kXBARA1_OutputIomuxXbarInout32 = 32|0x100U ,   kXBARA1_OutputIomuxXbarInout33 = 33|0x100U , kXBARA1_OutputIomuxXbarInout34 = 34|0x100U , kXBARA1_OutputIomuxXbarInout35 = 35|0x100U , kXBARA1_OutputIomuxXbarInout36 = 36|0x100U ,   kXBARA1_OutputIomuxXbarInout37 = 37|0x100U , kXBARA1_OutputIomuxXbarInout38 = 38|0x100U , kXBARA1_OutputIomuxXbarInout39 = 39|0x100U , kXBARA1_OutputIomuxXbarInout40 = 40|0x100U ,   kXBARA1_OutputAcmp1Sample = 41|0x100U , kXBARA1_OutputAcmp2Sample = 42|0x100U , kXBARA1_OutputAcmp3Sample = 43|0x100U , kXBARA1_OutputAcmp4Sample = 44|0x100U ,   kXBARA1_OutputRESERVED45 = 45|0x100U , kXBARA1_OutputRESERVED46 = 46|0x100U , kXBARA1_OutputRESERVED47 = 47|0x100U , kXBARA1_OutputRESERVED48 = 48|0x100U ,   kXBARA1_OutputFlexpwm1Pwm0Exta = 49|0x100U , kXBARA1_OutputFlexpwm1Pwm1Exta = 50|0x100U , kXBARA1_OutputFlexpwm1Pwm2Exta = 51|0x100U , kXBARA1_OutputFlexpwm1Pwm3Exta = 52|0x100U ,   kXBARA1_OutputFlexpwm1Pwm0ExtSync = 53|0x100U , kXBARA1_OutputFlexpwm1Pwm1ExtSync = 54|0x100U , kXBARA1_OutputFlexpwm1Pwm2ExtSync = 55|0x100U , kXBARA1_OutputFlexpwm1Pwm3ExtSync = 56|0x100U ,   kXBARA1_OutputFlexpwm1ExtClk = 57|0x100U , kXBARA1_OutputFlexpwm1Fault0 = 58|0x100U , kXBARA1_OutputFlexpwm1Fault1 = 59|0x100U , kXBARA1_OutputFlexpwm1234Fault2 = 60|0x100U ,   kXBARA1_OutputFlexpwm1234Fault3 = 61|0x100U , kXBARA1_OutputFlexpwm1ExtForce = 62|0x100U , kXBARA1_OutputFlexpwm2Pwm0Exta = 63|0x100U , kXBARA1_OutputFlexpwm2Pwm1Exta = 64|0x100U ,   kXBARA1_OutputFlexpwm2Pwm2Exta = 65|0x100U , kXBARA1_OutputFlexpwm2Pwm3Exta = 66|0x100U , kXBARA1_OutputFlexpwm2Pwm0ExtSync = 67|0x100U , kXBARA1_OutputFlexpwm2Pwm1ExtSync = 68|0x100U ,   kXBARA1_OutputFlexpwm2Pwm2ExtSync = 69|0x100U , kXBARA1_OutputFlexpwm2Pwm3ExtSync = 70|0x100U , kXBARA1_OutputFlexpwm2ExtClk = 71|0x100U , kXBARA1_OutputFlexpwm2Fault0 = 72|0x100U ,   kXBARA1_OutputFlexpwm2Fault1 = 73|0x100U , kXBARA1_OutputFlexpwm2ExtForce = 74|0x100U , kXBARA1_OutputFlexpwm34Pwm0Exta = 75|0x100U , kXBARA1_OutputFlexpwm34Pwm1Exta = 76|0x100U ,   kXBARA1_OutputFlexpwm34Pwm2Exta = 77|0x100U , kXBARA1_OutputFlexpwm34Pwm3Exta = 78|0x100U , kXBARA1_OutputFlexpwm34ExtClk = 79|0x100U , kXBARA1_OutputFlexpwm3Pwm0ExtSync = 80|0x100U ,   kXBARA1_OutputFlexpwm3Pwm1ExtSync = 81|0x100U , kXBARA1_OutputFlexpwm3Pwm2ExtSync = 82|0x100U , kXBARA1_OutputFlexpwm3Pwm3ExtSync = 83|0x100U , kXBARA1_OutputFlexpwm3Fault0 = 84|0x100U ,   kXBARA1_OutputFlexpwm3Fault1 = 85|0x100U , kXBARA1_OutputFlexpwm3ExtForce = 86|0x100U , kXBARA1_OutputFlexpwm4Pwm0ExtSync = 87|0x100U , kXBARA1_OutputFlexpwm4Pwm1ExtSync = 88|0x100U ,   kXBARA1_OutputFlexpwm4Pwm2ExtSync = 89|0x100U , kXBARA1_OutputFlexpwm4Pwm3ExtSync = 90|0x100U , kXBARA1_OutputFlexpwm4Fault0 = 91|0x100U , kXBARA1_OutputFlexpwm4Fault1 = 92|0x100U ,   kXBARA1_OutputFlexpwm4ExtForce = 93|0x100U , kXBARA1_OutputRESERVED94 = 94|0x100U , kXBARA1_OutputRESERVED95 = 95|0x100U , kXBARA1_OutputRESERVED96 = 96|0x100U ,   kXBARA1_OutputRESERVED97 = 97|0x100U , kXBARA1_OutputRESERVED98 = 98|0x100U , kXBARA1_OutputRESERVED99 = 99|0x100U , kXBARA1_OutputRESERVED100 = 100|0x100U ,   kXBARA1_OutputRESERVED101 = 101|0x100U , kXBARA1_OutputRESERVED102 = 102|0x100U , kXBARA1_OutputRESERVED103 = 103|0x100U , kXBARA1_OutputRESERVED104 = 104|0x100U ,   kXBARA1_OutputRESERVED105 = 105|0x100U , kXBARA1_OutputRESERVED106 = 106|0x100U , kXBARA1_OutputRESERVED107 = 107|0x100U , kXBARA1_OutputDec1Phasea = 108|0x100U ,   kXBARA1_OutputDec1Phaseb = 109|0x100U , kXBARA1_OutputDec1Index = 110|0x100U , kXBARA1_OutputDec1Home = 111|0x100U , kXBARA1_OutputDec1Trigger = 112|0x100U ,   kXBARA1_OutputDec2Phasea = 113|0x100U , kXBARA1_OutputDec2Phaseb = 114|0x100U , kXBARA1_OutputDec2Index = 115|0x100U , kXBARA1_OutputDec2Home = 116|0x100U ,   kXBARA1_OutputDec2Trigger = 117|0x100U , kXBARA1_OutputDec3Phasea = 118|0x100U , kXBARA1_OutputDec3Phaseb = 119|0x100U , kXBARA1_OutputDec3Index = 120|0x100U ,   kXBARA1_OutputDec3Home = 121|0x100U , kXBARA1_OutputDec3Trigger = 122|0x100U , kXBARA1_OutputDec4Phasea = 123|0x100U , kXBARA1_OutputDec4Phaseb = 124|0x100U ,   kXBARA1_OutputDec4Index = 125|0x100U , kXBARA1_OutputDec4Home = 126|0x100U , kXBARA1_OutputDec4Trigger = 127|0x100U , kXBARA1_OutputRESERVED128 = 128|0x100U ,   kXBARA1_OutputRESERVED129 = 129|0x100U , kXBARA1_OutputRESERVED130 = 130|0x100U , kXBARA1_OutputRESERVED131 = 131|0x100U , kXBARA1_OutputCan1 = 132|0x100U ,   kXBARA1_OutputCan2 = 133|0x100U , kXBARA1_OutputRESERVED134 = 134|0x100U , kXBARA1_OutputRESERVED135 = 135|0x100U , kXBARA1_OutputRESERVED136 = 136|0x100U ,   kXBARA1_OutputRESERVED137 = 137|0x100U , kXBARA1_OutputQtimer1Timer0 = 138|0x100U , kXBARA1_OutputQtimer1Timer1 = 139|0x100U , kXBARA1_OutputQtimer1Timer2 = 140|0x100U ,   kXBARA1_OutputQtimer1Timer3 = 141|0x100U , kXBARA1_OutputQtimer2Timer0 = 142|0x100U , kXBARA1_OutputQtimer2Timer1 = 143|0x100U , kXBARA1_OutputQtimer2Timer2 = 144|0x100U ,   kXBARA1_OutputQtimer2Timer3 = 145|0x100U , kXBARA1_OutputQtimer3Timer0 = 146|0x100U , kXBARA1_OutputQtimer3Timer1 = 147|0x100U , kXBARA1_OutputQtimer3Timer2 = 148|0x100U ,   kXBARA1_OutputQtimer3Timer3 = 149|0x100U , kXBARA1_OutputQtimer4Timer0 = 150|0x100U , kXBARA1_OutputQtimer4Timer1 = 151|0x100U , kXBARA1_OutputQtimer4Timer2 = 152|0x100U ,   kXBARA1_OutputQtimer4Timer3 = 153|0x100U , kXBARA1_OutputEwmEwmIn = 154|0x100U , kXBARA1_OutputAdcEtc0Coco0 = 155|0x100U , kXBARA1_OutputAdcEtc0Coco1 = 156|0x100U ,   kXBARA1_OutputAdcEtc0Coco2 = 157|0x100U , kXBARA1_OutputAdcEtc0Coco3 = 158|0x100U , kXBARA1_OutputAdcEtc1Coco0 = 159|0x100U , kXBARA1_OutputAdcEtc1Coco1 = 160|0x100U ,   kXBARA1_OutputAdcEtc1Coco2 = 161|0x100U , kXBARA1_OutputAdcEtc1Coco3 = 162|0x100U , kXBARA1_OutputRESERVED163 = 163|0x100U , kXBARA1_OutputRESERVED164 = 164|0x100U ,   kXBARA1_OutputRESERVED165 = 165|0x100U , kXBARA1_OutputRESERVED166 = 166|0x100U , kXBARA1_OutputRESERVED167 = 167|0x100U , kXBARA1_OutputRESERVED168 = 168|0x100U ,   kXBARA1_OutputRESERVED169 = 169|0x100U , kXBARA1_OutputRESERVED170 = 170|0x100U , kXBARA1_OutputFlexio1TrigIn0 = 171|0x100U , kXBARA1_OutputFlexio1TrigIn1 = 172|0x100U ,   kXBARA1_OutputFlexio2TrigIn0 = 173|0x100U , kXBARA1_OutputFlexio2TrigIn1 = 174|0x100U , kXBARB2_OutputAoi1In00 = 0|0x200U , kXBARB2_OutputAoi1In01 = 1|0x200U ,   kXBARB2_OutputAoi1In02 = 2|0x200U , kXBARB2_OutputAoi1In03 = 3|0x200U , kXBARB2_OutputAoi1In04 = 4|0x200U , kXBARB2_OutputAoi1In05 = 5|0x200U ,   kXBARB2_OutputAoi1In06 = 6|0x200U , kXBARB2_OutputAoi1In07 = 7|0x200U , kXBARB2_OutputAoi1In08 = 8|0x200U , kXBARB2_OutputAoi1In09 = 9|0x200U ,   kXBARB2_OutputAoi1In10 = 10|0x200U , kXBARB2_OutputAoi1In11 = 11|0x200U , kXBARB2_OutputAoi1In12 = 12|0x200U , kXBARB2_OutputAoi1In13 = 13|0x200U ,   kXBARB2_OutputAoi1In14 = 14|0x200U , kXBARB2_OutputAoi1In15 = 15|0x200U , kXBARB3_OutputAoi2In00 = 0|0x300U , kXBARB3_OutputAoi2In01 = 1|0x300U ,   kXBARB3_OutputAoi2In02 = 2|0x300U , kXBARB3_OutputAoi2In03 = 3|0x300U , kXBARB3_OutputAoi2In04 = 4|0x300U , kXBARB3_OutputAoi2In05 = 5|0x300U ,   kXBARB3_OutputAoi2In06 = 6|0x300U , kXBARB3_OutputAoi2In07 = 7|0x300U , kXBARB3_OutputAoi2In08 = 8|0x300U , kXBARB3_OutputAoi2In09 = 9|0x300U ,   kXBARB3_OutputAoi2In10 = 10|0x300U , kXBARB3_OutputAoi2In11 = 11|0x300U , kXBARB3_OutputAoi2In12 = 12|0x300U , kXBARB3_OutputAoi2In13 = 13|0x300U ,   kXBARB3_OutputAoi2In14 = 14|0x300U , kXBARB3_OutputAoi2In15 = 15|0x300U , kXBARA1_OutputDmaChMuxReq81 = 0|0x100U , kXBARA1_OutputDmaChMuxReq82 = 1|0x100U ,   kXBARA1_OutputDmaChMuxReq83 = 2|0x100U , kXBARA1_OutputDmaChMuxReq84 = 3|0x100U , kXBARA1_OutputIomuxXbarInout04 = 4|0x100U , kXBARA1_OutputIomuxXbarInout05 = 5|0x100U ,   kXBARA1_OutputIomuxXbarInout06 = 6|0x100U , kXBARA1_OutputIomuxXbarInout07 = 7|0x100U , kXBARA1_OutputIomuxXbarInout08 = 8|0x100U , kXBARA1_OutputIomuxXbarInout09 = 9|0x100U ,   kXBARA1_OutputIomuxXbarInout10 = 10|0x100U , kXBARA1_OutputIomuxXbarInout11 = 11|0x100U , kXBARA1_OutputIomuxXbarInout12 = 12|0x100U , kXBARA1_OutputIomuxXbarInout13 = 13|0x100U ,   kXBARA1_OutputIomuxXbarInout14 = 14|0x100U , kXBARA1_OutputIomuxXbarInout15 = 15|0x100U , kXBARA1_OutputIomuxXbarInout16 = 16|0x100U , kXBARA1_OutputIomuxXbarInout17 = 17|0x100U ,   kXBARA1_OutputIomuxXbarInout18 = 18|0x100U , kXBARA1_OutputIomuxXbarInout19 = 19|0x100U , kXBARA1_OutputIomuxXbarInout20 = 20|0x100U , kXBARA1_OutputIomuxXbarInout21 = 21|0x100U ,   kXBARA1_OutputIomuxXbarInout22 = 22|0x100U , kXBARA1_OutputIomuxXbarInout23 = 23|0x100U , kXBARA1_OutputIomuxXbarInout24 = 24|0x100U , kXBARA1_OutputIomuxXbarInout25 = 25|0x100U ,   kXBARA1_OutputIomuxXbarInout26 = 26|0x100U , kXBARA1_OutputIomuxXbarInout27 = 27|0x100U , kXBARA1_OutputIomuxXbarInout28 = 28|0x100U , kXBARA1_OutputIomuxXbarInout29 = 29|0x100U ,   kXBARA1_OutputIomuxXbarInout30 = 30|0x100U , kXBARA1_OutputIomuxXbarInout31 = 31|0x100U , kXBARA1_OutputIomuxXbarInout32 = 32|0x100U , kXBARA1_OutputIomuxXbarInout33 = 33|0x100U ,   kXBARA1_OutputIomuxXbarInout34 = 34|0x100U , kXBARA1_OutputIomuxXbarInout35 = 35|0x100U , kXBARA1_OutputIomuxXbarInout36 = 36|0x100U , kXBARA1_OutputIomuxXbarInout37 = 37|0x100U ,   kXBARA1_OutputIomuxXbarInout38 = 38|0x100U , kXBARA1_OutputIomuxXbarInout39 = 39|0x100U , kXBARA1_OutputIomuxXbarInout40 = 40|0x100U , kXBARA1_OutputAcmp1Sample = 41|0x100U ,   kXBARA1_OutputAcmp2Sample = 42|0x100U , kXBARA1_OutputAcmp3Sample = 43|0x100U , kXBARA1_OutputAcmp4Sample = 44|0x100U , kXBARA1_OutputRESERVED45 = 45|0x100U ,   kXBARA1_OutputRESERVED46 = 46|0x100U , kXBARA1_OutputRESERVED47 = 47|0x100U , kXBARA1_OutputRESERVED48 = 48|0x100U , kXBARA1_OutputFlexpwm1Pwm0Exta = 49|0x100U ,   kXBARA1_OutputFlexpwm1Pwm1Exta = 50|0x100U , kXBARA1_OutputFlexpwm1Pwm2Exta = 51|0x100U , kXBARA1_OutputFlexpwm1Pwm3Exta = 52|0x100U , kXBARA1_OutputFlexpwm1Pwm0ExtSync = 53|0x100U ,   kXBARA1_OutputFlexpwm1Pwm1ExtSync = 54|0x100U , kXBARA1_OutputFlexpwm1Pwm2ExtSync = 55|0x100U , kXBARA1_OutputFlexpwm1Pwm3ExtSync = 56|0x100U , kXBARA1_OutputFlexpwm1ExtClk = 57|0x100U ,   kXBARA1_OutputFlexpwm1Fault0 = 58|0x100U , kXBARA1_OutputFlexpwm1Fault1 = 59|0x100U , kXBARA1_OutputFlexpwm1234Fault2 = 60|0x100U , kXBARA1_OutputFlexpwm1234Fault3 = 61|0x100U ,   kXBARA1_OutputFlexpwm1ExtForce = 62|0x100U , kXBARA1_OutputFlexpwm2Pwm0Exta = 63|0x100U , kXBARA1_OutputFlexpwm2Pwm1Exta = 64|0x100U , kXBARA1_OutputFlexpwm2Pwm2Exta = 65|0x100U ,   kXBARA1_OutputFlexpwm2Pwm3Exta = 66|0x100U , kXBARA1_OutputFlexpwm2Pwm0ExtSync = 67|0x100U , kXBARA1_OutputFlexpwm2Pwm1ExtSync = 68|0x100U , kXBARA1_OutputFlexpwm2Pwm2ExtSync = 69|0x100U ,   kXBARA1_OutputFlexpwm2Pwm3ExtSync = 70|0x100U , kXBARA1_OutputFlexpwm2ExtClk = 71|0x100U , kXBARA1_OutputFlexpwm2Fault0 = 72|0x100U , kXBARA1_OutputFlexpwm2Fault1 = 73|0x100U ,   kXBARA1_OutputFlexpwm2ExtForce = 74|0x100U , kXBARA1_OutputFlexpwm34Pwm0Exta = 75|0x100U , kXBARA1_OutputFlexpwm34Pwm1Exta = 76|0x100U , kXBARA1_OutputFlexpwm34Pwm2Exta = 77|0x100U ,   kXBARA1_OutputFlexpwm34Pwm3Exta = 78|0x100U , kXBARA1_OutputFlexpwm34ExtClk = 79|0x100U , kXBARA1_OutputFlexpwm3Pwm0ExtSync = 80|0x100U , kXBARA1_OutputFlexpwm3Pwm1ExtSync = 81|0x100U ,   kXBARA1_OutputFlexpwm3Pwm2ExtSync = 82|0x100U , kXBARA1_OutputFlexpwm3Pwm3ExtSync = 83|0x100U , kXBARA1_OutputFlexpwm3Fault0 = 84|0x100U , kXBARA1_OutputFlexpwm3Fault1 = 85|0x100U ,   kXBARA1_OutputFlexpwm3ExtForce = 86|0x100U , kXBARA1_OutputFlexpwm4Pwm0ExtSync = 87|0x100U , kXBARA1_OutputFlexpwm4Pwm1ExtSync = 88|0x100U , kXBARA1_OutputFlexpwm4Pwm2ExtSync = 89|0x100U ,   kXBARA1_OutputFlexpwm4Pwm3ExtSync = 90|0x100U , kXBARA1_OutputFlexpwm4Fault0 = 91|0x100U , kXBARA1_OutputFlexpwm4Fault1 = 92|0x100U , kXBARA1_OutputFlexpwm4ExtForce = 93|0x100U ,   kXBARA1_OutputRESERVED94 = 94|0x100U , kXBARA1_OutputRESERVED95 = 95|0x100U , kXBARA1_OutputRESERVED96 = 96|0x100U , kXBARA1_OutputRESERVED97 = 97|0x100U ,   kXBARA1_OutputRESERVED98 = 98|0x100U , kXBARA1_OutputRESERVED99 = 99|0x100U , kXBARA1_OutputRESERVED100 = 100|0x100U , kXBARA1_OutputRESERVED101 = 101|0x100U ,   kXBARA1_OutputRESERVED102 = 102|0x100U , kXBARA1_OutputRESERVED103 = 103|0x100U , kXBARA1_OutputRESERVED104 = 104|0x100U , kXBARA1_OutputRESERVED105 = 105|0x100U ,   kXBARA1_OutputRESERVED106 = 106|0x100U , kXBARA1_OutputRESERVED107 = 107|0x100U , kXBARA1_OutputDec1Phasea = 108|0x100U , kXBARA1_OutputDec1Phaseb = 109|0x100U ,   kXBARA1_OutputDec1Index = 110|0x100U , kXBARA1_OutputDec1Home = 111|0x100U , kXBARA1_OutputDec1Trigger = 112|0x100U , kXBARA1_OutputDec2Phasea = 113|0x100U ,   kXBARA1_OutputDec2Phaseb = 114|0x100U , kXBARA1_OutputDec2Index = 115|0x100U , kXBARA1_OutputDec2Home = 116|0x100U , kXBARA1_OutputDec2Trigger = 117|0x100U ,   kXBARA1_OutputDec3Phasea = 118|0x100U , kXBARA1_OutputDec3Phaseb = 119|0x100U , kXBARA1_OutputDec3Index = 120|0x100U , kXBARA1_OutputDec3Home = 121|0x100U ,   kXBARA1_OutputDec3Trigger = 122|0x100U , kXBARA1_OutputDec4Phasea = 123|0x100U , kXBARA1_OutputDec4Phaseb = 124|0x100U , kXBARA1_OutputDec4Index = 125|0x100U ,   kXBARA1_OutputDec4Home = 126|0x100U , kXBARA1_OutputDec4Trigger = 127|0x100U , kXBARA1_OutputRESERVED128 = 128|0x100U , kXBARA1_OutputRESERVED129 = 129|0x100U ,   kXBARA1_OutputRESERVED130 = 130|0x100U , kXBARA1_OutputRESERVED131 = 131|0x100U , kXBARA1_OutputCan1 = 132|0x100U , kXBARA1_OutputCan2 = 133|0x100U ,   kXBARA1_OutputRESERVED134 = 134|0x100U , kXBARA1_OutputRESERVED135 = 135|0x100U , kXBARA1_OutputRESERVED136 = 136|0x100U , kXBARA1_OutputRESERVED137 = 137|0x100U ,   kXBARA1_OutputQtimer1Timer0 = 138|0x100U , kXBARA1_OutputQtimer1Timer1 = 139|0x100U , kXBARA1_OutputQtimer1Timer2 = 140|0x100U , kXBARA1_OutputQtimer1Timer3 = 141|0x100U ,   kXBARA1_OutputQtimer2Timer0 = 142|0x100U , kXBARA1_OutputQtimer2Timer1 = 143|0x100U , kXBARA1_OutputQtimer2Timer2 = 144|0x100U , kXBARA1_OutputQtimer2Timer3 = 145|0x100U ,   kXBARA1_OutputQtimer3Timer0 = 146|0x100U , kXBARA1_OutputQtimer3Timer1 = 147|0x100U , kXBARA1_OutputQtimer3Timer2 = 148|0x100U , kXBARA1_OutputQtimer3Timer3 = 149|0x100U ,   kXBARA1_OutputQtimer4Timer0 = 150|0x100U , kXBARA1_OutputQtimer4Timer1 = 151|0x100U , kXBARA1_OutputQtimer4Timer2 = 152|0x100U , kXBARA1_OutputQtimer4Timer3 = 153|0x100U ,   kXBARA1_OutputEwmEwmIn = 154|0x100U , kXBARA1_OutputAdcEtc0Coco0 = 155|0x100U , kXBARA1_OutputAdcEtc0Coco1 = 156|0x100U , kXBARA1_OutputAdcEtc0Coco2 = 157|0x100U ,   kXBARA1_OutputAdcEtc0Coco3 = 158|0x100U , kXBARA1_OutputAdcEtc1Coco0 = 159|0x100U , kXBARA1_OutputAdcEtc1Coco1 = 160|0x100U , kXBARA1_OutputAdcEtc1Coco2 = 161|0x100U ,   kXBARA1_OutputAdcEtc1Coco3 = 162|0x100U , kXBARA1_OutputRESERVED163 = 163|0x100U , kXBARA1_OutputRESERVED164 = 164|0x100U , kXBARA1_OutputRESERVED165 = 165|0x100U ,   kXBARA1_OutputRESERVED166 = 166|0x100U , kXBARA1_OutputRESERVED167 = 167|0x100U , kXBARA1_OutputRESERVED168 = 168|0x100U , kXBARA1_OutputRESERVED169 = 169|0x100U ,   kXBARA1_OutputRESERVED170 = 170|0x100U , kXBARA1_OutputFlexio1TrigIn0 = 171|0x100U , kXBARA1_OutputFlexio1TrigIn1 = 172|0x100U , kXBARA1_OutputFlexio2TrigIn0 = 173|0x100U ,   kXBARA1_OutputFlexio2TrigIn1 = 174|0x100U , kXBARB2_OutputAoi1In00 = 0|0x200U , kXBARB2_OutputAoi1In01 = 1|0x200U , kXBARB2_OutputAoi1In02 = 2|0x200U ,   kXBARB2_OutputAoi1In03 = 3|0x200U , kXBARB2_OutputAoi1In04 = 4|0x200U , kXBARB2_OutputAoi1In05 = 5|0x200U , kXBARB2_OutputAoi1In06 = 6|0x200U ,   kXBARB2_OutputAoi1In07 = 7|0x200U , kXBARB2_OutputAoi1In08 = 8|0x200U , kXBARB2_OutputAoi1In09 = 9|0x200U , kXBARB2_OutputAoi1In10 = 10|0x200U ,   kXBARB2_OutputAoi1In11 = 11|0x200U , kXBARB2_OutputAoi1In12 = 12|0x200U , kXBARB2_OutputAoi1In13 = 13|0x200U , kXBARB2_OutputAoi1In14 = 14|0x200U ,   kXBARB2_OutputAoi1In15 = 15|0x200U , kXBARB3_OutputAoi2In00 = 0|0x300U , kXBARB3_OutputAoi2In01 = 1|0x300U , kXBARB3_OutputAoi2In02 = 2|0x300U ,   kXBARB3_OutputAoi2In03 = 3|0x300U , kXBARB3_OutputAoi2In04 = 4|0x300U , kXBARB3_OutputAoi2In05 = 5|0x300U , kXBARB3_OutputAoi2In06 = 6|0x300U ,   kXBARB3_OutputAoi2In07 = 7|0x300U , kXBARB3_OutputAoi2In08 = 8|0x300U , kXBARB3_OutputAoi2In09 = 9|0x300U , kXBARB3_OutputAoi2In10 = 10|0x300U ,   kXBARB3_OutputAoi2In11 = 11|0x300U , kXBARB3_OutputAoi2In12 = 12|0x300U , kXBARB3_OutputAoi2In13 = 13|0x300U , kXBARB3_OutputAoi2In14 = 14|0x300U ,   kXBARB3_OutputAoi2In15 = 15|0x300U }

Detailed Description

Mapping Information

Typedef Documentation

rdc_master_t [1/2]

typedef enum _rdc_master rdc_master_t

Structure for the RDC mapping.

Defines the structure for the RDC resource collections.

rdc_master_t [2/2]

typedef enum _rdc_master rdc_master_t

Structure for the RDC mapping.

Defines the structure for the RDC resource collections.

Enumeration Type Documentation

_rdc_master [1/2]

enum _rdc_master

Structure for the RDC mapping.

Defines the structure for the RDC resource collections.

Enumerator
kRDC_Master_ENET_1G_TX	ENET_1G_TX
kRDC_Master_ENET_1G_RX	ENET_1G_RX
kRDC_Master_ENET	ENET
kRDC_Master_ENET_QOS	ENET_QOS
kRDC_Master_USDHC1	USDHC1
kRDC_Master_USDHC2	USDHC2
kRDC_Master_USB	USB
kRDC_Master_GPU	GPU
kRDC_Master_PXP	PXP
kRDC_Master_LCDIF	LCDIF
kRDC_Master_CSI	CSI
kRDC_Master_ENET_1G_TX	ENET_1G_TX
kRDC_Master_ENET_1G_RX	ENET_1G_RX
kRDC_Master_ENET	ENET
kRDC_Master_ENET_QOS	ENET_QOS
kRDC_Master_USDHC1	USDHC1
kRDC_Master_USDHC2	USDHC2
kRDC_Master_USB	USB
kRDC_Master_GPU	GPU
kRDC_Master_PXP	PXP
kRDC_Master_LCDIF	LCDIF
kRDC_Master_CSI	CSI

_rdc_master [2/2]

enum _rdc_master

Structure for the RDC mapping.

Defines the structure for the RDC resource collections.

Enumerator
kRDC_Master_ENET_1G_TX	ENET_1G_TX
kRDC_Master_ENET_1G_RX	ENET_1G_RX
kRDC_Master_ENET	ENET
kRDC_Master_ENET_QOS	ENET_QOS
kRDC_Master_USDHC1	USDHC1
kRDC_Master_USDHC2	USDHC2
kRDC_Master_USB	USB
kRDC_Master_GPU	GPU
kRDC_Master_PXP	PXP
kRDC_Master_LCDIF	LCDIF
kRDC_Master_CSI	CSI
kRDC_Master_ENET_1G_TX	ENET_1G_TX
kRDC_Master_ENET_1G_RX	ENET_1G_RX
kRDC_Master_ENET	ENET
kRDC_Master_ENET_QOS	ENET_QOS
kRDC_Master_USDHC1	USDHC1
kRDC_Master_USDHC2	USDHC2
kRDC_Master_USB	USB
kRDC_Master_GPU	GPU
kRDC_Master_PXP	PXP
kRDC_Master_LCDIF	LCDIF
kRDC_Master_CSI	CSI

_rdc_periph [1/2]

enum _rdc_periph

Enumerator
kRDC_Periph_MTR	MTR
kRDC_Periph_MECC1	MECC1
kRDC_Periph_MECC2	MECC2
kRDC_Periph_FLEXSPI1	FlexSPI1
kRDC_Periph_FLEXSPI2	FlexSPI2
kRDC_Periph_SEMC	SEMC
kRDC_Periph_CM7_IMXRT	CM7_IMXRT
kRDC_Periph_EWM	EWM
kRDC_Periph_WDOG1	WDOG1
kRDC_Periph_WDOG2	WDOG2
kRDC_Periph_WDOG3	WDOG3
kRDC_Periph_AOI_XBAR	AOI_XBAR
kRDC_Periph_ADC_ETC	ADC_ETC
kRDC_Periph_CAAM_1	CAAM_1
kRDC_Periph_ADC1	ADC1
kRDC_Periph_ADC2	ADC2
kRDC_Periph_TSC_DIG	TSC_DIG
kRDC_Periph_DAC	DAC
kRDC_Periph_IEE	IEE
kRDC_Periph_DMAMUX	DMAMUX
kRDC_Periph_EDMA	EDMA
kRDC_Periph_LPUART1	LPUART1
kRDC_Periph_LPUART2	LPUART2
kRDC_Periph_LPUART3	LPUART3
kRDC_Periph_LPUART4	LPUART4
kRDC_Periph_LPUART5	LPUART5
kRDC_Periph_LPUART6	LPUART6
kRDC_Periph_LPUART7	LPUART7
kRDC_Periph_LPUART8	LPUART8
kRDC_Periph_LPUART9	LPUART9
kRDC_Periph_LPUART10	LPUART10
kRDC_Periph_FLEXIO1	FlexIO1
kRDC_Periph_FLEXIO2	FlexIO2
kRDC_Periph_CAN1	CAN1
kRDC_Periph_CAN2	CAN2
kRDC_Periph_PIT1	PIT1
kRDC_Periph_KPP	KPP
kRDC_Periph_IOMUXC_GPR	IOMUXC_GPR
kRDC_Periph_IOMUXC	IOMUXC
kRDC_Periph_GPT1	GPT1
kRDC_Periph_GPT2	GPT2
kRDC_Periph_GPT3	GPT3
kRDC_Periph_GPT4	GPT4
kRDC_Periph_GPT5	GPT5
kRDC_Periph_GPT6	GPT6
kRDC_Periph_LPI2C1	LPI2C1
kRDC_Periph_LPI2C2	LPI2C2
kRDC_Periph_LPI2C3	LPI2C3
kRDC_Periph_LPI2C4	LPI2C4
kRDC_Periph_LPSPI1	LPSPI1
kRDC_Periph_LPSPI2	LPSPI2
kRDC_Periph_LPSPI3	LPSPI3
kRDC_Periph_LPSPI4	LPSPI4
kRDC_Periph_GPIO_1_6	GPIO_1_6
kRDC_Periph_CCM_OBS	CCM_OBS
kRDC_Periph_SIM1	SIM1
kRDC_Periph_SIM2	SIM2
kRDC_Periph_QTIMER1	QTimer1
kRDC_Periph_QTIMER2	QTimer2
kRDC_Periph_QTIMER3	QTimer3
kRDC_Periph_QTIMER4	QTimer4
kRDC_Periph_ENC1	ENC1
kRDC_Periph_ENC2	ENC2
kRDC_Periph_ENC3	ENC3
kRDC_Periph_ENC4	ENC4
kRDC_Periph_FLEXPWM1	FLEXPWM1
kRDC_Periph_FLEXPWM2	FLEXPWM2
kRDC_Periph_FLEXPWM3	FLEXPWM3
kRDC_Periph_FLEXPWM4	FLEXPWM4
kRDC_Periph_CAAM_2	CAAM_2
kRDC_Periph_CAAM_3	CAAM_3
kRDC_Periph_ACMP1	ACMP1
kRDC_Periph_ACMP2	ACMP2
kRDC_Periph_ACMP3	ACMP3
kRDC_Periph_ACMP4	ACMP4
kRDC_Periph_CAAM	CAAM
kRDC_Periph_SPDIF	SPDIF
kRDC_Periph_SAI1	SAI1
kRDC_Periph_SAI2	SAI2
kRDC_Periph_SAI3	SAI3
kRDC_Periph_ASRC	ASRC
kRDC_Periph_USDHC1	USDHC1
kRDC_Periph_USDHC2	USDHC2
kRDC_Periph_ENET_1G	ENET_1G
kRDC_Periph_ENET	ENET
kRDC_Periph_USB_PL301	USB_PL301
kRDC_Periph_USBPHY2	USBPHY2
kRDC_Periph_USB_OTG2	USB_OTG2
kRDC_Periph_USBPHY1	USBPHY1
kRDC_Periph_USB_OTG1	USB_OTG1
kRDC_Periph_ENET_QOS	ENET_QOS
kRDC_Periph_CAAM_5	CAAM_5
kRDC_Periph_CSI	CSI
kRDC_Periph_LCDIF1	LCDIF1
kRDC_Periph_LCDIF2	LCDIF2
kRDC_Periph_MIPI_DSI	MIPI_DSI
kRDC_Periph_MIPI_CSI	MIPI_CSI
kRDC_Periph_PXP	PXP
kRDC_Periph_VIDEO_MUX	VIDEO_MUX
kRDC_Periph_PGMC_SRC_GPC	PGMC_SRC_GPC
kRDC_Periph_IOMUXC_LPSR	IOMUXC_LPSR
kRDC_Periph_IOMUXC_LPSR_GPR	IOMUXC_LPSR_GPR
kRDC_Periph_WDOG4	WDOG4
kRDC_Periph_DMAMUX_LPSR	DMAMUX_LPSR
kRDC_Periph_EDMA_LPSR	EDMA_LPSR
kRDC_Periph_Reserved	Reserved
kRDC_Periph_MIC	MIC
kRDC_Periph_LPUART11	LPUART11
kRDC_Periph_LPUART12	LPUART12
kRDC_Periph_LPSPI5	LPSPI5
kRDC_Periph_LPSPI6	LPSPI6
kRDC_Periph_LPI2C5	LPI2C5
kRDC_Periph_LPI2C6	LPI2C6
kRDC_Periph_CAN3	CAN3
kRDC_Periph_SAI4	SAI4
kRDC_Periph_SEMA1	SEMA1
kRDC_Periph_GPIO_7_12	GPIO_7_12
kRDC_Periph_KEY_MANAGER	KEY_MANAGER
kRDC_Periph_ANATOP	ANATOP
kRDC_Periph_SNVS_HP_WRAPPER	SNVS_HP_WRAPPER
kRDC_Periph_IOMUXC_SNVS	IOMUXC_SNVS
kRDC_Periph_IOMUXC_SNVS_GPR	IOMUXC_SNVS_GPR
kRDC_Periph_SNVS_SRAM	SNVS_SRAM
kRDC_Periph_GPIO13	GPIO13
kRDC_Periph_ROMCP	ROMCP
kRDC_Periph_DCDC	DCDC
kRDC_Periph_OCOTP_CTRL_WRAPPER	OCOTP_CTRL_WRAPPER
kRDC_Periph_PIT2	PIT2
kRDC_Periph_SSARC	SSARC
kRDC_Periph_CCM	CCM
kRDC_Periph_CAAM_6	CAAM_6
kRDC_Periph_CAAM_7	CAAM_7
kRDC_Periph_MTR	MTR
kRDC_Periph_MECC1	MECC1
kRDC_Periph_MECC2	MECC2
kRDC_Periph_FLEXSPI1	FlexSPI1
kRDC_Periph_FLEXSPI2	FlexSPI2
kRDC_Periph_SEMC	SEMC
kRDC_Periph_CM7_IMXRT	CM7_IMXRT
kRDC_Periph_EWM	EWM
kRDC_Periph_WDOG1	WDOG1
kRDC_Periph_WDOG2	WDOG2
kRDC_Periph_WDOG3	WDOG3
kRDC_Periph_AOI_XBAR	AOI_XBAR
kRDC_Periph_ADC_ETC	ADC_ETC
kRDC_Periph_CAAM_1	CAAM_1
kRDC_Periph_ADC1	ADC1
kRDC_Periph_ADC2	ADC2
kRDC_Periph_TSC_DIG	TSC_DIG
kRDC_Periph_DAC	DAC
kRDC_Periph_IEE	IEE
kRDC_Periph_DMAMUX	DMAMUX
kRDC_Periph_EDMA	EDMA
kRDC_Periph_LPUART1	LPUART1
kRDC_Periph_LPUART2	LPUART2
kRDC_Periph_LPUART3	LPUART3
kRDC_Periph_LPUART4	LPUART4
kRDC_Periph_LPUART5	LPUART5
kRDC_Periph_LPUART6	LPUART6
kRDC_Periph_LPUART7	LPUART7
kRDC_Periph_LPUART8	LPUART8
kRDC_Periph_LPUART9	LPUART9
kRDC_Periph_LPUART10	LPUART10
kRDC_Periph_FLEXIO1	FlexIO1
kRDC_Periph_FLEXIO2	FlexIO2
kRDC_Periph_CAN1	CAN1
kRDC_Periph_CAN2	CAN2
kRDC_Periph_PIT1	PIT1
kRDC_Periph_KPP	KPP
kRDC_Periph_IOMUXC_GPR	IOMUXC_GPR
kRDC_Periph_IOMUXC	IOMUXC
kRDC_Periph_GPT1	GPT1
kRDC_Periph_GPT2	GPT2
kRDC_Periph_GPT3	GPT3
kRDC_Periph_GPT4	GPT4
kRDC_Periph_GPT5	GPT5
kRDC_Periph_GPT6	GPT6
kRDC_Periph_LPI2C1	LPI2C1
kRDC_Periph_LPI2C2	LPI2C2
kRDC_Periph_LPI2C3	LPI2C3
kRDC_Periph_LPI2C4	LPI2C4
kRDC_Periph_LPSPI1	LPSPI1
kRDC_Periph_LPSPI2	LPSPI2
kRDC_Periph_LPSPI3	LPSPI3
kRDC_Periph_LPSPI4	LPSPI4
kRDC_Periph_GPIO_1_6	GPIO_1_6
kRDC_Periph_CCM_OBS	CCM_OBS
kRDC_Periph_SIM1	SIM1
kRDC_Periph_SIM2	SIM2
kRDC_Periph_QTIMER1	QTimer1
kRDC_Periph_QTIMER2	QTimer2
kRDC_Periph_QTIMER3	QTimer3
kRDC_Periph_QTIMER4	QTimer4
kRDC_Periph_ENC1	ENC1
kRDC_Periph_ENC2	ENC2
kRDC_Periph_ENC3	ENC3
kRDC_Periph_ENC4	ENC4
kRDC_Periph_FLEXPWM1	FLEXPWM1
kRDC_Periph_FLEXPWM2	FLEXPWM2
kRDC_Periph_FLEXPWM3	FLEXPWM3
kRDC_Periph_FLEXPWM4	FLEXPWM4
kRDC_Periph_CAAM_2	CAAM_2
kRDC_Periph_CAAM_3	CAAM_3
kRDC_Periph_ACMP1	ACMP1
kRDC_Periph_ACMP2	ACMP2
kRDC_Periph_ACMP3	ACMP3
kRDC_Periph_ACMP4	ACMP4
kRDC_Periph_CAAM	CAAM
kRDC_Periph_SPDIF	SPDIF
kRDC_Periph_SAI1	SAI1
kRDC_Periph_SAI2	SAI2
kRDC_Periph_SAI3	SAI3
kRDC_Periph_ASRC	ASRC
kRDC_Periph_USDHC1	USDHC1
kRDC_Periph_USDHC2	USDHC2
kRDC_Periph_ENET_1G	ENET_1G
kRDC_Periph_ENET	ENET
kRDC_Periph_USB_PL301	USB_PL301
kRDC_Periph_USBPHY2	USBPHY2
kRDC_Periph_USB_OTG2	USB_OTG2
kRDC_Periph_USBPHY1	USBPHY1
kRDC_Periph_USB_OTG1	USB_OTG1
kRDC_Periph_ENET_QOS	ENET_QOS
kRDC_Periph_CAAM_5	CAAM_5
kRDC_Periph_CSI	CSI
kRDC_Periph_LCDIF1	LCDIF1
kRDC_Periph_LCDIF2	LCDIF2
kRDC_Periph_MIPI_DSI	MIPI_DSI
kRDC_Periph_MIPI_CSI	MIPI_CSI
kRDC_Periph_PXP	PXP
kRDC_Periph_VIDEO_MUX	VIDEO_MUX
kRDC_Periph_PGMC_SRC_GPC	PGMC_SRC_GPC
kRDC_Periph_IOMUXC_LPSR	IOMUXC_LPSR
kRDC_Periph_IOMUXC_LPSR_GPR	IOMUXC_LPSR_GPR
kRDC_Periph_WDOG4	WDOG4
kRDC_Periph_DMAMUX_LPSR	DMAMUX_LPSR
kRDC_Periph_EDMA_LPSR	EDMA_LPSR
kRDC_Periph_Reserved	Reserved
kRDC_Periph_MIC	MIC
kRDC_Periph_LPUART11	LPUART11
kRDC_Periph_LPUART12	LPUART12
kRDC_Periph_LPSPI5	LPSPI5
kRDC_Periph_LPSPI6	LPSPI6
kRDC_Periph_LPI2C5	LPI2C5
kRDC_Periph_LPI2C6	LPI2C6
kRDC_Periph_CAN3	CAN3
kRDC_Periph_SAI4	SAI4
kRDC_Periph_SEMA1	SEMA1
kRDC_Periph_GPIO_7_12	GPIO_7_12
kRDC_Periph_KEY_MANAGER	KEY_MANAGER
kRDC_Periph_ANATOP	ANATOP
kRDC_Periph_SNVS_HP_WRAPPER	SNVS_HP_WRAPPER
kRDC_Periph_IOMUXC_SNVS	IOMUXC_SNVS
kRDC_Periph_IOMUXC_SNVS_GPR	IOMUXC_SNVS_GPR
kRDC_Periph_SNVS_SRAM	SNVS_SRAM
kRDC_Periph_GPIO13	GPIO13
kRDC_Periph_ROMCP	ROMCP
kRDC_Periph_DCDC	DCDC
kRDC_Periph_OCOTP_CTRL_WRAPPER	OCOTP_CTRL_WRAPPER
kRDC_Periph_PIT2	PIT2
kRDC_Periph_SSARC	SSARC
kRDC_Periph_CCM	CCM
kRDC_Periph_CAAM_6	CAAM_6
kRDC_Periph_CAAM_7	CAAM_7

_rdc_periph [2/2]

enum _rdc_periph

Enumerator
kRDC_Periph_MTR	MTR
kRDC_Periph_MECC1	MECC1
kRDC_Periph_MECC2	MECC2
kRDC_Periph_FLEXSPI1	FlexSPI1
kRDC_Periph_FLEXSPI2	FlexSPI2
kRDC_Periph_SEMC	SEMC
kRDC_Periph_CM7_IMXRT	CM7_IMXRT
kRDC_Periph_EWM	EWM
kRDC_Periph_WDOG1	WDOG1
kRDC_Periph_WDOG2	WDOG2
kRDC_Periph_WDOG3	WDOG3
kRDC_Periph_AOI_XBAR	AOI_XBAR
kRDC_Periph_ADC_ETC	ADC_ETC
kRDC_Periph_CAAM_1	CAAM_1
kRDC_Periph_ADC1	ADC1
kRDC_Periph_ADC2	ADC2
kRDC_Periph_TSC_DIG	TSC_DIG
kRDC_Periph_DAC	DAC
kRDC_Periph_IEE	IEE
kRDC_Periph_DMAMUX	DMAMUX
kRDC_Periph_EDMA	EDMA
kRDC_Periph_LPUART1	LPUART1
kRDC_Periph_LPUART2	LPUART2
kRDC_Periph_LPUART3	LPUART3
kRDC_Periph_LPUART4	LPUART4
kRDC_Periph_LPUART5	LPUART5
kRDC_Periph_LPUART6	LPUART6
kRDC_Periph_LPUART7	LPUART7
kRDC_Periph_LPUART8	LPUART8
kRDC_Periph_LPUART9	LPUART9
kRDC_Periph_LPUART10	LPUART10
kRDC_Periph_FLEXIO1	FlexIO1
kRDC_Periph_FLEXIO2	FlexIO2
kRDC_Periph_CAN1	CAN1
kRDC_Periph_CAN2	CAN2
kRDC_Periph_PIT1	PIT1
kRDC_Periph_KPP	KPP
kRDC_Periph_IOMUXC_GPR	IOMUXC_GPR
kRDC_Periph_IOMUXC	IOMUXC
kRDC_Periph_GPT1	GPT1
kRDC_Periph_GPT2	GPT2
kRDC_Periph_GPT3	GPT3
kRDC_Periph_GPT4	GPT4
kRDC_Periph_GPT5	GPT5
kRDC_Periph_GPT6	GPT6
kRDC_Periph_LPI2C1	LPI2C1
kRDC_Periph_LPI2C2	LPI2C2
kRDC_Periph_LPI2C3	LPI2C3
kRDC_Periph_LPI2C4	LPI2C4
kRDC_Periph_LPSPI1	LPSPI1
kRDC_Periph_LPSPI2	LPSPI2
kRDC_Periph_LPSPI3	LPSPI3
kRDC_Periph_LPSPI4	LPSPI4
kRDC_Periph_GPIO_1_6	GPIO_1_6
kRDC_Periph_CCM_OBS	CCM_OBS
kRDC_Periph_SIM1	SIM1
kRDC_Periph_SIM2	SIM2
kRDC_Periph_QTIMER1	QTimer1
kRDC_Periph_QTIMER2	QTimer2
kRDC_Periph_QTIMER3	QTimer3
kRDC_Periph_QTIMER4	QTimer4
kRDC_Periph_ENC1	ENC1
kRDC_Periph_ENC2	ENC2
kRDC_Periph_ENC3	ENC3
kRDC_Periph_ENC4	ENC4
kRDC_Periph_FLEXPWM1	FLEXPWM1
kRDC_Periph_FLEXPWM2	FLEXPWM2
kRDC_Periph_FLEXPWM3	FLEXPWM3
kRDC_Periph_FLEXPWM4	FLEXPWM4
kRDC_Periph_CAAM_2	CAAM_2
kRDC_Periph_CAAM_3	CAAM_3
kRDC_Periph_ACMP1	ACMP1
kRDC_Periph_ACMP2	ACMP2
kRDC_Periph_ACMP3	ACMP3
kRDC_Periph_ACMP4	ACMP4
kRDC_Periph_CAAM	CAAM
kRDC_Periph_SPDIF	SPDIF
kRDC_Periph_SAI1	SAI1
kRDC_Periph_SAI2	SAI2
kRDC_Periph_SAI3	SAI3
kRDC_Periph_ASRC	ASRC
kRDC_Periph_USDHC1	USDHC1
kRDC_Periph_USDHC2	USDHC2
kRDC_Periph_ENET_1G	ENET_1G
kRDC_Periph_ENET	ENET
kRDC_Periph_USB_PL301	USB_PL301
kRDC_Periph_USBPHY2	USBPHY2
kRDC_Periph_USB_OTG2	USB_OTG2
kRDC_Periph_USBPHY1	USBPHY1
kRDC_Periph_USB_OTG1	USB_OTG1
kRDC_Periph_ENET_QOS	ENET_QOS
kRDC_Periph_CAAM_5	CAAM_5
kRDC_Periph_CSI	CSI
kRDC_Periph_LCDIF1	LCDIF1
kRDC_Periph_LCDIF2	LCDIF2
kRDC_Periph_MIPI_DSI	MIPI_DSI
kRDC_Periph_MIPI_CSI	MIPI_CSI
kRDC_Periph_PXP	PXP
kRDC_Periph_VIDEO_MUX	VIDEO_MUX
kRDC_Periph_PGMC_SRC_GPC	PGMC_SRC_GPC
kRDC_Periph_IOMUXC_LPSR	IOMUXC_LPSR
kRDC_Periph_IOMUXC_LPSR_GPR	IOMUXC_LPSR_GPR
kRDC_Periph_WDOG4	WDOG4
kRDC_Periph_DMAMUX_LPSR	DMAMUX_LPSR
kRDC_Periph_EDMA_LPSR	EDMA_LPSR
kRDC_Periph_Reserved	Reserved
kRDC_Periph_MIC	MIC
kRDC_Periph_LPUART11	LPUART11
kRDC_Periph_LPUART12	LPUART12
kRDC_Periph_LPSPI5	LPSPI5
kRDC_Periph_LPSPI6	LPSPI6
kRDC_Periph_LPI2C5	LPI2C5
kRDC_Periph_LPI2C6	LPI2C6
kRDC_Periph_CAN3	CAN3
kRDC_Periph_SAI4	SAI4
kRDC_Periph_SEMA1	SEMA1
kRDC_Periph_GPIO_7_12	GPIO_7_12
kRDC_Periph_KEY_MANAGER	KEY_MANAGER
kRDC_Periph_ANATOP	ANATOP
kRDC_Periph_SNVS_HP_WRAPPER	SNVS_HP_WRAPPER
kRDC_Periph_IOMUXC_SNVS	IOMUXC_SNVS
kRDC_Periph_IOMUXC_SNVS_GPR	IOMUXC_SNVS_GPR
kRDC_Periph_SNVS_SRAM	SNVS_SRAM
kRDC_Periph_GPIO13	GPIO13
kRDC_Periph_ROMCP	ROMCP
kRDC_Periph_DCDC	DCDC
kRDC_Periph_OCOTP_CTRL_WRAPPER	OCOTP_CTRL_WRAPPER
kRDC_Periph_PIT2	PIT2
kRDC_Periph_SSARC	SSARC
kRDC_Periph_CCM	CCM
kRDC_Periph_CAAM_6	CAAM_6
kRDC_Periph_CAAM_7	CAAM_7
kRDC_Periph_MTR	MTR
kRDC_Periph_MECC1	MECC1
kRDC_Periph_MECC2	MECC2
kRDC_Periph_FLEXSPI1	FlexSPI1
kRDC_Periph_FLEXSPI2	FlexSPI2
kRDC_Periph_SEMC	SEMC
kRDC_Periph_CM7_IMXRT	CM7_IMXRT
kRDC_Periph_EWM	EWM
kRDC_Periph_WDOG1	WDOG1
kRDC_Periph_WDOG2	WDOG2
kRDC_Periph_WDOG3	WDOG3
kRDC_Periph_AOI_XBAR	AOI_XBAR
kRDC_Periph_ADC_ETC	ADC_ETC
kRDC_Periph_CAAM_1	CAAM_1
kRDC_Periph_ADC1	ADC1
kRDC_Periph_ADC2	ADC2
kRDC_Periph_TSC_DIG	TSC_DIG
kRDC_Periph_DAC	DAC
kRDC_Periph_IEE	IEE
kRDC_Periph_DMAMUX	DMAMUX
kRDC_Periph_EDMA	EDMA
kRDC_Periph_LPUART1	LPUART1
kRDC_Periph_LPUART2	LPUART2
kRDC_Periph_LPUART3	LPUART3
kRDC_Periph_LPUART4	LPUART4
kRDC_Periph_LPUART5	LPUART5
kRDC_Periph_LPUART6	LPUART6
kRDC_Periph_LPUART7	LPUART7
kRDC_Periph_LPUART8	LPUART8
kRDC_Periph_LPUART9	LPUART9
kRDC_Periph_LPUART10	LPUART10
kRDC_Periph_FLEXIO1	FlexIO1
kRDC_Periph_FLEXIO2	FlexIO2
kRDC_Periph_CAN1	CAN1
kRDC_Periph_CAN2	CAN2
kRDC_Periph_PIT1	PIT1
kRDC_Periph_KPP	KPP
kRDC_Periph_IOMUXC_GPR	IOMUXC_GPR
kRDC_Periph_IOMUXC	IOMUXC
kRDC_Periph_GPT1	GPT1
kRDC_Periph_GPT2	GPT2
kRDC_Periph_GPT3	GPT3
kRDC_Periph_GPT4	GPT4
kRDC_Periph_GPT5	GPT5
kRDC_Periph_GPT6	GPT6
kRDC_Periph_LPI2C1	LPI2C1
kRDC_Periph_LPI2C2	LPI2C2
kRDC_Periph_LPI2C3	LPI2C3
kRDC_Periph_LPI2C4	LPI2C4
kRDC_Periph_LPSPI1	LPSPI1
kRDC_Periph_LPSPI2	LPSPI2
kRDC_Periph_LPSPI3	LPSPI3
kRDC_Periph_LPSPI4	LPSPI4
kRDC_Periph_GPIO_1_6	GPIO_1_6
kRDC_Periph_CCM_OBS	CCM_OBS
kRDC_Periph_SIM1	SIM1
kRDC_Periph_SIM2	SIM2
kRDC_Periph_QTIMER1	QTimer1
kRDC_Periph_QTIMER2	QTimer2
kRDC_Periph_QTIMER3	QTimer3
kRDC_Periph_QTIMER4	QTimer4
kRDC_Periph_ENC1	ENC1
kRDC_Periph_ENC2	ENC2
kRDC_Periph_ENC3	ENC3
kRDC_Periph_ENC4	ENC4
kRDC_Periph_FLEXPWM1	FLEXPWM1
kRDC_Periph_FLEXPWM2	FLEXPWM2
kRDC_Periph_FLEXPWM3	FLEXPWM3
kRDC_Periph_FLEXPWM4	FLEXPWM4
kRDC_Periph_CAAM_2	CAAM_2
kRDC_Periph_CAAM_3	CAAM_3
kRDC_Periph_ACMP1	ACMP1
kRDC_Periph_ACMP2	ACMP2
kRDC_Periph_ACMP3	ACMP3
kRDC_Periph_ACMP4	ACMP4
kRDC_Periph_CAAM	CAAM
kRDC_Periph_SPDIF	SPDIF
kRDC_Periph_SAI1	SAI1
kRDC_Periph_SAI2	SAI2
kRDC_Periph_SAI3	SAI3
kRDC_Periph_ASRC	ASRC
kRDC_Periph_USDHC1	USDHC1
kRDC_Periph_USDHC2	USDHC2
kRDC_Periph_ENET_1G	ENET_1G
kRDC_Periph_ENET	ENET
kRDC_Periph_USB_PL301	USB_PL301
kRDC_Periph_USBPHY2	USBPHY2
kRDC_Periph_USB_OTG2	USB_OTG2
kRDC_Periph_USBPHY1	USBPHY1
kRDC_Periph_USB_OTG1	USB_OTG1
kRDC_Periph_ENET_QOS	ENET_QOS
kRDC_Periph_CAAM_5	CAAM_5
kRDC_Periph_CSI	CSI
kRDC_Periph_LCDIF1	LCDIF1
kRDC_Periph_LCDIF2	LCDIF2
kRDC_Periph_MIPI_DSI	MIPI_DSI
kRDC_Periph_MIPI_CSI	MIPI_CSI
kRDC_Periph_PXP	PXP
kRDC_Periph_VIDEO_MUX	VIDEO_MUX
kRDC_Periph_PGMC_SRC_GPC	PGMC_SRC_GPC
kRDC_Periph_IOMUXC_LPSR	IOMUXC_LPSR
kRDC_Periph_IOMUXC_LPSR_GPR	IOMUXC_LPSR_GPR
kRDC_Periph_WDOG4	WDOG4
kRDC_Periph_DMAMUX_LPSR	DMAMUX_LPSR
kRDC_Periph_EDMA_LPSR	EDMA_LPSR
kRDC_Periph_Reserved	Reserved
kRDC_Periph_MIC	MIC
kRDC_Periph_LPUART11	LPUART11
kRDC_Periph_LPUART12	LPUART12
kRDC_Periph_LPSPI5	LPSPI5
kRDC_Periph_LPSPI6	LPSPI6
kRDC_Periph_LPI2C5	LPI2C5
kRDC_Periph_LPI2C6	LPI2C6
kRDC_Periph_CAN3	CAN3
kRDC_Periph_SAI4	SAI4
kRDC_Periph_SEMA1	SEMA1
kRDC_Periph_GPIO_7_12	GPIO_7_12
kRDC_Periph_KEY_MANAGER	KEY_MANAGER
kRDC_Periph_ANATOP	ANATOP
kRDC_Periph_SNVS_HP_WRAPPER	SNVS_HP_WRAPPER
kRDC_Periph_IOMUXC_SNVS	IOMUXC_SNVS
kRDC_Periph_IOMUXC_SNVS_GPR	IOMUXC_SNVS_GPR
kRDC_Periph_SNVS_SRAM	SNVS_SRAM
kRDC_Periph_GPIO13	GPIO13
kRDC_Periph_ROMCP	ROMCP
kRDC_Periph_DCDC	DCDC
kRDC_Periph_OCOTP_CTRL_WRAPPER	OCOTP_CTRL_WRAPPER
kRDC_Periph_PIT2	PIT2
kRDC_Periph_SSARC	SSARC
kRDC_Periph_CCM	CCM
kRDC_Periph_CAAM_6	CAAM_6
kRDC_Periph_CAAM_7	CAAM_7

_xbar_input_signal [1/2]

enum _xbar_input_signal

Enumerator
kXBARA1_InputLogicLow	LOGIC_LOW output assigned to XBARA1_IN0 input.
kXBARA1_InputLogicHigh	LOGIC_HIGH output assigned to XBARA1_IN1 input.
kXBARA1_InputIomuxXbarIn02	IOMUX_XBAR_IN02 output assigned to XBARA1_IN2 input.
kXBARA1_InputIomuxXbarIn03	IOMUX_XBAR_IN03 output assigned to XBARA1_IN3 input.
kXBARA1_InputIomuxXbarInout04	IOMUX_XBAR_INOUT04 output assigned to XBARA1_IN4 input.
kXBARA1_InputIomuxXbarInout05	IOMUX_XBAR_INOUT05 output assigned to XBARA1_IN5 input.
kXBARA1_InputIomuxXbarInout06	IOMUX_XBAR_INOUT06 output assigned to XBARA1_IN6 input.
kXBARA1_InputIomuxXbarInout07	IOMUX_XBAR_INOUT07 output assigned to XBARA1_IN7 input.
kXBARA1_InputIomuxXbarInout08	IOMUX_XBAR_INOUT08 output assigned to XBARA1_IN8 input.
kXBARA1_InputIomuxXbarInout09	IOMUX_XBAR_INOUT09 output assigned to XBARA1_IN9 input.
kXBARA1_InputIomuxXbarInout10	IOMUX_XBAR_INOUT10 output assigned to XBARA1_IN10 input.
kXBARA1_InputIomuxXbarInout11	IOMUX_XBAR_INOUT11 output assigned to XBARA1_IN11 input.
kXBARA1_InputIomuxXbarInout12	IOMUX_XBAR_INOUT12 output assigned to XBARA1_IN12 input.
kXBARA1_InputIomuxXbarInout13	IOMUX_XBAR_INOUT13 output assigned to XBARA1_IN13 input.
kXBARA1_InputIomuxXbarInout14	IOMUX_XBAR_INOUT14 output assigned to XBARA1_IN14 input.
kXBARA1_InputIomuxXbarInout15	IOMUX_XBAR_INOUT15 output assigned to XBARA1_IN15 input.
kXBARA1_InputIomuxXbarInout16	IOMUX_XBAR_INOUT16 output assigned to XBARA1_IN16 input.
kXBARA1_InputIomuxXbarInout17	IOMUX_XBAR_INOUT17 output assigned to XBARA1_IN17 input.
kXBARA1_InputIomuxXbarInout18	IOMUX_XBAR_INOUT18 output assigned to XBARA1_IN18 input.
kXBARA1_InputIomuxXbarInout19	IOMUX_XBAR_INOUT19 output assigned to XBARA1_IN19 input.
kXBARA1_InputIomuxXbarIn20	IOMUX_XBAR_IN20 output assigned to XBARA1_IN20 input.
kXBARA1_InputIomuxXbarIn21	IOMUX_XBAR_IN21 output assigned to XBARA1_IN21 input.
kXBARA1_InputIomuxXbarIn22	IOMUX_XBAR_IN22 output assigned to XBARA1_IN22 input.
kXBARA1_InputIomuxXbarIn23	IOMUX_XBAR_IN23 output assigned to XBARA1_IN23 input.
kXBARA1_InputIomuxXbarIn24	IOMUX_XBAR_IN24 output assigned to XBARA1_IN24 input.
kXBARA1_InputIomuxXbarIn25	IOMUX_XBAR_IN25 output assigned to XBARA1_IN25 input.
kXBARA1_InputAcmp1Out	ACMP1_OUT output assigned to XBARA1_IN26 input.
kXBARA1_InputAcmp2Out	ACMP2_OUT output assigned to XBARA1_IN27 input.
kXBARA1_InputAcmp3Out	ACMP3_OUT output assigned to XBARA1_IN28 input.
kXBARA1_InputAcmp4Out	ACMP4_OUT output assigned to XBARA1_IN29 input.
kXBARA1_InputRESERVED30	XBARA1_IN30 input is reserved.
kXBARA1_InputRESERVED31	XBARA1_IN31 input is reserved.
kXBARA1_InputQtimer3Tmr0Output	QTIMER3_TMR0_OUTPUT output assigned to XBARA1_IN32 input.
kXBARA1_InputQtimer3Tmr1Output	QTIMER3_TMR1_OUTPUT output assigned to XBARA1_IN33 input.
kXBARA1_InputQtimer3Tmr2Output	QTIMER3_TMR2_OUTPUT output assigned to XBARA1_IN34 input.
kXBARA1_InputQtimer3Tmr3Output	QTIMER3_TMR3_OUTPUT output assigned to XBARA1_IN35 input.
kXBARA1_InputQtimer4Tmr0Output	QTIMER4_TMR0_OUTPUT output assigned to XBARA1_IN36 input.
kXBARA1_InputQtimer4Tmr1Output	QTIMER4_TMR1_OUTPUT output assigned to XBARA1_IN37 input.
kXBARA1_InputQtimer4Tmr2Output	QTIMER4_TMR2_OUTPUT output assigned to XBARA1_IN38 input.
kXBARA1_InputQtimer4Tmr3Output	QTIMER4_TMR3_OUTPUT output assigned to XBARA1_IN39 input.
kXBARA1_InputFlexpwm1Pwm1OutTrig01	FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN40 input.
kXBARA1_InputFlexpwm1Pwm2OutTrig01	FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN41 input.
kXBARA1_InputFlexpwm1Pwm3OutTrig01	FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN42 input.
kXBARA1_InputFlexpwm1Pwm4OutTrig01	FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN43 input.
kXBARA1_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN44 input.
kXBARA1_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN45 input.
kXBARA1_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN46 input.
kXBARA1_InputFlexpwm2Pwm4OutTrig01	FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN47 input.
kXBARA1_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN48 input.
kXBARA1_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN49 input.
kXBARA1_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN50 input.
kXBARA1_InputFlexpwm3Pwm4OutTrig01	FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN51 input.
kXBARA1_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN52 input.
kXBARA1_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN53 input.
kXBARA1_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN54 input.
kXBARA1_InputFlexpwm4Pwm4OutTrig01	FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN55 input.
kXBARA1_InputPitTrigger0	PIT_TRIGGER0 output assigned to XBARA1_IN56 input.
kXBARA1_InputPitTrigger1	PIT_TRIGGER1 output assigned to XBARA1_IN57 input.
kXBARA1_InputPitTrigger2	PIT_TRIGGER2 output assigned to XBARA1_IN58 input.
kXBARA1_InputPitTrigger3	PIT_TRIGGER3 output assigned to XBARA1_IN59 input.
kXBARA1_InputEnc1PosMatch	ENC1_POS_MATCH output assigned to XBARA1_IN60 input.
kXBARA1_InputEnc2PosMatch	ENC2_POS_MATCH output assigned to XBARA1_IN61 input.
kXBARA1_InputEnc3PosMatch	ENC3_POS_MATCH output assigned to XBARA1_IN62 input.
kXBARA1_InputEnc4PosMatch	ENC4_POS_MATCH output assigned to XBARA1_IN63 input.
kXBARA1_InputDmaDone0	DMA_DONE0 output assigned to XBARA1_IN64 input.
kXBARA1_InputDmaDone1	DMA_DONE1 output assigned to XBARA1_IN65 input.
kXBARA1_InputDmaDone2	DMA_DONE2 output assigned to XBARA1_IN66 input.
kXBARA1_InputDmaDone3	DMA_DONE3 output assigned to XBARA1_IN67 input.
kXBARA1_InputDmaDone4	DMA_DONE4 output assigned to XBARA1_IN68 input.
kXBARA1_InputDmaDone5	DMA_DONE5 output assigned to XBARA1_IN69 input.
kXBARA1_InputDmaDone6	DMA_DONE6 output assigned to XBARA1_IN70 input.
kXBARA1_InputDmaDone7	DMA_DONE7 output assigned to XBARA1_IN71 input.
kXBARA1_InputAoi1Out0	AOI1_OUT0 output assigned to XBARA1_IN72 input.
kXBARA1_InputAoi1Out1	AOI1_OUT1 output assigned to XBARA1_IN73 input.
kXBARA1_InputAoi1Out2	AOI1_OUT2 output assigned to XBARA1_IN74 input.
kXBARA1_InputAoi1Out3	AOI1_OUT3 output assigned to XBARA1_IN75 input.
kXBARA1_InputAoi2Out0	AOI2_OUT0 output assigned to XBARA1_IN76 input.
kXBARA1_InputAoi2Out1	AOI2_OUT1 output assigned to XBARA1_IN77 input.
kXBARA1_InputAoi2Out2	AOI2_OUT2 output assigned to XBARA1_IN78 input.
kXBARA1_InputAoi2Out3	AOI2_OUT3 output assigned to XBARA1_IN79 input.
kXBARA1_InputAdcEtcXbar0Coco0	ADC_ETC_XBAR0_COCO0 output assigned to XBARA1_IN80 input.
kXBARA1_InputAdcEtcXbar0Coco1	ADC_ETC_XBAR0_COCO1 output assigned to XBARA1_IN81 input.
kXBARA1_InputAdcEtcXbar0Coco2	ADC_ETC_XBAR0_COCO2 output assigned to XBARA1_IN82 input.
kXBARA1_InputAdcEtcXbar0Coco3	ADC_ETC_XBAR0_COCO3 output assigned to XBARA1_IN83 input.
kXBARA1_InputAdcEtcXbar1Coco0	ADC_ETC_XBAR1_COCO0 output assigned to XBARA1_IN84 input.
kXBARA1_InputAdcEtcXbar1Coco1	ADC_ETC_XBAR1_COCO1 output assigned to XBARA1_IN85 input.
kXBARA1_InputAdcEtcXbar1Coco2	ADC_ETC_XBAR1_COCO2 output assigned to XBARA1_IN86 input.
kXBARA1_InputAdcEtcXbar1Coco3	ADC_ETC_XBAR1_COCO3 output assigned to XBARA1_IN87 input.
kXBARB2_InputLogicLow	LOGIC_LOW output assigned to XBARB2_IN0 input.
kXBARB2_InputLogicHigh	LOGIC_HIGH output assigned to XBARB2_IN1 input.
kXBARB2_InputRESERVED2	XBARB2_IN2 input is reserved.
kXBARB2_InputRESERVED3	XBARB2_IN3 input is reserved.
kXBARB2_InputRESERVED4	XBARB2_IN4 input is reserved.
kXBARB2_InputRESERVED5	XBARB2_IN5 input is reserved.
kXBARB2_InputAcmp1Out	ACMP1_OUT output assigned to XBARB2_IN6 input.
kXBARB2_InputAcmp2Out	ACMP2_OUT output assigned to XBARB2_IN7 input.
kXBARB2_InputAcmp3Out	ACMP3_OUT output assigned to XBARB2_IN8 input.
kXBARB2_InputAcmp4Out	ACMP4_OUT output assigned to XBARB2_IN9 input.
kXBARB2_InputRESERVED10	XBARB2_IN10 input is reserved.
kXBARB2_InputRESERVED11	XBARB2_IN11 input is reserved.
kXBARB2_InputQtimer3Tmr0Output	QTIMER3_TMR0_OUTPUT output assigned to XBARB2_IN12 input.
kXBARB2_InputQtimer3Tmr1Output	QTIMER3_TMR1_OUTPUT output assigned to XBARB2_IN13 input.
kXBARB2_InputQtimer3Tmr2Output	QTIMER3_TMR2_OUTPUT output assigned to XBARB2_IN14 input.
kXBARB2_InputQtimer3Tmr3Output	QTIMER3_TMR3_OUTPUT output assigned to XBARB2_IN15 input.
kXBARB2_InputQtimer4Tmr0Output	QTIMER4_TMR0_OUTPUT output assigned to XBARB2_IN16 input.
kXBARB2_InputQtimer4Tmr1Output	QTIMER4_TMR1_OUTPUT output assigned to XBARB2_IN17 input.
kXBARB2_InputQtimer4Tmr2Output	QTIMER4_TMR2_OUTPUT output assigned to XBARB2_IN18 input.
kXBARB2_InputQtimer4Tmr3Output	QTIMER4_TMR3_OUTPUT output assigned to XBARB2_IN19 input.
kXBARB2_InputFlexpwm1Pwm1OutTrig01	FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN20 input.
kXBARB2_InputFlexpwm1Pwm2OutTrig01	FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN21 input.
kXBARB2_InputFlexpwm1Pwm3OutTrig01	FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN22 input.
kXBARB2_InputFlexpwm1Pwm4OutTrig01	FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN23 input.
kXBARB2_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN24 input.
kXBARB2_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN25 input.
kXBARB2_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN26 input.
kXBARB2_InputFlexpwm2Pwm4OutTrig01	FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN27 input.
kXBARB2_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN28 input.
kXBARB2_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN29 input.
kXBARB2_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN30 input.
kXBARB2_InputFlexpwm3Pwm4OutTrig01	FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN31 input.
kXBARB2_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN32 input.
kXBARB2_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN33 input.
kXBARB2_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN34 input.
kXBARB2_InputFlexpwm4Pwm4OutTrig01	FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN35 input.
kXBARB2_InputPitTrigger0	PIT_TRIGGER0 output assigned to XBARB2_IN36 input.
kXBARB2_InputPitTrigger1	PIT_TRIGGER1 output assigned to XBARB2_IN37 input.
kXBARB2_InputAdcEtcXbar0Coco0	ADC_ETC_XBAR0_COCO0 output assigned to XBARB2_IN38 input.
kXBARB2_InputAdcEtcXbar0Coco1	ADC_ETC_XBAR0_COCO1 output assigned to XBARB2_IN39 input.
kXBARB2_InputAdcEtcXbar0Coco2	ADC_ETC_XBAR0_COCO2 output assigned to XBARB2_IN40 input.
kXBARB2_InputAdcEtcXbar0Coco3	ADC_ETC_XBAR0_COCO3 output assigned to XBARB2_IN41 input.
kXBARB2_InputAdcEtcXbar1Coco0	ADC_ETC_XBAR1_COCO0 output assigned to XBARB2_IN42 input.
kXBARB2_InputAdcEtcXbar1Coco1	ADC_ETC_XBAR1_COCO1 output assigned to XBARB2_IN43 input.
kXBARB2_InputAdcEtcXbar1Coco2	ADC_ETC_XBAR1_COCO2 output assigned to XBARB2_IN44 input.
kXBARB2_InputAdcEtcXbar1Coco3	ADC_ETC_XBAR1_COCO3 output assigned to XBARB2_IN45 input.
kXBARB2_InputEnc1PosMatch	ENC1_POS_MATCH output assigned to XBARB2_IN46 input.
kXBARB2_InputEnc2PosMatch	ENC2_POS_MATCH output assigned to XBARB2_IN47 input.
kXBARB2_InputEnc3PosMatch	ENC3_POS_MATCH output assigned to XBARB2_IN48 input.
kXBARB2_InputEnc4PosMatch	ENC4_POS_MATCH output assigned to XBARB2_IN49 input.
kXBARB2_InputDmaDone0	DMA_DONE0 output assigned to XBARB2_IN50 input.
kXBARB2_InputDmaDone1	DMA_DONE1 output assigned to XBARB2_IN51 input.
kXBARB2_InputDmaDone2	DMA_DONE2 output assigned to XBARB2_IN52 input.
kXBARB2_InputDmaDone3	DMA_DONE3 output assigned to XBARB2_IN53 input.
kXBARB2_InputDmaDone4	DMA_DONE4 output assigned to XBARB2_IN54 input.
kXBARB2_InputDmaDone5	DMA_DONE5 output assigned to XBARB2_IN55 input.
kXBARB2_InputDmaDone6	DMA_DONE6 output assigned to XBARB2_IN56 input.
kXBARB2_InputDmaDone7	DMA_DONE7 output assigned to XBARB2_IN57 input.
kXBARB3_InputLogicLow	LOGIC_LOW output assigned to XBARB3_IN0 input.
kXBARB3_InputLogicHigh	LOGIC_HIGH output assigned to XBARB3_IN1 input.
kXBARB3_InputRESERVED2	XBARB3_IN2 input is reserved.
kXBARB3_InputRESERVED3	XBARB3_IN3 input is reserved.
kXBARB3_InputRESERVED4	XBARB3_IN4 input is reserved.
kXBARB3_InputRESERVED5	XBARB3_IN5 input is reserved.
kXBARB3_InputAcmp1Out	ACMP1_OUT output assigned to XBARB3_IN6 input.
kXBARB3_InputAcmp2Out	ACMP2_OUT output assigned to XBARB3_IN7 input.
kXBARB3_InputAcmp3Out	ACMP3_OUT output assigned to XBARB3_IN8 input.
kXBARB3_InputAcmp4Out	ACMP4_OUT output assigned to XBARB3_IN9 input.
kXBARB3_InputRESERVED10	XBARB3_IN10 input is reserved.
kXBARB3_InputRESERVED11	XBARB3_IN11 input is reserved.
kXBARB3_InputQtimer3Tmr0Output	QTIMER3_TMR0_OUTPUT output assigned to XBARB3_IN12 input.
kXBARB3_InputQtimer3Tmr1Output	QTIMER3_TMR1_OUTPUT output assigned to XBARB3_IN13 input.
kXBARB3_InputQtimer3Tmr2Output	QTIMER3_TMR2_OUTPUT output assigned to XBARB3_IN14 input.
kXBARB3_InputQtimer3Tmr3Output	QTIMER3_TMR3_OUTPUT output assigned to XBARB3_IN15 input.
kXBARB3_InputQtimer4Tmr0Output	QTIMER4_TMR0_OUTPUT output assigned to XBARB3_IN16 input.
kXBARB3_InputQtimer4Tmr1Output	QTIMER4_TMR1_OUTPUT output assigned to XBARB3_IN17 input.
kXBARB3_InputQtimer4Tmr2Output	QTIMER4_TMR2_OUTPUT output assigned to XBARB3_IN18 input.
kXBARB3_InputQtimer4Tmr3Output	QTIMER4_TMR3_OUTPUT output assigned to XBARB3_IN19 input.
kXBARB3_InputFlexpwm1Pwm1OutTrig01	FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN20 input.
kXBARB3_InputFlexpwm1Pwm2OutTrig01	FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN21 input.
kXBARB3_InputFlexpwm1Pwm3OutTrig01	FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN22 input.
kXBARB3_InputFlexpwm1Pwm4OutTrig01	FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN23 input.
kXBARB3_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN24 input.
kXBARB3_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN25 input.
kXBARB3_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN26 input.
kXBARB3_InputFlexpwm2Pwm4OutTrig01	FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN27 input.
kXBARB3_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN28 input.
kXBARB3_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN29 input.
kXBARB3_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN30 input.
kXBARB3_InputFlexpwm3Pwm4OutTrig01	FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN31 input.
kXBARB3_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN32 input.
kXBARB3_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN33 input.
kXBARB3_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN34 input.
kXBARB3_InputFlexpwm4Pwm4OutTrig01	FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN35 input.
kXBARB3_InputPitTrigger0	PIT_TRIGGER0 output assigned to XBARB3_IN36 input.
kXBARB3_InputPitTrigger1	PIT_TRIGGER1 output assigned to XBARB3_IN37 input.
kXBARB3_InputAdcEtcXbar0Coco0	ADC_ETC_XBAR0_COCO0 output assigned to XBARB3_IN38 input.
kXBARB3_InputAdcEtcXbar0Coco1	ADC_ETC_XBAR0_COCO1 output assigned to XBARB3_IN39 input.
kXBARB3_InputAdcEtcXbar0Coco2	ADC_ETC_XBAR0_COCO2 output assigned to XBARB3_IN40 input.
kXBARB3_InputAdcEtcXbar0Coco3	ADC_ETC_XBAR0_COCO3 output assigned to XBARB3_IN41 input.
kXBARB3_InputAdcEtcXbar1Coco0	ADC_ETC_XBAR1_COCO0 output assigned to XBARB3_IN42 input.
kXBARB3_InputAdcEtcXbar1Coco1	ADC_ETC_XBAR1_COCO1 output assigned to XBARB3_IN43 input.
kXBARB3_InputAdcEtcXbar1Coco2	ADC_ETC_XBAR1_COCO2 output assigned to XBARB3_IN44 input.
kXBARB3_InputAdcEtcXbar1Coco3	ADC_ETC_XBAR1_COCO3 output assigned to XBARB3_IN45 input.
kXBARB3_InputEnc1PosMatch	ENC1_POS_MATCH output assigned to XBARB3_IN46 input.
kXBARB3_InputEnc2PosMatch	ENC2_POS_MATCH output assigned to XBARB3_IN47 input.
kXBARB3_InputEnc3PosMatch	ENC3_POS_MATCH output assigned to XBARB3_IN48 input.
kXBARB3_InputEnc4PosMatch	ENC4_POS_MATCH output assigned to XBARB3_IN49 input.
kXBARB3_InputDmaDone0	DMA_DONE0 output assigned to XBARB3_IN50 input.
kXBARB3_InputDmaDone1	DMA_DONE1 output assigned to XBARB3_IN51 input.
kXBARB3_InputDmaDone2	DMA_DONE2 output assigned to XBARB3_IN52 input.
kXBARB3_InputDmaDone3	DMA_DONE3 output assigned to XBARB3_IN53 input.
kXBARB3_InputDmaDone4	DMA_DONE4 output assigned to XBARB3_IN54 input.
kXBARB3_InputDmaDone5	DMA_DONE5 output assigned to XBARB3_IN55 input.
kXBARB3_InputDmaDone6	DMA_DONE6 output assigned to XBARB3_IN56 input.
kXBARB3_InputDmaDone7	DMA_DONE7 output assigned to XBARB3_IN57 input.
kXBARA1_InputLogicLow	LOGIC_LOW output assigned to XBARA1_IN0 input.
kXBARA1_InputLogicHigh	LOGIC_HIGH output assigned to XBARA1_IN1 input.
kXBARA1_InputRESERVED2	XBARA1_IN2 input is reserved.
kXBARA1_InputRESERVED3	XBARA1_IN3 input is reserved.
kXBARA1_InputIomuxXbarInout04	IOMUX_XBAR_INOUT04 output assigned to XBARA1_IN4 input.
kXBARA1_InputIomuxXbarInout05	IOMUX_XBAR_INOUT05 output assigned to XBARA1_IN5 input.
kXBARA1_InputIomuxXbarInout06	IOMUX_XBAR_INOUT06 output assigned to XBARA1_IN6 input.
kXBARA1_InputIomuxXbarInout07	IOMUX_XBAR_INOUT07 output assigned to XBARA1_IN7 input.
kXBARA1_InputIomuxXbarInout08	IOMUX_XBAR_INOUT08 output assigned to XBARA1_IN8 input.
kXBARA1_InputIomuxXbarInout09	IOMUX_XBAR_INOUT09 output assigned to XBARA1_IN9 input.
kXBARA1_InputIomuxXbarInout10	IOMUX_XBAR_INOUT10 output assigned to XBARA1_IN10 input.
kXBARA1_InputIomuxXbarInout11	IOMUX_XBAR_INOUT11 output assigned to XBARA1_IN11 input.
kXBARA1_InputIomuxXbarInout12	IOMUX_XBAR_INOUT12 output assigned to XBARA1_IN12 input.
kXBARA1_InputIomuxXbarInout13	IOMUX_XBAR_INOUT13 output assigned to XBARA1_IN13 input.
kXBARA1_InputIomuxXbarInout14	IOMUX_XBAR_INOUT14 output assigned to XBARA1_IN14 input.
kXBARA1_InputIomuxXbarInout15	IOMUX_XBAR_INOUT15 output assigned to XBARA1_IN15 input.
kXBARA1_InputIomuxXbarInout16	IOMUX_XBAR_INOUT16 output assigned to XBARA1_IN16 input.
kXBARA1_InputIomuxXbarInout17	IOMUX_XBAR_INOUT17 output assigned to XBARA1_IN17 input.
kXBARA1_InputIomuxXbarInout18	IOMUX_XBAR_INOUT18 output assigned to XBARA1_IN18 input.
kXBARA1_InputIomuxXbarInout19	IOMUX_XBAR_INOUT19 output assigned to XBARA1_IN19 input.
kXBARA1_InputIomuxXbarInout20	IOMUX_XBAR_INOUT20 output assigned to XBARA1_IN20 input.
kXBARA1_InputIomuxXbarInout21	IOMUX_XBAR_INOUT21 output assigned to XBARA1_IN21 input.
kXBARA1_InputIomuxXbarInout22	IOMUX_XBAR_INOUT22 output assigned to XBARA1_IN22 input.
kXBARA1_InputIomuxXbarInout23	IOMUX_XBAR_INOUT23 output assigned to XBARA1_IN23 input.
kXBARA1_InputIomuxXbarInout24	IOMUX_XBAR_INOUT24 output assigned to XBARA1_IN24 input.
kXBARA1_InputIomuxXbarInout25	IOMUX_XBAR_INOUT25 output assigned to XBARA1_IN25 input.
kXBARA1_InputIomuxXbarInout26	IOMUX_XBAR_INOUT26 output assigned to XBARA1_IN26 input.
kXBARA1_InputIomuxXbarInout27	IOMUX_XBAR_INOUT27 output assigned to XBARA1_IN27 input.
kXBARA1_InputIomuxXbarInout28	IOMUX_XBAR_INOUT28 output assigned to XBARA1_IN28 input.
kXBARA1_InputIomuxXbarInout29	IOMUX_XBAR_INOUT29 output assigned to XBARA1_IN29 input.
kXBARA1_InputIomuxXbarInout30	IOMUX_XBAR_INOUT30 output assigned to XBARA1_IN30 input.
kXBARA1_InputIomuxXbarInout31	IOMUX_XBAR_INOUT31 output assigned to XBARA1_IN31 input.
kXBARA1_InputIomuxXbarInout32	IOMUX_XBAR_INOUT32 output assigned to XBARA1_IN32 input.
kXBARA1_InputIomuxXbarInout33	IOMUX_XBAR_INOUT33 output assigned to XBARA1_IN33 input.
kXBARA1_InputIomuxXbarInout34	IOMUX_XBAR_INOUT34 output assigned to XBARA1_IN34 input.
kXBARA1_InputIomuxXbarInout35	IOMUX_XBAR_INOUT35 output assigned to XBARA1_IN35 input.
kXBARA1_InputIomuxXbarInout36	IOMUX_XBAR_INOUT36 output assigned to XBARA1_IN36 input.
kXBARA1_InputIomuxXbarInout37	IOMUX_XBAR_INOUT37 output assigned to XBARA1_IN37 input.
kXBARA1_InputIomuxXbarInout38	IOMUX_XBAR_INOUT38 output assigned to XBARA1_IN38 input.
kXBARA1_InputIomuxXbarInout39	IOMUX_XBAR_INOUT39 output assigned to XBARA1_IN39 input.
kXBARA1_InputIomuxXbarInout40	IOMUX_XBAR_INOUT40 output assigned to XBARA1_IN40 input.
kXBARA1_InputRESERVED41	XBARA1_IN41 input is reserved.
kXBARA1_InputAcmp1Out	ACMP1_OUT output assigned to XBARA1_IN42 input.
kXBARA1_InputAcmp2Out	ACMP2_OUT output assigned to XBARA1_IN43 input.
kXBARA1_InputAcmp3Out	ACMP3_OUT output assigned to XBARA1_IN44 input.
kXBARA1_InputAcmp4Out	ACMP4_OUT output assigned to XBARA1_IN45 input.
kXBARA1_InputRESERVED46	XBARA1_IN46 input is reserved.
kXBARA1_InputRESERVED47	XBARA1_IN47 input is reserved.
kXBARA1_InputRESERVED48	XBARA1_IN48 input is reserved.
kXBARA1_InputRESERVED49	XBARA1_IN49 input is reserved.
kXBARA1_InputQtimer1Timer0	QTIMER1_TIMER0 output assigned to XBARA1_IN50 input.
kXBARA1_InputQtimer1Timer1	QTIMER1_TIMER1 output assigned to XBARA1_IN51 input.
kXBARA1_InputQtimer1Timer2	QTIMER1_TIMER2 output assigned to XBARA1_IN52 input.
kXBARA1_InputQtimer1Timer3	QTIMER1_TIMER3 output assigned to XBARA1_IN53 input.
kXBARA1_InputQtimer2Timer0	QTIMER2_TIMER0 output assigned to XBARA1_IN54 input.
kXBARA1_InputQtimer2Timer1	QTIMER2_TIMER1 output assigned to XBARA1_IN55 input.
kXBARA1_InputQtimer2Timer2	QTIMER2_TIMER2 output assigned to XBARA1_IN56 input.
kXBARA1_InputQtimer2Timer3	QTIMER2_TIMER3 output assigned to XBARA1_IN57 input.
kXBARA1_InputQtimer3Timer0	QTIMER3_TIMER0 output assigned to XBARA1_IN58 input.
kXBARA1_InputQtimer3Timer1	QTIMER3_TIMER1 output assigned to XBARA1_IN59 input.
kXBARA1_InputQtimer3Timer2	QTIMER3_TIMER2 output assigned to XBARA1_IN60 input.
kXBARA1_InputQtimer3Timer3	QTIMER3_TIMER3 output assigned to XBARA1_IN61 input.
kXBARA1_InputQtimer4Timer0	QTIMER4_TIMER0 output assigned to XBARA1_IN62 input.
kXBARA1_InputQtimer4Timer1	QTIMER4_TIMER1 output assigned to XBARA1_IN63 input.
kXBARA1_InputQtimer4Timer2	QTIMER4_TIMER2 output assigned to XBARA1_IN64 input.
kXBARA1_InputQtimer4Timer3	QTIMER4_TIMER3 output assigned to XBARA1_IN65 input.
kXBARA1_InputRESERVED66	XBARA1_IN66 input is reserved.
kXBARA1_InputRESERVED67	XBARA1_IN67 input is reserved.
kXBARA1_InputRESERVED68	XBARA1_IN68 input is reserved.
kXBARA1_InputRESERVED69	XBARA1_IN69 input is reserved.
kXBARA1_InputRESERVED70	XBARA1_IN70 input is reserved.
kXBARA1_InputRESERVED71	XBARA1_IN71 input is reserved.
kXBARA1_InputRESERVED72	XBARA1_IN72 input is reserved.
kXBARA1_InputRESERVED73	XBARA1_IN73 input is reserved.
kXBARA1_InputFlexpwm1Pwm0OutTrig0	FLEXPWM1_PWM0_OUT_TRIG0 output assigned to XBARA1_IN74 input.
kXBARA1_InputFlexpwm1Pwm0OutTrig1	FLEXPWM1_PWM0_OUT_TRIG1 output assigned to XBARA1_IN75 input.
kXBARA1_InputFlexpwm1Pwm1OutTrig0	FLEXPWM1_PWM1_OUT_TRIG0 output assigned to XBARA1_IN76 input.
kXBARA1_InputFlexpwm1Pwm1OutTrig1	FLEXPWM1_PWM1_OUT_TRIG1 output assigned to XBARA1_IN77 input.
kXBARA1_InputFlexpwm1Pwm2OutTrig0	FLEXPWM1_PWM2_OUT_TRIG0 output assigned to XBARA1_IN78 input.
kXBARA1_InputFlexpwm1Pwm2OutTrig1	FLEXPWM1_PWM2_OUT_TRIG1 output assigned to XBARA1_IN79 input.
kXBARA1_InputFlexpwm1Pwm3OutTrig0	FLEXPWM1_PWM3_OUT_TRIG0 output assigned to XBARA1_IN80 input.
kXBARA1_InputFlexpwm1Pwm3OutTrig1	FLEXPWM1_PWM3_OUT_TRIG1 output assigned to XBARA1_IN81 input.
kXBARA1_InputFlexpwm2Pwm0OutTrig01	FLEXPWM2_PWM0_OUT_TRIG0_1 output assigned to XBARA1_IN82 input.
kXBARA1_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN83 input.
kXBARA1_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN84 input.
kXBARA1_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN85 input.
kXBARA1_InputFlexpwm3Pwm0OutTrig01	FLEXPWM3_PWM0_OUT_TRIG0_1 output assigned to XBARA1_IN86 input.
kXBARA1_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN87 input.
kXBARA1_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN88 input.
kXBARA1_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN89 input.
kXBARA1_InputFlexpwm4Pwm0OutTrig01	FLEXPWM4_PWM0_OUT_TRIG0_1 output assigned to XBARA1_IN90 input.
kXBARA1_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN91 input.
kXBARA1_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN92 input.
kXBARA1_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN93 input.
kXBARA1_InputRESERVED94	XBARA1_IN94 input is reserved.
kXBARA1_InputRESERVED95	XBARA1_IN95 input is reserved.
kXBARA1_InputRESERVED96	XBARA1_IN96 input is reserved.
kXBARA1_InputRESERVED97	XBARA1_IN97 input is reserved.
kXBARA1_InputRESERVED98	XBARA1_IN98 input is reserved.
kXBARA1_InputRESERVED99	XBARA1_IN99 input is reserved.
kXBARA1_InputRESERVED100	XBARA1_IN100 input is reserved.
kXBARA1_InputRESERVED101	XBARA1_IN101 input is reserved.
kXBARA1_InputPit1Trigger0	PIT1_TRIGGER0 output assigned to XBARA1_IN102 input.
kXBARA1_InputPit1Trigger1	PIT1_TRIGGER1 output assigned to XBARA1_IN103 input.
kXBARA1_InputPit1Trigger2	PIT1_TRIGGER2 output assigned to XBARA1_IN104 input.
kXBARA1_InputPit1Trigger3	PIT1_TRIGGER3 output assigned to XBARA1_IN105 input.
kXBARA1_InputDec1PosMatch	DEC1_POS_MATCH output assigned to XBARA1_IN106 input.
kXBARA1_InputDec2PosMatch	DEC2_POS_MATCH output assigned to XBARA1_IN107 input.
kXBARA1_InputDec3PosMatch	DEC3_POS_MATCH output assigned to XBARA1_IN108 input.
kXBARA1_InputDec4PosMatch	DEC4_POS_MATCH output assigned to XBARA1_IN109 input.
kXBARA1_InputRESERVED110	XBARA1_IN110 input is reserved.
kXBARA1_InputRESERVED111	XBARA1_IN111 input is reserved.
kXBARA1_InputDmaDone0	DMA_DONE0 output assigned to XBARA1_IN112 input.
kXBARA1_InputDmaDone1	DMA_DONE1 output assigned to XBARA1_IN113 input.
kXBARA1_InputDmaDone2	DMA_DONE2 output assigned to XBARA1_IN114 input.
kXBARA1_InputDmaDone3	DMA_DONE3 output assigned to XBARA1_IN115 input.
kXBARA1_InputDmaDone4	DMA_DONE4 output assigned to XBARA1_IN116 input.
kXBARA1_InputDmaDone5	DMA_DONE5 output assigned to XBARA1_IN117 input.
kXBARA1_InputDmaDone6	DMA_DONE6 output assigned to XBARA1_IN118 input.
kXBARA1_InputDmaDone7	DMA_DONE7 output assigned to XBARA1_IN119 input.
kXBARA1_InputDmaLpsrDone0	DMA_LPSR_DONE0 output assigned to XBARA1_IN120 input.
kXBARA1_InputDmaLpsrDone1	DMA_LPSR_DONE1 output assigned to XBARA1_IN121 input.
kXBARA1_InputDmaLpsrDone2	DMA_LPSR_DONE2 output assigned to XBARA1_IN122 input.
kXBARA1_InputDmaLpsrDone3	DMA_LPSR_DONE3 output assigned to XBARA1_IN123 input.
kXBARA1_InputDmaLpsrDone4	DMA_LPSR_DONE4 output assigned to XBARA1_IN124 input.
kXBARA1_InputDmaLpsrDone5	DMA_LPSR_DONE5 output assigned to XBARA1_IN125 input.
kXBARA1_InputDmaLpsrDone6	DMA_LPSR_DONE6 output assigned to XBARA1_IN126 input.
kXBARA1_InputDmaLpsrDone7	DMA_LPSR_DONE7 output assigned to XBARA1_IN127 input.
kXBARA1_InputAoi1Out0	AOI1_OUT0 output assigned to XBARA1_IN128 input.
kXBARA1_InputAoi1Out1	AOI1_OUT1 output assigned to XBARA1_IN129 input.
kXBARA1_InputAoi1Out2	AOI1_OUT2 output assigned to XBARA1_IN130 input.
kXBARA1_InputAoi1Out3	AOI1_OUT3 output assigned to XBARA1_IN131 input.
kXBARA1_InputAoi2Out0	AOI2_OUT0 output assigned to XBARA1_IN132 input.
kXBARA1_InputAoi2Out1	AOI2_OUT1 output assigned to XBARA1_IN133 input.
kXBARA1_InputAoi2Out2	AOI2_OUT2 output assigned to XBARA1_IN134 input.
kXBARA1_InputAoi2Out3	AOI2_OUT3 output assigned to XBARA1_IN135 input.
kXBARA1_InputAdcEtc0Coco0	ADC_ETC0_COCO0 output assigned to XBARA1_IN136 input.
kXBARA1_InputAdcEtc0Coco1	ADC_ETC0_COCO1 output assigned to XBARA1_IN137 input.
kXBARA1_InputAdcEtc0Coco2	ADC_ETC0_COCO2 output assigned to XBARA1_IN138 input.
kXBARA1_InputAdcEtc0Coco3	ADC_ETC0_COCO3 output assigned to XBARA1_IN139 input.
kXBARA1_InputAdcEtc1Coco0	ADC_ETC1_COCO0 output assigned to XBARA1_IN140 input.
kXBARA1_InputAdcEtc1Coco1	ADC_ETC1_COCO1 output assigned to XBARA1_IN141 input.
kXBARA1_InputAdcEtc1Coco2	ADC_ETC1_COCO2 output assigned to XBARA1_IN142 input.
kXBARA1_InputAdcEtc1Coco3	ADC_ETC1_COCO3 output assigned to XBARA1_IN143 input.
kXBARB2_InputLogicLow	LOGIC_LOW output assigned to XBARB2_IN0 input.
kXBARB2_InputLogicHigh	LOGIC_HIGH output assigned to XBARB2_IN1 input.
kXBARB2_InputAcmp1Out	ACMP1_OUT output assigned to XBARB2_IN2 input.
kXBARB2_InputAcmp2Out	ACMP2_OUT output assigned to XBARB2_IN3 input.
kXBARB2_InputAcmp3Out	ACMP3_OUT output assigned to XBARB2_IN4 input.
kXBARB2_InputAcmp4Out	ACMP4_OUT output assigned to XBARB2_IN5 input.
kXBARB2_InputRESERVED6	XBARB2_IN6 input is reserved.
kXBARB2_InputRESERVED7	XBARB2_IN7 input is reserved.
kXBARB2_InputRESERVED8	XBARB2_IN8 input is reserved.
kXBARB2_InputRESERVED9	XBARB2_IN9 input is reserved.
kXBARB2_InputQtimer1Timer0	QTIMER1_TIMER0 output assigned to XBARB2_IN10 input.
kXBARB2_InputQtimer1Timer1	QTIMER1_TIMER1 output assigned to XBARB2_IN11 input.
kXBARB2_InputQtimer1Timer2	QTIMER1_TIMER2 output assigned to XBARB2_IN12 input.
kXBARB2_InputQtimer1Timer3	QTIMER1_TIMER3 output assigned to XBARB2_IN13 input.
kXBARB2_InputQtimer2Timer0	QTIMER2_TIMER0 output assigned to XBARB2_IN14 input.
kXBARB2_InputQtimer2Timer1	QTIMER2_TIMER1 output assigned to XBARB2_IN15 input.
kXBARB2_InputQtimer2Timer2	QTIMER2_TIMER2 output assigned to XBARB2_IN16 input.
kXBARB2_InputQtimer2Timer3	QTIMER2_TIMER3 output assigned to XBARB2_IN17 input.
kXBARB2_InputQtimer3Timer0	QTIMER3_TIMER0 output assigned to XBARB2_IN18 input.
kXBARB2_InputQtimer3Timer1	QTIMER3_TIMER1 output assigned to XBARB2_IN19 input.
kXBARB2_InputQtimer3Timer2	QTIMER3_TIMER2 output assigned to XBARB2_IN20 input.
kXBARB2_InputQtimer3Timer3	QTIMER3_TIMER3 output assigned to XBARB2_IN21 input.
kXBARB2_InputQtimer4Timer0	QTIMER4_TIMER0 output assigned to XBARB2_IN22 input.
kXBARB2_InputQtimer4Timer1	QTIMER4_TIMER1 output assigned to XBARB2_IN23 input.
kXBARB2_InputQtimer4Timer2	QTIMER4_TIMER2 output assigned to XBARB2_IN24 input.
kXBARB2_InputQtimer4Timer3	QTIMER4_TIMER3 output assigned to XBARB2_IN25 input.
kXBARB2_InputRESERVED26	XBARB2_IN26 input is reserved.
kXBARB2_InputRESERVED27	XBARB2_IN27 input is reserved.
kXBARB2_InputRESERVED28	XBARB2_IN28 input is reserved.
kXBARB2_InputRESERVED29	XBARB2_IN29 input is reserved.
kXBARB2_InputRESERVED30	XBARB2_IN30 input is reserved.
kXBARB2_InputRESERVED31	XBARB2_IN31 input is reserved.
kXBARB2_InputRESERVED32	XBARB2_IN32 input is reserved.
kXBARB2_InputRESERVED33	XBARB2_IN33 input is reserved.
kXBARB2_InputFlexpwm1Pwm0OutTrig01	FLEXPWM1_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN34 input.
kXBARB2_InputFlexpwm1Pwm1OutTrig01	FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN35 input.
kXBARB2_InputFlexpwm1Pwm2OutTrig01	FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN36 input.
kXBARB2_InputFlexpwm1Pwm3OutTrig01	FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN37 input.
kXBARB2_InputFlexpwm2Pwm0OutTrig01	FLEXPWM2_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN38 input.
kXBARB2_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN39 input.
kXBARB2_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN40 input.
kXBARB2_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN41 input.
kXBARB2_InputFlexpwm3Pwm0OutTrig01	FLEXPWM3_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN42 input.
kXBARB2_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN43 input.
kXBARB2_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN44 input.
kXBARB2_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN45 input.
kXBARB2_InputFlexpwm4Pwm0OutTrig01	FLEXPWM4_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN46 input.
kXBARB2_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN47 input.
kXBARB2_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN48 input.
kXBARB2_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN49 input.
kXBARB2_InputRESERVED50	XBARB2_IN50 input is reserved.
kXBARB2_InputRESERVED51	XBARB2_IN51 input is reserved.
kXBARB2_InputRESERVED52	XBARB2_IN52 input is reserved.
kXBARB2_InputRESERVED53	XBARB2_IN53 input is reserved.
kXBARB2_InputRESERVED54	XBARB2_IN54 input is reserved.
kXBARB2_InputRESERVED55	XBARB2_IN55 input is reserved.
kXBARB2_InputRESERVED56	XBARB2_IN56 input is reserved.
kXBARB2_InputRESERVED57	XBARB2_IN57 input is reserved.
kXBARB2_InputPit1Trigger0	PIT1_TRIGGER0 output assigned to XBARB2_IN58 input.
kXBARB2_InputPit1Trigger1	PIT1_TRIGGER1 output assigned to XBARB2_IN59 input.
kXBARB2_InputAdcEtc0Coco0	ADC_ETC0_COCO0 output assigned to XBARB2_IN60 input.
kXBARB2_InputAdcEtc0Coco1	ADC_ETC0_COCO1 output assigned to XBARB2_IN61 input.
kXBARB2_InputAdcEtc0Coco2	ADC_ETC0_COCO2 output assigned to XBARB2_IN62 input.
kXBARB2_InputAdcEtc0Coco3	ADC_ETC0_COCO3 output assigned to XBARB2_IN63 input.
kXBARB2_InputAdcEtc1Coco0	ADC_ETC1_COCO0 output assigned to XBARB2_IN64 input.
kXBARB2_InputAdcEtc1Coco1	ADC_ETC1_COCO1 output assigned to XBARB2_IN65 input.
kXBARB2_InputAdcEtc1Coco2	ADC_ETC1_COCO2 output assigned to XBARB2_IN66 input.
kXBARB2_InputAdcEtc1Coco3	ADC_ETC1_COCO3 output assigned to XBARB2_IN67 input.
kXBARB2_InputRESERVED68	XBARB2_IN68 input is reserved.
kXBARB2_InputRESERVED69	XBARB2_IN69 input is reserved.
kXBARB2_InputRESERVED70	XBARB2_IN70 input is reserved.
kXBARB2_InputRESERVED71	XBARB2_IN71 input is reserved.
kXBARB2_InputRESERVED72	XBARB2_IN72 input is reserved.
kXBARB2_InputRESERVED73	XBARB2_IN73 input is reserved.
kXBARB2_InputRESERVED74	XBARB2_IN74 input is reserved.
kXBARB2_InputRESERVED75	XBARB2_IN75 input is reserved.
kXBARB2_InputDec1PosMatch	DEC1_POS_MATCH output assigned to XBARB2_IN76 input.
kXBARB2_InputDec2PosMatch	DEC2_POS_MATCH output assigned to XBARB2_IN77 input.
kXBARB2_InputDec3PosMatch	DEC3_POS_MATCH output assigned to XBARB2_IN78 input.
kXBARB2_InputDec4PosMatch	DEC4_POS_MATCH output assigned to XBARB2_IN79 input.
kXBARB2_InputRESERVED80	XBARB2_IN80 input is reserved.
kXBARB2_InputRESERVED81	XBARB2_IN81 input is reserved.
kXBARB2_InputDmaDone0	DMA_DONE0 output assigned to XBARB2_IN82 input.
kXBARB2_InputDmaDone1	DMA_DONE1 output assigned to XBARB2_IN83 input.
kXBARB2_InputDmaDone2	DMA_DONE2 output assigned to XBARB2_IN84 input.
kXBARB2_InputDmaDone3	DMA_DONE3 output assigned to XBARB2_IN85 input.
kXBARB2_InputDmaDone4	DMA_DONE4 output assigned to XBARB2_IN86 input.
kXBARB2_InputDmaDone5	DMA_DONE5 output assigned to XBARB2_IN87 input.
kXBARB2_InputDmaDone6	DMA_DONE6 output assigned to XBARB2_IN88 input.
kXBARB2_InputDmaDone7	DMA_DONE7 output assigned to XBARB2_IN89 input.
kXBARB2_InputDmaLpsrDone0	DMA_LPSR_DONE0 output assigned to XBARB2_IN90 input.
kXBARB2_InputDmaLpsrDone1	DMA_LPSR_DONE1 output assigned to XBARB2_IN91 input.
kXBARB2_InputDmaLpsrDone2	DMA_LPSR_DONE2 output assigned to XBARB2_IN92 input.
kXBARB2_InputDmaLpsrDone3	DMA_LPSR_DONE3 output assigned to XBARB2_IN93 input.
kXBARB2_InputDmaLpsrDone4	DMA_LPSR_DONE4 output assigned to XBARB2_IN94 input.
kXBARB2_InputDmaLpsrDone5	DMA_LPSR_DONE5 output assigned to XBARB2_IN95 input.
kXBARB2_InputDmaLpsrDone6	DMA_LPSR_DONE6 output assigned to XBARB2_IN96 input.
kXBARB2_InputDmaLpsrDone7	DMA_LPSR_DONE7 output assigned to XBARB2_IN97 input.
kXBARB3_InputLogicLow	LOGIC_LOW output assigned to XBARB3_IN0 input.
kXBARB3_InputLogicHigh	LOGIC_HIGH output assigned to XBARB3_IN1 input.
kXBARB3_InputAcmp1Out	ACMP1_OUT output assigned to XBARB3_IN2 input.
kXBARB3_InputAcmp2Out	ACMP2_OUT output assigned to XBARB3_IN3 input.
kXBARB3_InputAcmp3Out	ACMP3_OUT output assigned to XBARB3_IN4 input.
kXBARB3_InputAcmp4Out	ACMP4_OUT output assigned to XBARB3_IN5 input.
kXBARB3_InputRESERVED6	XBARB3_IN6 input is reserved.
kXBARB3_InputRESERVED7	XBARB3_IN7 input is reserved.
kXBARB3_InputRESERVED8	XBARB3_IN8 input is reserved.
kXBARB3_InputRESERVED9	XBARB3_IN9 input is reserved.
kXBARB3_InputQtimer1Timer0	QTIMER1_TIMER0 output assigned to XBARB3_IN10 input.
kXBARB3_InputQtimer1Timer1	QTIMER1_TIMER1 output assigned to XBARB3_IN11 input.
kXBARB3_InputQtimer1Timer2	QTIMER1_TIMER2 output assigned to XBARB3_IN12 input.
kXBARB3_InputQtimer1Timer3	QTIMER1_TIMER3 output assigned to XBARB3_IN13 input.
kXBARB3_InputQtimer2Timer0	QTIMER2_TIMER0 output assigned to XBARB3_IN14 input.
kXBARB3_InputQtimer2Timer1	QTIMER2_TIMER1 output assigned to XBARB3_IN15 input.
kXBARB3_InputQtimer2Timer2	QTIMER2_TIMER2 output assigned to XBARB3_IN16 input.
kXBARB3_InputQtimer2Timer3	QTIMER2_TIMER3 output assigned to XBARB3_IN17 input.
kXBARB3_InputQtimer3Timer0	QTIMER3_TIMER0 output assigned to XBARB3_IN18 input.
kXBARB3_InputQtimer3Timer1	QTIMER3_TIMER1 output assigned to XBARB3_IN19 input.
kXBARB3_InputQtimer3Timer2	QTIMER3_TIMER2 output assigned to XBARB3_IN20 input.
kXBARB3_InputQtimer3Timer3	QTIMER3_TIMER3 output assigned to XBARB3_IN21 input.
kXBARB3_InputQtimer4Timer0	QTIMER4_TIMER0 output assigned to XBARB3_IN22 input.
kXBARB3_InputQtimer4Timer1	QTIMER4_TIMER1 output assigned to XBARB3_IN23 input.
kXBARB3_InputQtimer4Timer2	QTIMER4_TIMER2 output assigned to XBARB3_IN24 input.
kXBARB3_InputQtimer4Timer3	QTIMER4_TIMER3 output assigned to XBARB3_IN25 input.
kXBARB3_InputRESERVED26	XBARB3_IN26 input is reserved.
kXBARB3_InputRESERVED27	XBARB3_IN27 input is reserved.
kXBARB3_InputRESERVED28	XBARB3_IN28 input is reserved.
kXBARB3_InputRESERVED29	XBARB3_IN29 input is reserved.
kXBARB3_InputRESERVED30	XBARB3_IN30 input is reserved.
kXBARB3_InputRESERVED31	XBARB3_IN31 input is reserved.
kXBARB3_InputRESERVED32	XBARB3_IN32 input is reserved.
kXBARB3_InputRESERVED33	XBARB3_IN33 input is reserved.
kXBARB3_InputFlexpwm1Pwm0OutTrig01	FLEXPWM1_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN34 input.
kXBARB3_InputFlexpwm1Pwm1OutTrig01	FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN35 input.
kXBARB3_InputFlexpwm1Pwm2OutTrig01	FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN36 input.
kXBARB3_InputFlexpwm1Pwm3OutTrig01	FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN37 input.
kXBARB3_InputFlexpwm2Pwm0OutTrig01	FLEXPWM2_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN38 input.
kXBARB3_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN39 input.
kXBARB3_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN40 input.
kXBARB3_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN41 input.
kXBARB3_InputFlexpwm3Pwm0OutTrig01	FLEXPWM3_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN42 input.
kXBARB3_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN43 input.
kXBARB3_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN44 input.
kXBARB3_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN45 input.
kXBARB3_InputFlexpwm4Pwm0OutTrig01	FLEXPWM4_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN46 input.
kXBARB3_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN47 input.
kXBARB3_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN48 input.
kXBARB3_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN49 input.
kXBARB3_InputRESERVED50	XBARB3_IN50 input is reserved.
kXBARB3_InputRESERVED51	XBARB3_IN51 input is reserved.
kXBARB3_InputRESERVED52	XBARB3_IN52 input is reserved.
kXBARB3_InputRESERVED53	XBARB3_IN53 input is reserved.
kXBARB3_InputRESERVED54	XBARB3_IN54 input is reserved.
kXBARB3_InputRESERVED55	XBARB3_IN55 input is reserved.
kXBARB3_InputRESERVED56	XBARB3_IN56 input is reserved.
kXBARB3_InputRESERVED57	XBARB3_IN57 input is reserved.
kXBARB3_InputPit1Trigger0	PIT1_TRIGGER0 output assigned to XBARB3_IN58 input.
kXBARB3_InputPit1Trigger1	PIT1_TRIGGER1 output assigned to XBARB3_IN59 input.
kXBARB3_InputAdcEtc0Coco0	ADC_ETC0_COCO0 output assigned to XBARB3_IN60 input.
kXBARB3_InputAdcEtc0Coco1	ADC_ETC0_COCO1 output assigned to XBARB3_IN61 input.
kXBARB3_InputAdcEtc0Coco2	ADC_ETC0_COCO2 output assigned to XBARB3_IN62 input.
kXBARB3_InputAdcEtc0Coco3	ADC_ETC0_COCO3 output assigned to XBARB3_IN63 input.
kXBARB3_InputAdcEtc1Coco0	ADC_ETC1_COCO0 output assigned to XBARB3_IN64 input.
kXBARB3_InputAdcEtc1Coco1	ADC_ETC1_COCO1 output assigned to XBARB3_IN65 input.
kXBARB3_InputAdcEtc1Coco2	ADC_ETC1_COCO2 output assigned to XBARB3_IN66 input.
kXBARB3_InputAdcEtc1Coco3	ADC_ETC1_COCO3 output assigned to XBARB3_IN67 input.
kXBARB3_InputRESERVED68	XBARB3_IN68 input is reserved.
kXBARB3_InputRESERVED69	XBARB3_IN69 input is reserved.
kXBARB3_InputRESERVED70	XBARB3_IN70 input is reserved.
kXBARB3_InputRESERVED71	XBARB3_IN71 input is reserved.
kXBARB3_InputRESERVED72	XBARB3_IN72 input is reserved.
kXBARB3_InputRESERVED73	XBARB3_IN73 input is reserved.
kXBARB3_InputRESERVED74	XBARB3_IN74 input is reserved.
kXBARB3_InputRESERVED75	XBARB3_IN75 input is reserved.
kXBARB3_InputDec1PosMatch	DEC1_POS_MATCH output assigned to XBARB3_IN76 input.
kXBARB3_InputDec2PosMatch	DEC2_POS_MATCH output assigned to XBARB3_IN77 input.
kXBARB3_InputDec3PosMatch	DEC3_POS_MATCH output assigned to XBARB3_IN78 input.
kXBARB3_InputDec4PosMatch	DEC4_POS_MATCH output assigned to XBARB3_IN79 input.
kXBARB3_InputRESERVED80	XBARB3_IN80 input is reserved.
kXBARB3_InputRESERVED81	XBARB3_IN81 input is reserved.
kXBARB3_InputDmaDone0	DMA_DONE0 output assigned to XBARB3_IN82 input.
kXBARB3_InputDmaDone1	DMA_DONE1 output assigned to XBARB3_IN83 input.
kXBARB3_InputDmaDone2	DMA_DONE2 output assigned to XBARB3_IN84 input.
kXBARB3_InputDmaDone3	DMA_DONE3 output assigned to XBARB3_IN85 input.
kXBARB3_InputDmaDone4	DMA_DONE4 output assigned to XBARB3_IN86 input.
kXBARB3_InputDmaDone5	DMA_DONE5 output assigned to XBARB3_IN87 input.
kXBARB3_InputDmaDone6	DMA_DONE6 output assigned to XBARB3_IN88 input.
kXBARB3_InputDmaDone7	DMA_DONE7 output assigned to XBARB3_IN89 input.
kXBARB3_InputDmaLpsrDone0	DMA_LPSR_DONE0 output assigned to XBARB3_IN90 input.
kXBARB3_InputDmaLpsrDone1	DMA_LPSR_DONE1 output assigned to XBARB3_IN91 input.
kXBARB3_InputDmaLpsrDone2	DMA_LPSR_DONE2 output assigned to XBARB3_IN92 input.
kXBARB3_InputDmaLpsrDone3	DMA_LPSR_DONE3 output assigned to XBARB3_IN93 input.
kXBARB3_InputDmaLpsrDone4	DMA_LPSR_DONE4 output assigned to XBARB3_IN94 input.
kXBARB3_InputDmaLpsrDone5	DMA_LPSR_DONE5 output assigned to XBARB3_IN95 input.
kXBARB3_InputDmaLpsrDone6	DMA_LPSR_DONE6 output assigned to XBARB3_IN96 input.
kXBARB3_InputDmaLpsrDone7	DMA_LPSR_DONE7 output assigned to XBARB3_IN97 input.
kXBARA1_InputLogicLow	LOGIC_LOW output assigned to XBARA1_IN0 input.
kXBARA1_InputLogicHigh	LOGIC_HIGH output assigned to XBARA1_IN1 input.
kXBARA1_InputRESERVED2	XBARA1_IN2 input is reserved.
kXBARA1_InputRESERVED3	XBARA1_IN3 input is reserved.
kXBARA1_InputIomuxXbarInout04	IOMUX_XBAR_INOUT04 output assigned to XBARA1_IN4 input.
kXBARA1_InputIomuxXbarInout05	IOMUX_XBAR_INOUT05 output assigned to XBARA1_IN5 input.
kXBARA1_InputIomuxXbarInout06	IOMUX_XBAR_INOUT06 output assigned to XBARA1_IN6 input.
kXBARA1_InputIomuxXbarInout07	IOMUX_XBAR_INOUT07 output assigned to XBARA1_IN7 input.
kXBARA1_InputIomuxXbarInout08	IOMUX_XBAR_INOUT08 output assigned to XBARA1_IN8 input.
kXBARA1_InputIomuxXbarInout09	IOMUX_XBAR_INOUT09 output assigned to XBARA1_IN9 input.
kXBARA1_InputIomuxXbarInout10	IOMUX_XBAR_INOUT10 output assigned to XBARA1_IN10 input.
kXBARA1_InputIomuxXbarInout11	IOMUX_XBAR_INOUT11 output assigned to XBARA1_IN11 input.
kXBARA1_InputIomuxXbarInout12	IOMUX_XBAR_INOUT12 output assigned to XBARA1_IN12 input.
kXBARA1_InputIomuxXbarInout13	IOMUX_XBAR_INOUT13 output assigned to XBARA1_IN13 input.
kXBARA1_InputIomuxXbarInout14	IOMUX_XBAR_INOUT14 output assigned to XBARA1_IN14 input.
kXBARA1_InputIomuxXbarInout15	IOMUX_XBAR_INOUT15 output assigned to XBARA1_IN15 input.
kXBARA1_InputIomuxXbarInout16	IOMUX_XBAR_INOUT16 output assigned to XBARA1_IN16 input.
kXBARA1_InputIomuxXbarInout17	IOMUX_XBAR_INOUT17 output assigned to XBARA1_IN17 input.
kXBARA1_InputIomuxXbarInout18	IOMUX_XBAR_INOUT18 output assigned to XBARA1_IN18 input.
kXBARA1_InputIomuxXbarInout19	IOMUX_XBAR_INOUT19 output assigned to XBARA1_IN19 input.
kXBARA1_InputIomuxXbarInout20	IOMUX_XBAR_INOUT20 output assigned to XBARA1_IN20 input.
kXBARA1_InputIomuxXbarInout21	IOMUX_XBAR_INOUT21 output assigned to XBARA1_IN21 input.
kXBARA1_InputIomuxXbarInout22	IOMUX_XBAR_INOUT22 output assigned to XBARA1_IN22 input.
kXBARA1_InputIomuxXbarInout23	IOMUX_XBAR_INOUT23 output assigned to XBARA1_IN23 input.
kXBARA1_InputIomuxXbarInout24	IOMUX_XBAR_INOUT24 output assigned to XBARA1_IN24 input.
kXBARA1_InputIomuxXbarInout25	IOMUX_XBAR_INOUT25 output assigned to XBARA1_IN25 input.
kXBARA1_InputIomuxXbarInout26	IOMUX_XBAR_INOUT26 output assigned to XBARA1_IN26 input.
kXBARA1_InputIomuxXbarInout27	IOMUX_XBAR_INOUT27 output assigned to XBARA1_IN27 input.
kXBARA1_InputIomuxXbarInout28	IOMUX_XBAR_INOUT28 output assigned to XBARA1_IN28 input.
kXBARA1_InputIomuxXbarInout29	IOMUX_XBAR_INOUT29 output assigned to XBARA1_IN29 input.
kXBARA1_InputIomuxXbarInout30	IOMUX_XBAR_INOUT30 output assigned to XBARA1_IN30 input.
kXBARA1_InputIomuxXbarInout31	IOMUX_XBAR_INOUT31 output assigned to XBARA1_IN31 input.
kXBARA1_InputIomuxXbarInout32	IOMUX_XBAR_INOUT32 output assigned to XBARA1_IN32 input.
kXBARA1_InputIomuxXbarInout33	IOMUX_XBAR_INOUT33 output assigned to XBARA1_IN33 input.
kXBARA1_InputIomuxXbarInout34	IOMUX_XBAR_INOUT34 output assigned to XBARA1_IN34 input.
kXBARA1_InputIomuxXbarInout35	IOMUX_XBAR_INOUT35 output assigned to XBARA1_IN35 input.
kXBARA1_InputIomuxXbarInout36	IOMUX_XBAR_INOUT36 output assigned to XBARA1_IN36 input.
kXBARA1_InputIomuxXbarInout37	IOMUX_XBAR_INOUT37 output assigned to XBARA1_IN37 input.
kXBARA1_InputIomuxXbarInout38	IOMUX_XBAR_INOUT38 output assigned to XBARA1_IN38 input.
kXBARA1_InputIomuxXbarInout39	IOMUX_XBAR_INOUT39 output assigned to XBARA1_IN39 input.
kXBARA1_InputIomuxXbarInout40	IOMUX_XBAR_INOUT40 output assigned to XBARA1_IN40 input.
kXBARA1_InputRESERVED41	XBARA1_IN41 input is reserved.
kXBARA1_InputAcmp1Out	ACMP1_OUT output assigned to XBARA1_IN42 input.
kXBARA1_InputAcmp2Out	ACMP2_OUT output assigned to XBARA1_IN43 input.
kXBARA1_InputAcmp3Out	ACMP3_OUT output assigned to XBARA1_IN44 input.
kXBARA1_InputAcmp4Out	ACMP4_OUT output assigned to XBARA1_IN45 input.
kXBARA1_InputRESERVED46	XBARA1_IN46 input is reserved.
kXBARA1_InputRESERVED47	XBARA1_IN47 input is reserved.
kXBARA1_InputRESERVED48	XBARA1_IN48 input is reserved.
kXBARA1_InputRESERVED49	XBARA1_IN49 input is reserved.
kXBARA1_InputQtimer1Timer0	QTIMER1_TIMER0 output assigned to XBARA1_IN50 input.
kXBARA1_InputQtimer1Timer1	QTIMER1_TIMER1 output assigned to XBARA1_IN51 input.
kXBARA1_InputQtimer1Timer2	QTIMER1_TIMER2 output assigned to XBARA1_IN52 input.
kXBARA1_InputQtimer1Timer3	QTIMER1_TIMER3 output assigned to XBARA1_IN53 input.
kXBARA1_InputQtimer2Timer0	QTIMER2_TIMER0 output assigned to XBARA1_IN54 input.
kXBARA1_InputQtimer2Timer1	QTIMER2_TIMER1 output assigned to XBARA1_IN55 input.
kXBARA1_InputQtimer2Timer2	QTIMER2_TIMER2 output assigned to XBARA1_IN56 input.
kXBARA1_InputQtimer2Timer3	QTIMER2_TIMER3 output assigned to XBARA1_IN57 input.
kXBARA1_InputQtimer3Timer0	QTIMER3_TIMER0 output assigned to XBARA1_IN58 input.
kXBARA1_InputQtimer3Timer1	QTIMER3_TIMER1 output assigned to XBARA1_IN59 input.
kXBARA1_InputQtimer3Timer2	QTIMER3_TIMER2 output assigned to XBARA1_IN60 input.
kXBARA1_InputQtimer3Timer3	QTIMER3_TIMER3 output assigned to XBARA1_IN61 input.
kXBARA1_InputQtimer4Timer0	QTIMER4_TIMER0 output assigned to XBARA1_IN62 input.
kXBARA1_InputQtimer4Timer1	QTIMER4_TIMER1 output assigned to XBARA1_IN63 input.
kXBARA1_InputQtimer4Timer2	QTIMER4_TIMER2 output assigned to XBARA1_IN64 input.
kXBARA1_InputQtimer4Timer3	QTIMER4_TIMER3 output assigned to XBARA1_IN65 input.
kXBARA1_InputRESERVED66	XBARA1_IN66 input is reserved.
kXBARA1_InputRESERVED67	XBARA1_IN67 input is reserved.
kXBARA1_InputRESERVED68	XBARA1_IN68 input is reserved.
kXBARA1_InputRESERVED69	XBARA1_IN69 input is reserved.
kXBARA1_InputRESERVED70	XBARA1_IN70 input is reserved.
kXBARA1_InputRESERVED71	XBARA1_IN71 input is reserved.
kXBARA1_InputRESERVED72	XBARA1_IN72 input is reserved.
kXBARA1_InputRESERVED73	XBARA1_IN73 input is reserved.
kXBARA1_InputFlexpwm1Pwm0OutTrig0	FLEXPWM1_PWM0_OUT_TRIG0 output assigned to XBARA1_IN74 input.
kXBARA1_InputFlexpwm1Pwm0OutTrig1	FLEXPWM1_PWM0_OUT_TRIG1 output assigned to XBARA1_IN75 input.
kXBARA1_InputFlexpwm1Pwm1OutTrig0	FLEXPWM1_PWM1_OUT_TRIG0 output assigned to XBARA1_IN76 input.
kXBARA1_InputFlexpwm1Pwm1OutTrig1	FLEXPWM1_PWM1_OUT_TRIG1 output assigned to XBARA1_IN77 input.
kXBARA1_InputFlexpwm1Pwm2OutTrig0	FLEXPWM1_PWM2_OUT_TRIG0 output assigned to XBARA1_IN78 input.
kXBARA1_InputFlexpwm1Pwm2OutTrig1	FLEXPWM1_PWM2_OUT_TRIG1 output assigned to XBARA1_IN79 input.
kXBARA1_InputFlexpwm1Pwm3OutTrig0	FLEXPWM1_PWM3_OUT_TRIG0 output assigned to XBARA1_IN80 input.
kXBARA1_InputFlexpwm1Pwm3OutTrig1	FLEXPWM1_PWM3_OUT_TRIG1 output assigned to XBARA1_IN81 input.
kXBARA1_InputFlexpwm2Pwm0OutTrig01	FLEXPWM2_PWM0_OUT_TRIG0_1 output assigned to XBARA1_IN82 input.
kXBARA1_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN83 input.
kXBARA1_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN84 input.
kXBARA1_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN85 input.
kXBARA1_InputFlexpwm3Pwm0OutTrig01	FLEXPWM3_PWM0_OUT_TRIG0_1 output assigned to XBARA1_IN86 input.
kXBARA1_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN87 input.
kXBARA1_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN88 input.
kXBARA1_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN89 input.
kXBARA1_InputFlexpwm4Pwm0OutTrig01	FLEXPWM4_PWM0_OUT_TRIG0_1 output assigned to XBARA1_IN90 input.
kXBARA1_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN91 input.
kXBARA1_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN92 input.
kXBARA1_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN93 input.
kXBARA1_InputRESERVED94	XBARA1_IN94 input is reserved.
kXBARA1_InputRESERVED95	XBARA1_IN95 input is reserved.
kXBARA1_InputRESERVED96	XBARA1_IN96 input is reserved.
kXBARA1_InputRESERVED97	XBARA1_IN97 input is reserved.
kXBARA1_InputRESERVED98	XBARA1_IN98 input is reserved.
kXBARA1_InputRESERVED99	XBARA1_IN99 input is reserved.
kXBARA1_InputRESERVED100	XBARA1_IN100 input is reserved.
kXBARA1_InputRESERVED101	XBARA1_IN101 input is reserved.
kXBARA1_InputPit1Trigger0	PIT1_TRIGGER0 output assigned to XBARA1_IN102 input.
kXBARA1_InputPit1Trigger1	PIT1_TRIGGER1 output assigned to XBARA1_IN103 input.
kXBARA1_InputPit1Trigger2	PIT1_TRIGGER2 output assigned to XBARA1_IN104 input.
kXBARA1_InputPit1Trigger3	PIT1_TRIGGER3 output assigned to XBARA1_IN105 input.
kXBARA1_InputDec1PosMatch	DEC1_POS_MATCH output assigned to XBARA1_IN106 input.
kXBARA1_InputDec2PosMatch	DEC2_POS_MATCH output assigned to XBARA1_IN107 input.
kXBARA1_InputDec3PosMatch	DEC3_POS_MATCH output assigned to XBARA1_IN108 input.
kXBARA1_InputDec4PosMatch	DEC4_POS_MATCH output assigned to XBARA1_IN109 input.
kXBARA1_InputRESERVED110	XBARA1_IN110 input is reserved.
kXBARA1_InputRESERVED111	XBARA1_IN111 input is reserved.
kXBARA1_InputDmaDone0	DMA_DONE0 output assigned to XBARA1_IN112 input.
kXBARA1_InputDmaDone1	DMA_DONE1 output assigned to XBARA1_IN113 input.
kXBARA1_InputDmaDone2	DMA_DONE2 output assigned to XBARA1_IN114 input.
kXBARA1_InputDmaDone3	DMA_DONE3 output assigned to XBARA1_IN115 input.
kXBARA1_InputDmaDone4	DMA_DONE4 output assigned to XBARA1_IN116 input.
kXBARA1_InputDmaDone5	DMA_DONE5 output assigned to XBARA1_IN117 input.
kXBARA1_InputDmaDone6	DMA_DONE6 output assigned to XBARA1_IN118 input.
kXBARA1_InputDmaDone7	DMA_DONE7 output assigned to XBARA1_IN119 input.
kXBARA1_InputDmaLpsrDone0	DMA_LPSR_DONE0 output assigned to XBARA1_IN120 input.
kXBARA1_InputDmaLpsrDone1	DMA_LPSR_DONE1 output assigned to XBARA1_IN121 input.
kXBARA1_InputDmaLpsrDone2	DMA_LPSR_DONE2 output assigned to XBARA1_IN122 input.
kXBARA1_InputDmaLpsrDone3	DMA_LPSR_DONE3 output assigned to XBARA1_IN123 input.
kXBARA1_InputDmaLpsrDone4	DMA_LPSR_DONE4 output assigned to XBARA1_IN124 input.
kXBARA1_InputDmaLpsrDone5	DMA_LPSR_DONE5 output assigned to XBARA1_IN125 input.
kXBARA1_InputDmaLpsrDone6	DMA_LPSR_DONE6 output assigned to XBARA1_IN126 input.
kXBARA1_InputDmaLpsrDone7	DMA_LPSR_DONE7 output assigned to XBARA1_IN127 input.
kXBARA1_InputAoi1Out0	AOI1_OUT0 output assigned to XBARA1_IN128 input.
kXBARA1_InputAoi1Out1	AOI1_OUT1 output assigned to XBARA1_IN129 input.
kXBARA1_InputAoi1Out2	AOI1_OUT2 output assigned to XBARA1_IN130 input.
kXBARA1_InputAoi1Out3	AOI1_OUT3 output assigned to XBARA1_IN131 input.
kXBARA1_InputAoi2Out0	AOI2_OUT0 output assigned to XBARA1_IN132 input.
kXBARA1_InputAoi2Out1	AOI2_OUT1 output assigned to XBARA1_IN133 input.
kXBARA1_InputAoi2Out2	AOI2_OUT2 output assigned to XBARA1_IN134 input.
kXBARA1_InputAoi2Out3	AOI2_OUT3 output assigned to XBARA1_IN135 input.
kXBARA1_InputAdcEtc0Coco0	ADC_ETC0_COCO0 output assigned to XBARA1_IN136 input.
kXBARA1_InputAdcEtc0Coco1	ADC_ETC0_COCO1 output assigned to XBARA1_IN137 input.
kXBARA1_InputAdcEtc0Coco2	ADC_ETC0_COCO2 output assigned to XBARA1_IN138 input.
kXBARA1_InputAdcEtc0Coco3	ADC_ETC0_COCO3 output assigned to XBARA1_IN139 input.
kXBARA1_InputAdcEtc1Coco0	ADC_ETC1_COCO0 output assigned to XBARA1_IN140 input.
kXBARA1_InputAdcEtc1Coco1	ADC_ETC1_COCO1 output assigned to XBARA1_IN141 input.
kXBARA1_InputAdcEtc1Coco2	ADC_ETC1_COCO2 output assigned to XBARA1_IN142 input.
kXBARA1_InputAdcEtc1Coco3	ADC_ETC1_COCO3 output assigned to XBARA1_IN143 input.
kXBARB2_InputLogicLow	LOGIC_LOW output assigned to XBARB2_IN0 input.
kXBARB2_InputLogicHigh	LOGIC_HIGH output assigned to XBARB2_IN1 input.
kXBARB2_InputAcmp1Out	ACMP1_OUT output assigned to XBARB2_IN2 input.
kXBARB2_InputAcmp2Out	ACMP2_OUT output assigned to XBARB2_IN3 input.
kXBARB2_InputAcmp3Out	ACMP3_OUT output assigned to XBARB2_IN4 input.
kXBARB2_InputAcmp4Out	ACMP4_OUT output assigned to XBARB2_IN5 input.
kXBARB2_InputRESERVED6	XBARB2_IN6 input is reserved.
kXBARB2_InputRESERVED7	XBARB2_IN7 input is reserved.
kXBARB2_InputRESERVED8	XBARB2_IN8 input is reserved.
kXBARB2_InputRESERVED9	XBARB2_IN9 input is reserved.
kXBARB2_InputQtimer1Timer0	QTIMER1_TIMER0 output assigned to XBARB2_IN10 input.
kXBARB2_InputQtimer1Timer1	QTIMER1_TIMER1 output assigned to XBARB2_IN11 input.
kXBARB2_InputQtimer1Timer2	QTIMER1_TIMER2 output assigned to XBARB2_IN12 input.
kXBARB2_InputQtimer1Timer3	QTIMER1_TIMER3 output assigned to XBARB2_IN13 input.
kXBARB2_InputQtimer2Timer0	QTIMER2_TIMER0 output assigned to XBARB2_IN14 input.
kXBARB2_InputQtimer2Timer1	QTIMER2_TIMER1 output assigned to XBARB2_IN15 input.
kXBARB2_InputQtimer2Timer2	QTIMER2_TIMER2 output assigned to XBARB2_IN16 input.
kXBARB2_InputQtimer2Timer3	QTIMER2_TIMER3 output assigned to XBARB2_IN17 input.
kXBARB2_InputQtimer3Timer0	QTIMER3_TIMER0 output assigned to XBARB2_IN18 input.
kXBARB2_InputQtimer3Timer1	QTIMER3_TIMER1 output assigned to XBARB2_IN19 input.
kXBARB2_InputQtimer3Timer2	QTIMER3_TIMER2 output assigned to XBARB2_IN20 input.
kXBARB2_InputQtimer3Timer3	QTIMER3_TIMER3 output assigned to XBARB2_IN21 input.
kXBARB2_InputQtimer4Timer0	QTIMER4_TIMER0 output assigned to XBARB2_IN22 input.
kXBARB2_InputQtimer4Timer1	QTIMER4_TIMER1 output assigned to XBARB2_IN23 input.
kXBARB2_InputQtimer4Timer2	QTIMER4_TIMER2 output assigned to XBARB2_IN24 input.
kXBARB2_InputQtimer4Timer3	QTIMER4_TIMER3 output assigned to XBARB2_IN25 input.
kXBARB2_InputRESERVED26	XBARB2_IN26 input is reserved.
kXBARB2_InputRESERVED27	XBARB2_IN27 input is reserved.
kXBARB2_InputRESERVED28	XBARB2_IN28 input is reserved.
kXBARB2_InputRESERVED29	XBARB2_IN29 input is reserved.
kXBARB2_InputRESERVED30	XBARB2_IN30 input is reserved.
kXBARB2_InputRESERVED31	XBARB2_IN31 input is reserved.
kXBARB2_InputRESERVED32	XBARB2_IN32 input is reserved.
kXBARB2_InputRESERVED33	XBARB2_IN33 input is reserved.
kXBARB2_InputFlexpwm1Pwm0OutTrig01	FLEXPWM1_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN34 input.
kXBARB2_InputFlexpwm1Pwm1OutTrig01	FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN35 input.
kXBARB2_InputFlexpwm1Pwm2OutTrig01	FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN36 input.
kXBARB2_InputFlexpwm1Pwm3OutTrig01	FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN37 input.
kXBARB2_InputFlexpwm2Pwm0OutTrig01	FLEXPWM2_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN38 input.
kXBARB2_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN39 input.
kXBARB2_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN40 input.
kXBARB2_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN41 input.
kXBARB2_InputFlexpwm3Pwm0OutTrig01	FLEXPWM3_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN42 input.
kXBARB2_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN43 input.
kXBARB2_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN44 input.
kXBARB2_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN45 input.
kXBARB2_InputFlexpwm4Pwm0OutTrig01	FLEXPWM4_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN46 input.
kXBARB2_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN47 input.
kXBARB2_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN48 input.
kXBARB2_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN49 input.
kXBARB2_InputRESERVED50	XBARB2_IN50 input is reserved.
kXBARB2_InputRESERVED51	XBARB2_IN51 input is reserved.
kXBARB2_InputRESERVED52	XBARB2_IN52 input is reserved.
kXBARB2_InputRESERVED53	XBARB2_IN53 input is reserved.
kXBARB2_InputRESERVED54	XBARB2_IN54 input is reserved.
kXBARB2_InputRESERVED55	XBARB2_IN55 input is reserved.
kXBARB2_InputRESERVED56	XBARB2_IN56 input is reserved.
kXBARB2_InputRESERVED57	XBARB2_IN57 input is reserved.
kXBARB2_InputPit1Trigger0	PIT1_TRIGGER0 output assigned to XBARB2_IN58 input.
kXBARB2_InputPit1Trigger1	PIT1_TRIGGER1 output assigned to XBARB2_IN59 input.
kXBARB2_InputAdcEtc0Coco0	ADC_ETC0_COCO0 output assigned to XBARB2_IN60 input.
kXBARB2_InputAdcEtc0Coco1	ADC_ETC0_COCO1 output assigned to XBARB2_IN61 input.
kXBARB2_InputAdcEtc0Coco2	ADC_ETC0_COCO2 output assigned to XBARB2_IN62 input.
kXBARB2_InputAdcEtc0Coco3	ADC_ETC0_COCO3 output assigned to XBARB2_IN63 input.
kXBARB2_InputAdcEtc1Coco0	ADC_ETC1_COCO0 output assigned to XBARB2_IN64 input.
kXBARB2_InputAdcEtc1Coco1	ADC_ETC1_COCO1 output assigned to XBARB2_IN65 input.
kXBARB2_InputAdcEtc1Coco2	ADC_ETC1_COCO2 output assigned to XBARB2_IN66 input.
kXBARB2_InputAdcEtc1Coco3	ADC_ETC1_COCO3 output assigned to XBARB2_IN67 input.
kXBARB2_InputRESERVED68	XBARB2_IN68 input is reserved.
kXBARB2_InputRESERVED69	XBARB2_IN69 input is reserved.
kXBARB2_InputRESERVED70	XBARB2_IN70 input is reserved.
kXBARB2_InputRESERVED71	XBARB2_IN71 input is reserved.
kXBARB2_InputRESERVED72	XBARB2_IN72 input is reserved.
kXBARB2_InputRESERVED73	XBARB2_IN73 input is reserved.
kXBARB2_InputRESERVED74	XBARB2_IN74 input is reserved.
kXBARB2_InputRESERVED75	XBARB2_IN75 input is reserved.
kXBARB2_InputDec1PosMatch	DEC1_POS_MATCH output assigned to XBARB2_IN76 input.
kXBARB2_InputDec2PosMatch	DEC2_POS_MATCH output assigned to XBARB2_IN77 input.
kXBARB2_InputDec3PosMatch	DEC3_POS_MATCH output assigned to XBARB2_IN78 input.
kXBARB2_InputDec4PosMatch	DEC4_POS_MATCH output assigned to XBARB2_IN79 input.
kXBARB2_InputRESERVED80	XBARB2_IN80 input is reserved.
kXBARB2_InputRESERVED81	XBARB2_IN81 input is reserved.
kXBARB2_InputDmaDone0	DMA_DONE0 output assigned to XBARB2_IN82 input.
kXBARB2_InputDmaDone1	DMA_DONE1 output assigned to XBARB2_IN83 input.
kXBARB2_InputDmaDone2	DMA_DONE2 output assigned to XBARB2_IN84 input.
kXBARB2_InputDmaDone3	DMA_DONE3 output assigned to XBARB2_IN85 input.
kXBARB2_InputDmaDone4	DMA_DONE4 output assigned to XBARB2_IN86 input.
kXBARB2_InputDmaDone5	DMA_DONE5 output assigned to XBARB2_IN87 input.
kXBARB2_InputDmaDone6	DMA_DONE6 output assigned to XBARB2_IN88 input.
kXBARB2_InputDmaDone7	DMA_DONE7 output assigned to XBARB2_IN89 input.
kXBARB2_InputDmaLpsrDone0	DMA_LPSR_DONE0 output assigned to XBARB2_IN90 input.
kXBARB2_InputDmaLpsrDone1	DMA_LPSR_DONE1 output assigned to XBARB2_IN91 input.
kXBARB2_InputDmaLpsrDone2	DMA_LPSR_DONE2 output assigned to XBARB2_IN92 input.
kXBARB2_InputDmaLpsrDone3	DMA_LPSR_DONE3 output assigned to XBARB2_IN93 input.
kXBARB2_InputDmaLpsrDone4	DMA_LPSR_DONE4 output assigned to XBARB2_IN94 input.
kXBARB2_InputDmaLpsrDone5	DMA_LPSR_DONE5 output assigned to XBARB2_IN95 input.
kXBARB2_InputDmaLpsrDone6	DMA_LPSR_DONE6 output assigned to XBARB2_IN96 input.
kXBARB2_InputDmaLpsrDone7	DMA_LPSR_DONE7 output assigned to XBARB2_IN97 input.
kXBARB3_InputLogicLow	LOGIC_LOW output assigned to XBARB3_IN0 input.
kXBARB3_InputLogicHigh	LOGIC_HIGH output assigned to XBARB3_IN1 input.
kXBARB3_InputAcmp1Out	ACMP1_OUT output assigned to XBARB3_IN2 input.
kXBARB3_InputAcmp2Out	ACMP2_OUT output assigned to XBARB3_IN3 input.
kXBARB3_InputAcmp3Out	ACMP3_OUT output assigned to XBARB3_IN4 input.
kXBARB3_InputAcmp4Out	ACMP4_OUT output assigned to XBARB3_IN5 input.
kXBARB3_InputRESERVED6	XBARB3_IN6 input is reserved.
kXBARB3_InputRESERVED7	XBARB3_IN7 input is reserved.
kXBARB3_InputRESERVED8	XBARB3_IN8 input is reserved.
kXBARB3_InputRESERVED9	XBARB3_IN9 input is reserved.
kXBARB3_InputQtimer1Timer0	QTIMER1_TIMER0 output assigned to XBARB3_IN10 input.
kXBARB3_InputQtimer1Timer1	QTIMER1_TIMER1 output assigned to XBARB3_IN11 input.
kXBARB3_InputQtimer1Timer2	QTIMER1_TIMER2 output assigned to XBARB3_IN12 input.
kXBARB3_InputQtimer1Timer3	QTIMER1_TIMER3 output assigned to XBARB3_IN13 input.
kXBARB3_InputQtimer2Timer0	QTIMER2_TIMER0 output assigned to XBARB3_IN14 input.
kXBARB3_InputQtimer2Timer1	QTIMER2_TIMER1 output assigned to XBARB3_IN15 input.
kXBARB3_InputQtimer2Timer2	QTIMER2_TIMER2 output assigned to XBARB3_IN16 input.
kXBARB3_InputQtimer2Timer3	QTIMER2_TIMER3 output assigned to XBARB3_IN17 input.
kXBARB3_InputQtimer3Timer0	QTIMER3_TIMER0 output assigned to XBARB3_IN18 input.
kXBARB3_InputQtimer3Timer1	QTIMER3_TIMER1 output assigned to XBARB3_IN19 input.
kXBARB3_InputQtimer3Timer2	QTIMER3_TIMER2 output assigned to XBARB3_IN20 input.
kXBARB3_InputQtimer3Timer3	QTIMER3_TIMER3 output assigned to XBARB3_IN21 input.
kXBARB3_InputQtimer4Timer0	QTIMER4_TIMER0 output assigned to XBARB3_IN22 input.
kXBARB3_InputQtimer4Timer1	QTIMER4_TIMER1 output assigned to XBARB3_IN23 input.
kXBARB3_InputQtimer4Timer2	QTIMER4_TIMER2 output assigned to XBARB3_IN24 input.
kXBARB3_InputQtimer4Timer3	QTIMER4_TIMER3 output assigned to XBARB3_IN25 input.
kXBARB3_InputRESERVED26	XBARB3_IN26 input is reserved.
kXBARB3_InputRESERVED27	XBARB3_IN27 input is reserved.
kXBARB3_InputRESERVED28	XBARB3_IN28 input is reserved.
kXBARB3_InputRESERVED29	XBARB3_IN29 input is reserved.
kXBARB3_InputRESERVED30	XBARB3_IN30 input is reserved.
kXBARB3_InputRESERVED31	XBARB3_IN31 input is reserved.
kXBARB3_InputRESERVED32	XBARB3_IN32 input is reserved.
kXBARB3_InputRESERVED33	XBARB3_IN33 input is reserved.
kXBARB3_InputFlexpwm1Pwm0OutTrig01	FLEXPWM1_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN34 input.
kXBARB3_InputFlexpwm1Pwm1OutTrig01	FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN35 input.
kXBARB3_InputFlexpwm1Pwm2OutTrig01	FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN36 input.
kXBARB3_InputFlexpwm1Pwm3OutTrig01	FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN37 input.
kXBARB3_InputFlexpwm2Pwm0OutTrig01	FLEXPWM2_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN38 input.
kXBARB3_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN39 input.
kXBARB3_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN40 input.
kXBARB3_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN41 input.
kXBARB3_InputFlexpwm3Pwm0OutTrig01	FLEXPWM3_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN42 input.
kXBARB3_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN43 input.
kXBARB3_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN44 input.
kXBARB3_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN45 input.
kXBARB3_InputFlexpwm4Pwm0OutTrig01	FLEXPWM4_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN46 input.
kXBARB3_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN47 input.
kXBARB3_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN48 input.
kXBARB3_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN49 input.
kXBARB3_InputRESERVED50	XBARB3_IN50 input is reserved.
kXBARB3_InputRESERVED51	XBARB3_IN51 input is reserved.
kXBARB3_InputRESERVED52	XBARB3_IN52 input is reserved.
kXBARB3_InputRESERVED53	XBARB3_IN53 input is reserved.
kXBARB3_InputRESERVED54	XBARB3_IN54 input is reserved.
kXBARB3_InputRESERVED55	XBARB3_IN55 input is reserved.
kXBARB3_InputRESERVED56	XBARB3_IN56 input is reserved.
kXBARB3_InputRESERVED57	XBARB3_IN57 input is reserved.
kXBARB3_InputPit1Trigger0	PIT1_TRIGGER0 output assigned to XBARB3_IN58 input.
kXBARB3_InputPit1Trigger1	PIT1_TRIGGER1 output assigned to XBARB3_IN59 input.
kXBARB3_InputAdcEtc0Coco0	ADC_ETC0_COCO0 output assigned to XBARB3_IN60 input.
kXBARB3_InputAdcEtc0Coco1	ADC_ETC0_COCO1 output assigned to XBARB3_IN61 input.
kXBARB3_InputAdcEtc0Coco2	ADC_ETC0_COCO2 output assigned to XBARB3_IN62 input.
kXBARB3_InputAdcEtc0Coco3	ADC_ETC0_COCO3 output assigned to XBARB3_IN63 input.
kXBARB3_InputAdcEtc1Coco0	ADC_ETC1_COCO0 output assigned to XBARB3_IN64 input.
kXBARB3_InputAdcEtc1Coco1	ADC_ETC1_COCO1 output assigned to XBARB3_IN65 input.
kXBARB3_InputAdcEtc1Coco2	ADC_ETC1_COCO2 output assigned to XBARB3_IN66 input.
kXBARB3_InputAdcEtc1Coco3	ADC_ETC1_COCO3 output assigned to XBARB3_IN67 input.
kXBARB3_InputRESERVED68	XBARB3_IN68 input is reserved.
kXBARB3_InputRESERVED69	XBARB3_IN69 input is reserved.
kXBARB3_InputRESERVED70	XBARB3_IN70 input is reserved.
kXBARB3_InputRESERVED71	XBARB3_IN71 input is reserved.
kXBARB3_InputRESERVED72	XBARB3_IN72 input is reserved.
kXBARB3_InputRESERVED73	XBARB3_IN73 input is reserved.
kXBARB3_InputRESERVED74	XBARB3_IN74 input is reserved.
kXBARB3_InputRESERVED75	XBARB3_IN75 input is reserved.
kXBARB3_InputDec1PosMatch	DEC1_POS_MATCH output assigned to XBARB3_IN76 input.
kXBARB3_InputDec2PosMatch	DEC2_POS_MATCH output assigned to XBARB3_IN77 input.
kXBARB3_InputDec3PosMatch	DEC3_POS_MATCH output assigned to XBARB3_IN78 input.
kXBARB3_InputDec4PosMatch	DEC4_POS_MATCH output assigned to XBARB3_IN79 input.
kXBARB3_InputRESERVED80	XBARB3_IN80 input is reserved.
kXBARB3_InputRESERVED81	XBARB3_IN81 input is reserved.
kXBARB3_InputDmaDone0	DMA_DONE0 output assigned to XBARB3_IN82 input.
kXBARB3_InputDmaDone1	DMA_DONE1 output assigned to XBARB3_IN83 input.
kXBARB3_InputDmaDone2	DMA_DONE2 output assigned to XBARB3_IN84 input.
kXBARB3_InputDmaDone3	DMA_DONE3 output assigned to XBARB3_IN85 input.
kXBARB3_InputDmaDone4	DMA_DONE4 output assigned to XBARB3_IN86 input.
kXBARB3_InputDmaDone5	DMA_DONE5 output assigned to XBARB3_IN87 input.
kXBARB3_InputDmaDone6	DMA_DONE6 output assigned to XBARB3_IN88 input.
kXBARB3_InputDmaDone7	DMA_DONE7 output assigned to XBARB3_IN89 input.
kXBARB3_InputDmaLpsrDone0	DMA_LPSR_DONE0 output assigned to XBARB3_IN90 input.
kXBARB3_InputDmaLpsrDone1	DMA_LPSR_DONE1 output assigned to XBARB3_IN91 input.
kXBARB3_InputDmaLpsrDone2	DMA_LPSR_DONE2 output assigned to XBARB3_IN92 input.
kXBARB3_InputDmaLpsrDone3	DMA_LPSR_DONE3 output assigned to XBARB3_IN93 input.
kXBARB3_InputDmaLpsrDone4	DMA_LPSR_DONE4 output assigned to XBARB3_IN94 input.
kXBARB3_InputDmaLpsrDone5	DMA_LPSR_DONE5 output assigned to XBARB3_IN95 input.
kXBARB3_InputDmaLpsrDone6	DMA_LPSR_DONE6 output assigned to XBARB3_IN96 input.
kXBARB3_InputDmaLpsrDone7	DMA_LPSR_DONE7 output assigned to XBARB3_IN97 input.

_xbar_input_signal [2/2]

enum _xbar_input_signal

Enumerator
kXBARA1_InputLogicLow	LOGIC_LOW output assigned to XBARA1_IN0 input.
kXBARA1_InputLogicHigh	LOGIC_HIGH output assigned to XBARA1_IN1 input.
kXBARA1_InputIomuxXbarIn02	IOMUX_XBAR_IN02 output assigned to XBARA1_IN2 input.
kXBARA1_InputIomuxXbarIn03	IOMUX_XBAR_IN03 output assigned to XBARA1_IN3 input.
kXBARA1_InputIomuxXbarInout04	IOMUX_XBAR_INOUT04 output assigned to XBARA1_IN4 input.
kXBARA1_InputIomuxXbarInout05	IOMUX_XBAR_INOUT05 output assigned to XBARA1_IN5 input.
kXBARA1_InputIomuxXbarInout06	IOMUX_XBAR_INOUT06 output assigned to XBARA1_IN6 input.
kXBARA1_InputIomuxXbarInout07	IOMUX_XBAR_INOUT07 output assigned to XBARA1_IN7 input.
kXBARA1_InputIomuxXbarInout08	IOMUX_XBAR_INOUT08 output assigned to XBARA1_IN8 input.
kXBARA1_InputIomuxXbarInout09	IOMUX_XBAR_INOUT09 output assigned to XBARA1_IN9 input.
kXBARA1_InputIomuxXbarInout10	IOMUX_XBAR_INOUT10 output assigned to XBARA1_IN10 input.
kXBARA1_InputIomuxXbarInout11	IOMUX_XBAR_INOUT11 output assigned to XBARA1_IN11 input.
kXBARA1_InputIomuxXbarInout12	IOMUX_XBAR_INOUT12 output assigned to XBARA1_IN12 input.
kXBARA1_InputIomuxXbarInout13	IOMUX_XBAR_INOUT13 output assigned to XBARA1_IN13 input.
kXBARA1_InputIomuxXbarInout14	IOMUX_XBAR_INOUT14 output assigned to XBARA1_IN14 input.
kXBARA1_InputIomuxXbarInout15	IOMUX_XBAR_INOUT15 output assigned to XBARA1_IN15 input.
kXBARA1_InputIomuxXbarInout16	IOMUX_XBAR_INOUT16 output assigned to XBARA1_IN16 input.
kXBARA1_InputIomuxXbarInout17	IOMUX_XBAR_INOUT17 output assigned to XBARA1_IN17 input.
kXBARA1_InputIomuxXbarInout18	IOMUX_XBAR_INOUT18 output assigned to XBARA1_IN18 input.
kXBARA1_InputIomuxXbarInout19	IOMUX_XBAR_INOUT19 output assigned to XBARA1_IN19 input.
kXBARA1_InputIomuxXbarIn20	IOMUX_XBAR_IN20 output assigned to XBARA1_IN20 input.
kXBARA1_InputIomuxXbarIn21	IOMUX_XBAR_IN21 output assigned to XBARA1_IN21 input.
kXBARA1_InputIomuxXbarIn22	IOMUX_XBAR_IN22 output assigned to XBARA1_IN22 input.
kXBARA1_InputIomuxXbarIn23	IOMUX_XBAR_IN23 output assigned to XBARA1_IN23 input.
kXBARA1_InputIomuxXbarIn24	IOMUX_XBAR_IN24 output assigned to XBARA1_IN24 input.
kXBARA1_InputIomuxXbarIn25	IOMUX_XBAR_IN25 output assigned to XBARA1_IN25 input.
kXBARA1_InputAcmp1Out	ACMP1_OUT output assigned to XBARA1_IN26 input.
kXBARA1_InputAcmp2Out	ACMP2_OUT output assigned to XBARA1_IN27 input.
kXBARA1_InputAcmp3Out	ACMP3_OUT output assigned to XBARA1_IN28 input.
kXBARA1_InputAcmp4Out	ACMP4_OUT output assigned to XBARA1_IN29 input.
kXBARA1_InputRESERVED30	XBARA1_IN30 input is reserved.
kXBARA1_InputRESERVED31	XBARA1_IN31 input is reserved.
kXBARA1_InputQtimer3Tmr0Output	QTIMER3_TMR0_OUTPUT output assigned to XBARA1_IN32 input.
kXBARA1_InputQtimer3Tmr1Output	QTIMER3_TMR1_OUTPUT output assigned to XBARA1_IN33 input.
kXBARA1_InputQtimer3Tmr2Output	QTIMER3_TMR2_OUTPUT output assigned to XBARA1_IN34 input.
kXBARA1_InputQtimer3Tmr3Output	QTIMER3_TMR3_OUTPUT output assigned to XBARA1_IN35 input.
kXBARA1_InputQtimer4Tmr0Output	QTIMER4_TMR0_OUTPUT output assigned to XBARA1_IN36 input.
kXBARA1_InputQtimer4Tmr1Output	QTIMER4_TMR1_OUTPUT output assigned to XBARA1_IN37 input.
kXBARA1_InputQtimer4Tmr2Output	QTIMER4_TMR2_OUTPUT output assigned to XBARA1_IN38 input.
kXBARA1_InputQtimer4Tmr3Output	QTIMER4_TMR3_OUTPUT output assigned to XBARA1_IN39 input.
kXBARA1_InputFlexpwm1Pwm1OutTrig01	FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN40 input.
kXBARA1_InputFlexpwm1Pwm2OutTrig01	FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN41 input.
kXBARA1_InputFlexpwm1Pwm3OutTrig01	FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN42 input.
kXBARA1_InputFlexpwm1Pwm4OutTrig01	FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN43 input.
kXBARA1_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN44 input.
kXBARA1_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN45 input.
kXBARA1_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN46 input.
kXBARA1_InputFlexpwm2Pwm4OutTrig01	FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN47 input.
kXBARA1_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN48 input.
kXBARA1_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN49 input.
kXBARA1_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN50 input.
kXBARA1_InputFlexpwm3Pwm4OutTrig01	FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN51 input.
kXBARA1_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN52 input.
kXBARA1_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN53 input.
kXBARA1_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN54 input.
kXBARA1_InputFlexpwm4Pwm4OutTrig01	FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN55 input.
kXBARA1_InputPitTrigger0	PIT_TRIGGER0 output assigned to XBARA1_IN56 input.
kXBARA1_InputPitTrigger1	PIT_TRIGGER1 output assigned to XBARA1_IN57 input.
kXBARA1_InputPitTrigger2	PIT_TRIGGER2 output assigned to XBARA1_IN58 input.
kXBARA1_InputPitTrigger3	PIT_TRIGGER3 output assigned to XBARA1_IN59 input.
kXBARA1_InputEnc1PosMatch	ENC1_POS_MATCH output assigned to XBARA1_IN60 input.
kXBARA1_InputEnc2PosMatch	ENC2_POS_MATCH output assigned to XBARA1_IN61 input.
kXBARA1_InputEnc3PosMatch	ENC3_POS_MATCH output assigned to XBARA1_IN62 input.
kXBARA1_InputEnc4PosMatch	ENC4_POS_MATCH output assigned to XBARA1_IN63 input.
kXBARA1_InputDmaDone0	DMA_DONE0 output assigned to XBARA1_IN64 input.
kXBARA1_InputDmaDone1	DMA_DONE1 output assigned to XBARA1_IN65 input.
kXBARA1_InputDmaDone2	DMA_DONE2 output assigned to XBARA1_IN66 input.
kXBARA1_InputDmaDone3	DMA_DONE3 output assigned to XBARA1_IN67 input.
kXBARA1_InputDmaDone4	DMA_DONE4 output assigned to XBARA1_IN68 input.
kXBARA1_InputDmaDone5	DMA_DONE5 output assigned to XBARA1_IN69 input.
kXBARA1_InputDmaDone6	DMA_DONE6 output assigned to XBARA1_IN70 input.
kXBARA1_InputDmaDone7	DMA_DONE7 output assigned to XBARA1_IN71 input.
kXBARA1_InputAoi1Out0	AOI1_OUT0 output assigned to XBARA1_IN72 input.
kXBARA1_InputAoi1Out1	AOI1_OUT1 output assigned to XBARA1_IN73 input.
kXBARA1_InputAoi1Out2	AOI1_OUT2 output assigned to XBARA1_IN74 input.
kXBARA1_InputAoi1Out3	AOI1_OUT3 output assigned to XBARA1_IN75 input.
kXBARA1_InputAoi2Out0	AOI2_OUT0 output assigned to XBARA1_IN76 input.
kXBARA1_InputAoi2Out1	AOI2_OUT1 output assigned to XBARA1_IN77 input.
kXBARA1_InputAoi2Out2	AOI2_OUT2 output assigned to XBARA1_IN78 input.
kXBARA1_InputAoi2Out3	AOI2_OUT3 output assigned to XBARA1_IN79 input.
kXBARA1_InputAdcEtcXbar0Coco0	ADC_ETC_XBAR0_COCO0 output assigned to XBARA1_IN80 input.
kXBARA1_InputAdcEtcXbar0Coco1	ADC_ETC_XBAR0_COCO1 output assigned to XBARA1_IN81 input.
kXBARA1_InputAdcEtcXbar0Coco2	ADC_ETC_XBAR0_COCO2 output assigned to XBARA1_IN82 input.
kXBARA1_InputAdcEtcXbar0Coco3	ADC_ETC_XBAR0_COCO3 output assigned to XBARA1_IN83 input.
kXBARA1_InputAdcEtcXbar1Coco0	ADC_ETC_XBAR1_COCO0 output assigned to XBARA1_IN84 input.
kXBARA1_InputAdcEtcXbar1Coco1	ADC_ETC_XBAR1_COCO1 output assigned to XBARA1_IN85 input.
kXBARA1_InputAdcEtcXbar1Coco2	ADC_ETC_XBAR1_COCO2 output assigned to XBARA1_IN86 input.
kXBARA1_InputAdcEtcXbar1Coco3	ADC_ETC_XBAR1_COCO3 output assigned to XBARA1_IN87 input.
kXBARB2_InputLogicLow	LOGIC_LOW output assigned to XBARB2_IN0 input.
kXBARB2_InputLogicHigh	LOGIC_HIGH output assigned to XBARB2_IN1 input.
kXBARB2_InputRESERVED2	XBARB2_IN2 input is reserved.
kXBARB2_InputRESERVED3	XBARB2_IN3 input is reserved.
kXBARB2_InputRESERVED4	XBARB2_IN4 input is reserved.
kXBARB2_InputRESERVED5	XBARB2_IN5 input is reserved.
kXBARB2_InputAcmp1Out	ACMP1_OUT output assigned to XBARB2_IN6 input.
kXBARB2_InputAcmp2Out	ACMP2_OUT output assigned to XBARB2_IN7 input.
kXBARB2_InputAcmp3Out	ACMP3_OUT output assigned to XBARB2_IN8 input.
kXBARB2_InputAcmp4Out	ACMP4_OUT output assigned to XBARB2_IN9 input.
kXBARB2_InputRESERVED10	XBARB2_IN10 input is reserved.
kXBARB2_InputRESERVED11	XBARB2_IN11 input is reserved.
kXBARB2_InputQtimer3Tmr0Output	QTIMER3_TMR0_OUTPUT output assigned to XBARB2_IN12 input.
kXBARB2_InputQtimer3Tmr1Output	QTIMER3_TMR1_OUTPUT output assigned to XBARB2_IN13 input.
kXBARB2_InputQtimer3Tmr2Output	QTIMER3_TMR2_OUTPUT output assigned to XBARB2_IN14 input.
kXBARB2_InputQtimer3Tmr3Output	QTIMER3_TMR3_OUTPUT output assigned to XBARB2_IN15 input.
kXBARB2_InputQtimer4Tmr0Output	QTIMER4_TMR0_OUTPUT output assigned to XBARB2_IN16 input.
kXBARB2_InputQtimer4Tmr1Output	QTIMER4_TMR1_OUTPUT output assigned to XBARB2_IN17 input.
kXBARB2_InputQtimer4Tmr2Output	QTIMER4_TMR2_OUTPUT output assigned to XBARB2_IN18 input.
kXBARB2_InputQtimer4Tmr3Output	QTIMER4_TMR3_OUTPUT output assigned to XBARB2_IN19 input.
kXBARB2_InputFlexpwm1Pwm1OutTrig01	FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN20 input.
kXBARB2_InputFlexpwm1Pwm2OutTrig01	FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN21 input.
kXBARB2_InputFlexpwm1Pwm3OutTrig01	FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN22 input.
kXBARB2_InputFlexpwm1Pwm4OutTrig01	FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN23 input.
kXBARB2_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN24 input.
kXBARB2_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN25 input.
kXBARB2_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN26 input.
kXBARB2_InputFlexpwm2Pwm4OutTrig01	FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN27 input.
kXBARB2_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN28 input.
kXBARB2_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN29 input.
kXBARB2_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN30 input.
kXBARB2_InputFlexpwm3Pwm4OutTrig01	FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN31 input.
kXBARB2_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN32 input.
kXBARB2_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN33 input.
kXBARB2_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN34 input.
kXBARB2_InputFlexpwm4Pwm4OutTrig01	FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN35 input.
kXBARB2_InputPitTrigger0	PIT_TRIGGER0 output assigned to XBARB2_IN36 input.
kXBARB2_InputPitTrigger1	PIT_TRIGGER1 output assigned to XBARB2_IN37 input.
kXBARB2_InputAdcEtcXbar0Coco0	ADC_ETC_XBAR0_COCO0 output assigned to XBARB2_IN38 input.
kXBARB2_InputAdcEtcXbar0Coco1	ADC_ETC_XBAR0_COCO1 output assigned to XBARB2_IN39 input.
kXBARB2_InputAdcEtcXbar0Coco2	ADC_ETC_XBAR0_COCO2 output assigned to XBARB2_IN40 input.
kXBARB2_InputAdcEtcXbar0Coco3	ADC_ETC_XBAR0_COCO3 output assigned to XBARB2_IN41 input.
kXBARB2_InputAdcEtcXbar1Coco0	ADC_ETC_XBAR1_COCO0 output assigned to XBARB2_IN42 input.
kXBARB2_InputAdcEtcXbar1Coco1	ADC_ETC_XBAR1_COCO1 output assigned to XBARB2_IN43 input.
kXBARB2_InputAdcEtcXbar1Coco2	ADC_ETC_XBAR1_COCO2 output assigned to XBARB2_IN44 input.
kXBARB2_InputAdcEtcXbar1Coco3	ADC_ETC_XBAR1_COCO3 output assigned to XBARB2_IN45 input.
kXBARB2_InputEnc1PosMatch	ENC1_POS_MATCH output assigned to XBARB2_IN46 input.
kXBARB2_InputEnc2PosMatch	ENC2_POS_MATCH output assigned to XBARB2_IN47 input.
kXBARB2_InputEnc3PosMatch	ENC3_POS_MATCH output assigned to XBARB2_IN48 input.
kXBARB2_InputEnc4PosMatch	ENC4_POS_MATCH output assigned to XBARB2_IN49 input.
kXBARB2_InputDmaDone0	DMA_DONE0 output assigned to XBARB2_IN50 input.
kXBARB2_InputDmaDone1	DMA_DONE1 output assigned to XBARB2_IN51 input.
kXBARB2_InputDmaDone2	DMA_DONE2 output assigned to XBARB2_IN52 input.
kXBARB2_InputDmaDone3	DMA_DONE3 output assigned to XBARB2_IN53 input.
kXBARB2_InputDmaDone4	DMA_DONE4 output assigned to XBARB2_IN54 input.
kXBARB2_InputDmaDone5	DMA_DONE5 output assigned to XBARB2_IN55 input.
kXBARB2_InputDmaDone6	DMA_DONE6 output assigned to XBARB2_IN56 input.
kXBARB2_InputDmaDone7	DMA_DONE7 output assigned to XBARB2_IN57 input.
kXBARB3_InputLogicLow	LOGIC_LOW output assigned to XBARB3_IN0 input.
kXBARB3_InputLogicHigh	LOGIC_HIGH output assigned to XBARB3_IN1 input.
kXBARB3_InputRESERVED2	XBARB3_IN2 input is reserved.
kXBARB3_InputRESERVED3	XBARB3_IN3 input is reserved.
kXBARB3_InputRESERVED4	XBARB3_IN4 input is reserved.
kXBARB3_InputRESERVED5	XBARB3_IN5 input is reserved.
kXBARB3_InputAcmp1Out	ACMP1_OUT output assigned to XBARB3_IN6 input.
kXBARB3_InputAcmp2Out	ACMP2_OUT output assigned to XBARB3_IN7 input.
kXBARB3_InputAcmp3Out	ACMP3_OUT output assigned to XBARB3_IN8 input.
kXBARB3_InputAcmp4Out	ACMP4_OUT output assigned to XBARB3_IN9 input.
kXBARB3_InputRESERVED10	XBARB3_IN10 input is reserved.
kXBARB3_InputRESERVED11	XBARB3_IN11 input is reserved.
kXBARB3_InputQtimer3Tmr0Output	QTIMER3_TMR0_OUTPUT output assigned to XBARB3_IN12 input.
kXBARB3_InputQtimer3Tmr1Output	QTIMER3_TMR1_OUTPUT output assigned to XBARB3_IN13 input.
kXBARB3_InputQtimer3Tmr2Output	QTIMER3_TMR2_OUTPUT output assigned to XBARB3_IN14 input.
kXBARB3_InputQtimer3Tmr3Output	QTIMER3_TMR3_OUTPUT output assigned to XBARB3_IN15 input.
kXBARB3_InputQtimer4Tmr0Output	QTIMER4_TMR0_OUTPUT output assigned to XBARB3_IN16 input.
kXBARB3_InputQtimer4Tmr1Output	QTIMER4_TMR1_OUTPUT output assigned to XBARB3_IN17 input.
kXBARB3_InputQtimer4Tmr2Output	QTIMER4_TMR2_OUTPUT output assigned to XBARB3_IN18 input.
kXBARB3_InputQtimer4Tmr3Output	QTIMER4_TMR3_OUTPUT output assigned to XBARB3_IN19 input.
kXBARB3_InputFlexpwm1Pwm1OutTrig01	FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN20 input.
kXBARB3_InputFlexpwm1Pwm2OutTrig01	FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN21 input.
kXBARB3_InputFlexpwm1Pwm3OutTrig01	FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN22 input.
kXBARB3_InputFlexpwm1Pwm4OutTrig01	FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN23 input.
kXBARB3_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN24 input.
kXBARB3_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN25 input.
kXBARB3_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN26 input.
kXBARB3_InputFlexpwm2Pwm4OutTrig01	FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN27 input.
kXBARB3_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN28 input.
kXBARB3_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN29 input.
kXBARB3_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN30 input.
kXBARB3_InputFlexpwm3Pwm4OutTrig01	FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN31 input.
kXBARB3_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN32 input.
kXBARB3_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN33 input.
kXBARB3_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN34 input.
kXBARB3_InputFlexpwm4Pwm4OutTrig01	FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN35 input.
kXBARB3_InputPitTrigger0	PIT_TRIGGER0 output assigned to XBARB3_IN36 input.
kXBARB3_InputPitTrigger1	PIT_TRIGGER1 output assigned to XBARB3_IN37 input.
kXBARB3_InputAdcEtcXbar0Coco0	ADC_ETC_XBAR0_COCO0 output assigned to XBARB3_IN38 input.
kXBARB3_InputAdcEtcXbar0Coco1	ADC_ETC_XBAR0_COCO1 output assigned to XBARB3_IN39 input.
kXBARB3_InputAdcEtcXbar0Coco2	ADC_ETC_XBAR0_COCO2 output assigned to XBARB3_IN40 input.
kXBARB3_InputAdcEtcXbar0Coco3	ADC_ETC_XBAR0_COCO3 output assigned to XBARB3_IN41 input.
kXBARB3_InputAdcEtcXbar1Coco0	ADC_ETC_XBAR1_COCO0 output assigned to XBARB3_IN42 input.
kXBARB3_InputAdcEtcXbar1Coco1	ADC_ETC_XBAR1_COCO1 output assigned to XBARB3_IN43 input.
kXBARB3_InputAdcEtcXbar1Coco2	ADC_ETC_XBAR1_COCO2 output assigned to XBARB3_IN44 input.
kXBARB3_InputAdcEtcXbar1Coco3	ADC_ETC_XBAR1_COCO3 output assigned to XBARB3_IN45 input.
kXBARB3_InputEnc1PosMatch	ENC1_POS_MATCH output assigned to XBARB3_IN46 input.
kXBARB3_InputEnc2PosMatch	ENC2_POS_MATCH output assigned to XBARB3_IN47 input.
kXBARB3_InputEnc3PosMatch	ENC3_POS_MATCH output assigned to XBARB3_IN48 input.
kXBARB3_InputEnc4PosMatch	ENC4_POS_MATCH output assigned to XBARB3_IN49 input.
kXBARB3_InputDmaDone0	DMA_DONE0 output assigned to XBARB3_IN50 input.
kXBARB3_InputDmaDone1	DMA_DONE1 output assigned to XBARB3_IN51 input.
kXBARB3_InputDmaDone2	DMA_DONE2 output assigned to XBARB3_IN52 input.
kXBARB3_InputDmaDone3	DMA_DONE3 output assigned to XBARB3_IN53 input.
kXBARB3_InputDmaDone4	DMA_DONE4 output assigned to XBARB3_IN54 input.
kXBARB3_InputDmaDone5	DMA_DONE5 output assigned to XBARB3_IN55 input.
kXBARB3_InputDmaDone6	DMA_DONE6 output assigned to XBARB3_IN56 input.
kXBARB3_InputDmaDone7	DMA_DONE7 output assigned to XBARB3_IN57 input.
kXBARA1_InputLogicLow	LOGIC_LOW output assigned to XBARA1_IN0 input.
kXBARA1_InputLogicHigh	LOGIC_HIGH output assigned to XBARA1_IN1 input.
kXBARA1_InputRESERVED2	XBARA1_IN2 input is reserved.
kXBARA1_InputRESERVED3	XBARA1_IN3 input is reserved.
kXBARA1_InputIomuxXbarInout04	IOMUX_XBAR_INOUT04 output assigned to XBARA1_IN4 input.
kXBARA1_InputIomuxXbarInout05	IOMUX_XBAR_INOUT05 output assigned to XBARA1_IN5 input.
kXBARA1_InputIomuxXbarInout06	IOMUX_XBAR_INOUT06 output assigned to XBARA1_IN6 input.
kXBARA1_InputIomuxXbarInout07	IOMUX_XBAR_INOUT07 output assigned to XBARA1_IN7 input.
kXBARA1_InputIomuxXbarInout08	IOMUX_XBAR_INOUT08 output assigned to XBARA1_IN8 input.
kXBARA1_InputIomuxXbarInout09	IOMUX_XBAR_INOUT09 output assigned to XBARA1_IN9 input.
kXBARA1_InputIomuxXbarInout10	IOMUX_XBAR_INOUT10 output assigned to XBARA1_IN10 input.
kXBARA1_InputIomuxXbarInout11	IOMUX_XBAR_INOUT11 output assigned to XBARA1_IN11 input.
kXBARA1_InputIomuxXbarInout12	IOMUX_XBAR_INOUT12 output assigned to XBARA1_IN12 input.
kXBARA1_InputIomuxXbarInout13	IOMUX_XBAR_INOUT13 output assigned to XBARA1_IN13 input.
kXBARA1_InputIomuxXbarInout14	IOMUX_XBAR_INOUT14 output assigned to XBARA1_IN14 input.
kXBARA1_InputIomuxXbarInout15	IOMUX_XBAR_INOUT15 output assigned to XBARA1_IN15 input.
kXBARA1_InputIomuxXbarInout16	IOMUX_XBAR_INOUT16 output assigned to XBARA1_IN16 input.
kXBARA1_InputIomuxXbarInout17	IOMUX_XBAR_INOUT17 output assigned to XBARA1_IN17 input.
kXBARA1_InputIomuxXbarInout18	IOMUX_XBAR_INOUT18 output assigned to XBARA1_IN18 input.
kXBARA1_InputIomuxXbarInout19	IOMUX_XBAR_INOUT19 output assigned to XBARA1_IN19 input.
kXBARA1_InputIomuxXbarInout20	IOMUX_XBAR_INOUT20 output assigned to XBARA1_IN20 input.
kXBARA1_InputIomuxXbarInout21	IOMUX_XBAR_INOUT21 output assigned to XBARA1_IN21 input.
kXBARA1_InputIomuxXbarInout22	IOMUX_XBAR_INOUT22 output assigned to XBARA1_IN22 input.
kXBARA1_InputIomuxXbarInout23	IOMUX_XBAR_INOUT23 output assigned to XBARA1_IN23 input.
kXBARA1_InputIomuxXbarInout24	IOMUX_XBAR_INOUT24 output assigned to XBARA1_IN24 input.
kXBARA1_InputIomuxXbarInout25	IOMUX_XBAR_INOUT25 output assigned to XBARA1_IN25 input.
kXBARA1_InputIomuxXbarInout26	IOMUX_XBAR_INOUT26 output assigned to XBARA1_IN26 input.
kXBARA1_InputIomuxXbarInout27	IOMUX_XBAR_INOUT27 output assigned to XBARA1_IN27 input.
kXBARA1_InputIomuxXbarInout28	IOMUX_XBAR_INOUT28 output assigned to XBARA1_IN28 input.
kXBARA1_InputIomuxXbarInout29	IOMUX_XBAR_INOUT29 output assigned to XBARA1_IN29 input.
kXBARA1_InputIomuxXbarInout30	IOMUX_XBAR_INOUT30 output assigned to XBARA1_IN30 input.
kXBARA1_InputIomuxXbarInout31	IOMUX_XBAR_INOUT31 output assigned to XBARA1_IN31 input.
kXBARA1_InputIomuxXbarInout32	IOMUX_XBAR_INOUT32 output assigned to XBARA1_IN32 input.
kXBARA1_InputIomuxXbarInout33	IOMUX_XBAR_INOUT33 output assigned to XBARA1_IN33 input.
kXBARA1_InputIomuxXbarInout34	IOMUX_XBAR_INOUT34 output assigned to XBARA1_IN34 input.
kXBARA1_InputIomuxXbarInout35	IOMUX_XBAR_INOUT35 output assigned to XBARA1_IN35 input.
kXBARA1_InputIomuxXbarInout36	IOMUX_XBAR_INOUT36 output assigned to XBARA1_IN36 input.
kXBARA1_InputIomuxXbarInout37	IOMUX_XBAR_INOUT37 output assigned to XBARA1_IN37 input.
kXBARA1_InputIomuxXbarInout38	IOMUX_XBAR_INOUT38 output assigned to XBARA1_IN38 input.
kXBARA1_InputIomuxXbarInout39	IOMUX_XBAR_INOUT39 output assigned to XBARA1_IN39 input.
kXBARA1_InputIomuxXbarInout40	IOMUX_XBAR_INOUT40 output assigned to XBARA1_IN40 input.
kXBARA1_InputRESERVED41	XBARA1_IN41 input is reserved.
kXBARA1_InputAcmp1Out	ACMP1_OUT output assigned to XBARA1_IN42 input.
kXBARA1_InputAcmp2Out	ACMP2_OUT output assigned to XBARA1_IN43 input.
kXBARA1_InputAcmp3Out	ACMP3_OUT output assigned to XBARA1_IN44 input.
kXBARA1_InputAcmp4Out	ACMP4_OUT output assigned to XBARA1_IN45 input.
kXBARA1_InputRESERVED46	XBARA1_IN46 input is reserved.
kXBARA1_InputRESERVED47	XBARA1_IN47 input is reserved.
kXBARA1_InputRESERVED48	XBARA1_IN48 input is reserved.
kXBARA1_InputRESERVED49	XBARA1_IN49 input is reserved.
kXBARA1_InputQtimer1Timer0	QTIMER1_TIMER0 output assigned to XBARA1_IN50 input.
kXBARA1_InputQtimer1Timer1	QTIMER1_TIMER1 output assigned to XBARA1_IN51 input.
kXBARA1_InputQtimer1Timer2	QTIMER1_TIMER2 output assigned to XBARA1_IN52 input.
kXBARA1_InputQtimer1Timer3	QTIMER1_TIMER3 output assigned to XBARA1_IN53 input.
kXBARA1_InputQtimer2Timer0	QTIMER2_TIMER0 output assigned to XBARA1_IN54 input.
kXBARA1_InputQtimer2Timer1	QTIMER2_TIMER1 output assigned to XBARA1_IN55 input.
kXBARA1_InputQtimer2Timer2	QTIMER2_TIMER2 output assigned to XBARA1_IN56 input.
kXBARA1_InputQtimer2Timer3	QTIMER2_TIMER3 output assigned to XBARA1_IN57 input.
kXBARA1_InputQtimer3Timer0	QTIMER3_TIMER0 output assigned to XBARA1_IN58 input.
kXBARA1_InputQtimer3Timer1	QTIMER3_TIMER1 output assigned to XBARA1_IN59 input.
kXBARA1_InputQtimer3Timer2	QTIMER3_TIMER2 output assigned to XBARA1_IN60 input.
kXBARA1_InputQtimer3Timer3	QTIMER3_TIMER3 output assigned to XBARA1_IN61 input.
kXBARA1_InputQtimer4Timer0	QTIMER4_TIMER0 output assigned to XBARA1_IN62 input.
kXBARA1_InputQtimer4Timer1	QTIMER4_TIMER1 output assigned to XBARA1_IN63 input.
kXBARA1_InputQtimer4Timer2	QTIMER4_TIMER2 output assigned to XBARA1_IN64 input.
kXBARA1_InputQtimer4Timer3	QTIMER4_TIMER3 output assigned to XBARA1_IN65 input.
kXBARA1_InputRESERVED66	XBARA1_IN66 input is reserved.
kXBARA1_InputRESERVED67	XBARA1_IN67 input is reserved.
kXBARA1_InputRESERVED68	XBARA1_IN68 input is reserved.
kXBARA1_InputRESERVED69	XBARA1_IN69 input is reserved.
kXBARA1_InputRESERVED70	XBARA1_IN70 input is reserved.
kXBARA1_InputRESERVED71	XBARA1_IN71 input is reserved.
kXBARA1_InputRESERVED72	XBARA1_IN72 input is reserved.
kXBARA1_InputRESERVED73	XBARA1_IN73 input is reserved.
kXBARA1_InputFlexpwm1Pwm0OutTrig0	FLEXPWM1_PWM0_OUT_TRIG0 output assigned to XBARA1_IN74 input.
kXBARA1_InputFlexpwm1Pwm0OutTrig1	FLEXPWM1_PWM0_OUT_TRIG1 output assigned to XBARA1_IN75 input.
kXBARA1_InputFlexpwm1Pwm1OutTrig0	FLEXPWM1_PWM1_OUT_TRIG0 output assigned to XBARA1_IN76 input.
kXBARA1_InputFlexpwm1Pwm1OutTrig1	FLEXPWM1_PWM1_OUT_TRIG1 output assigned to XBARA1_IN77 input.
kXBARA1_InputFlexpwm1Pwm2OutTrig0	FLEXPWM1_PWM2_OUT_TRIG0 output assigned to XBARA1_IN78 input.
kXBARA1_InputFlexpwm1Pwm2OutTrig1	FLEXPWM1_PWM2_OUT_TRIG1 output assigned to XBARA1_IN79 input.
kXBARA1_InputFlexpwm1Pwm3OutTrig0	FLEXPWM1_PWM3_OUT_TRIG0 output assigned to XBARA1_IN80 input.
kXBARA1_InputFlexpwm1Pwm3OutTrig1	FLEXPWM1_PWM3_OUT_TRIG1 output assigned to XBARA1_IN81 input.
kXBARA1_InputFlexpwm2Pwm0OutTrig01	FLEXPWM2_PWM0_OUT_TRIG0_1 output assigned to XBARA1_IN82 input.
kXBARA1_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN83 input.
kXBARA1_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN84 input.
kXBARA1_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN85 input.
kXBARA1_InputFlexpwm3Pwm0OutTrig01	FLEXPWM3_PWM0_OUT_TRIG0_1 output assigned to XBARA1_IN86 input.
kXBARA1_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN87 input.
kXBARA1_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN88 input.
kXBARA1_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN89 input.
kXBARA1_InputFlexpwm4Pwm0OutTrig01	FLEXPWM4_PWM0_OUT_TRIG0_1 output assigned to XBARA1_IN90 input.
kXBARA1_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN91 input.
kXBARA1_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN92 input.
kXBARA1_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN93 input.
kXBARA1_InputRESERVED94	XBARA1_IN94 input is reserved.
kXBARA1_InputRESERVED95	XBARA1_IN95 input is reserved.
kXBARA1_InputRESERVED96	XBARA1_IN96 input is reserved.
kXBARA1_InputRESERVED97	XBARA1_IN97 input is reserved.
kXBARA1_InputRESERVED98	XBARA1_IN98 input is reserved.
kXBARA1_InputRESERVED99	XBARA1_IN99 input is reserved.
kXBARA1_InputRESERVED100	XBARA1_IN100 input is reserved.
kXBARA1_InputRESERVED101	XBARA1_IN101 input is reserved.
kXBARA1_InputPit1Trigger0	PIT1_TRIGGER0 output assigned to XBARA1_IN102 input.
kXBARA1_InputPit1Trigger1	PIT1_TRIGGER1 output assigned to XBARA1_IN103 input.
kXBARA1_InputPit1Trigger2	PIT1_TRIGGER2 output assigned to XBARA1_IN104 input.
kXBARA1_InputPit1Trigger3	PIT1_TRIGGER3 output assigned to XBARA1_IN105 input.
kXBARA1_InputDec1PosMatch	DEC1_POS_MATCH output assigned to XBARA1_IN106 input.
kXBARA1_InputDec2PosMatch	DEC2_POS_MATCH output assigned to XBARA1_IN107 input.
kXBARA1_InputDec3PosMatch	DEC3_POS_MATCH output assigned to XBARA1_IN108 input.
kXBARA1_InputDec4PosMatch	DEC4_POS_MATCH output assigned to XBARA1_IN109 input.
kXBARA1_InputRESERVED110	XBARA1_IN110 input is reserved.
kXBARA1_InputRESERVED111	XBARA1_IN111 input is reserved.
kXBARA1_InputDmaDone0	DMA_DONE0 output assigned to XBARA1_IN112 input.
kXBARA1_InputDmaDone1	DMA_DONE1 output assigned to XBARA1_IN113 input.
kXBARA1_InputDmaDone2	DMA_DONE2 output assigned to XBARA1_IN114 input.
kXBARA1_InputDmaDone3	DMA_DONE3 output assigned to XBARA1_IN115 input.
kXBARA1_InputDmaDone4	DMA_DONE4 output assigned to XBARA1_IN116 input.
kXBARA1_InputDmaDone5	DMA_DONE5 output assigned to XBARA1_IN117 input.
kXBARA1_InputDmaDone6	DMA_DONE6 output assigned to XBARA1_IN118 input.
kXBARA1_InputDmaDone7	DMA_DONE7 output assigned to XBARA1_IN119 input.
kXBARA1_InputDmaLpsrDone0	DMA_LPSR_DONE0 output assigned to XBARA1_IN120 input.
kXBARA1_InputDmaLpsrDone1	DMA_LPSR_DONE1 output assigned to XBARA1_IN121 input.
kXBARA1_InputDmaLpsrDone2	DMA_LPSR_DONE2 output assigned to XBARA1_IN122 input.
kXBARA1_InputDmaLpsrDone3	DMA_LPSR_DONE3 output assigned to XBARA1_IN123 input.
kXBARA1_InputDmaLpsrDone4	DMA_LPSR_DONE4 output assigned to XBARA1_IN124 input.
kXBARA1_InputDmaLpsrDone5	DMA_LPSR_DONE5 output assigned to XBARA1_IN125 input.
kXBARA1_InputDmaLpsrDone6	DMA_LPSR_DONE6 output assigned to XBARA1_IN126 input.
kXBARA1_InputDmaLpsrDone7	DMA_LPSR_DONE7 output assigned to XBARA1_IN127 input.
kXBARA1_InputAoi1Out0	AOI1_OUT0 output assigned to XBARA1_IN128 input.
kXBARA1_InputAoi1Out1	AOI1_OUT1 output assigned to XBARA1_IN129 input.
kXBARA1_InputAoi1Out2	AOI1_OUT2 output assigned to XBARA1_IN130 input.
kXBARA1_InputAoi1Out3	AOI1_OUT3 output assigned to XBARA1_IN131 input.
kXBARA1_InputAoi2Out0	AOI2_OUT0 output assigned to XBARA1_IN132 input.
kXBARA1_InputAoi2Out1	AOI2_OUT1 output assigned to XBARA1_IN133 input.
kXBARA1_InputAoi2Out2	AOI2_OUT2 output assigned to XBARA1_IN134 input.
kXBARA1_InputAoi2Out3	AOI2_OUT3 output assigned to XBARA1_IN135 input.
kXBARA1_InputAdcEtc0Coco0	ADC_ETC0_COCO0 output assigned to XBARA1_IN136 input.
kXBARA1_InputAdcEtc0Coco1	ADC_ETC0_COCO1 output assigned to XBARA1_IN137 input.
kXBARA1_InputAdcEtc0Coco2	ADC_ETC0_COCO2 output assigned to XBARA1_IN138 input.
kXBARA1_InputAdcEtc0Coco3	ADC_ETC0_COCO3 output assigned to XBARA1_IN139 input.
kXBARA1_InputAdcEtc1Coco0	ADC_ETC1_COCO0 output assigned to XBARA1_IN140 input.
kXBARA1_InputAdcEtc1Coco1	ADC_ETC1_COCO1 output assigned to XBARA1_IN141 input.
kXBARA1_InputAdcEtc1Coco2	ADC_ETC1_COCO2 output assigned to XBARA1_IN142 input.
kXBARA1_InputAdcEtc1Coco3	ADC_ETC1_COCO3 output assigned to XBARA1_IN143 input.
kXBARB2_InputLogicLow	LOGIC_LOW output assigned to XBARB2_IN0 input.
kXBARB2_InputLogicHigh	LOGIC_HIGH output assigned to XBARB2_IN1 input.
kXBARB2_InputAcmp1Out	ACMP1_OUT output assigned to XBARB2_IN2 input.
kXBARB2_InputAcmp2Out	ACMP2_OUT output assigned to XBARB2_IN3 input.
kXBARB2_InputAcmp3Out	ACMP3_OUT output assigned to XBARB2_IN4 input.
kXBARB2_InputAcmp4Out	ACMP4_OUT output assigned to XBARB2_IN5 input.
kXBARB2_InputRESERVED6	XBARB2_IN6 input is reserved.
kXBARB2_InputRESERVED7	XBARB2_IN7 input is reserved.
kXBARB2_InputRESERVED8	XBARB2_IN8 input is reserved.
kXBARB2_InputRESERVED9	XBARB2_IN9 input is reserved.
kXBARB2_InputQtimer1Timer0	QTIMER1_TIMER0 output assigned to XBARB2_IN10 input.
kXBARB2_InputQtimer1Timer1	QTIMER1_TIMER1 output assigned to XBARB2_IN11 input.
kXBARB2_InputQtimer1Timer2	QTIMER1_TIMER2 output assigned to XBARB2_IN12 input.
kXBARB2_InputQtimer1Timer3	QTIMER1_TIMER3 output assigned to XBARB2_IN13 input.
kXBARB2_InputQtimer2Timer0	QTIMER2_TIMER0 output assigned to XBARB2_IN14 input.
kXBARB2_InputQtimer2Timer1	QTIMER2_TIMER1 output assigned to XBARB2_IN15 input.
kXBARB2_InputQtimer2Timer2	QTIMER2_TIMER2 output assigned to XBARB2_IN16 input.
kXBARB2_InputQtimer2Timer3	QTIMER2_TIMER3 output assigned to XBARB2_IN17 input.
kXBARB2_InputQtimer3Timer0	QTIMER3_TIMER0 output assigned to XBARB2_IN18 input.
kXBARB2_InputQtimer3Timer1	QTIMER3_TIMER1 output assigned to XBARB2_IN19 input.
kXBARB2_InputQtimer3Timer2	QTIMER3_TIMER2 output assigned to XBARB2_IN20 input.
kXBARB2_InputQtimer3Timer3	QTIMER3_TIMER3 output assigned to XBARB2_IN21 input.
kXBARB2_InputQtimer4Timer0	QTIMER4_TIMER0 output assigned to XBARB2_IN22 input.
kXBARB2_InputQtimer4Timer1	QTIMER4_TIMER1 output assigned to XBARB2_IN23 input.
kXBARB2_InputQtimer4Timer2	QTIMER4_TIMER2 output assigned to XBARB2_IN24 input.
kXBARB2_InputQtimer4Timer3	QTIMER4_TIMER3 output assigned to XBARB2_IN25 input.
kXBARB2_InputRESERVED26	XBARB2_IN26 input is reserved.
kXBARB2_InputRESERVED27	XBARB2_IN27 input is reserved.
kXBARB2_InputRESERVED28	XBARB2_IN28 input is reserved.
kXBARB2_InputRESERVED29	XBARB2_IN29 input is reserved.
kXBARB2_InputRESERVED30	XBARB2_IN30 input is reserved.
kXBARB2_InputRESERVED31	XBARB2_IN31 input is reserved.
kXBARB2_InputRESERVED32	XBARB2_IN32 input is reserved.
kXBARB2_InputRESERVED33	XBARB2_IN33 input is reserved.
kXBARB2_InputFlexpwm1Pwm0OutTrig01	FLEXPWM1_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN34 input.
kXBARB2_InputFlexpwm1Pwm1OutTrig01	FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN35 input.
kXBARB2_InputFlexpwm1Pwm2OutTrig01	FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN36 input.
kXBARB2_InputFlexpwm1Pwm3OutTrig01	FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN37 input.
kXBARB2_InputFlexpwm2Pwm0OutTrig01	FLEXPWM2_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN38 input.
kXBARB2_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN39 input.
kXBARB2_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN40 input.
kXBARB2_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN41 input.
kXBARB2_InputFlexpwm3Pwm0OutTrig01	FLEXPWM3_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN42 input.
kXBARB2_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN43 input.
kXBARB2_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN44 input.
kXBARB2_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN45 input.
kXBARB2_InputFlexpwm4Pwm0OutTrig01	FLEXPWM4_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN46 input.
kXBARB2_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN47 input.
kXBARB2_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN48 input.
kXBARB2_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN49 input.
kXBARB2_InputRESERVED50	XBARB2_IN50 input is reserved.
kXBARB2_InputRESERVED51	XBARB2_IN51 input is reserved.
kXBARB2_InputRESERVED52	XBARB2_IN52 input is reserved.
kXBARB2_InputRESERVED53	XBARB2_IN53 input is reserved.
kXBARB2_InputRESERVED54	XBARB2_IN54 input is reserved.
kXBARB2_InputRESERVED55	XBARB2_IN55 input is reserved.
kXBARB2_InputRESERVED56	XBARB2_IN56 input is reserved.
kXBARB2_InputRESERVED57	XBARB2_IN57 input is reserved.
kXBARB2_InputPit1Trigger0	PIT1_TRIGGER0 output assigned to XBARB2_IN58 input.
kXBARB2_InputPit1Trigger1	PIT1_TRIGGER1 output assigned to XBARB2_IN59 input.
kXBARB2_InputAdcEtc0Coco0	ADC_ETC0_COCO0 output assigned to XBARB2_IN60 input.
kXBARB2_InputAdcEtc0Coco1	ADC_ETC0_COCO1 output assigned to XBARB2_IN61 input.
kXBARB2_InputAdcEtc0Coco2	ADC_ETC0_COCO2 output assigned to XBARB2_IN62 input.
kXBARB2_InputAdcEtc0Coco3	ADC_ETC0_COCO3 output assigned to XBARB2_IN63 input.
kXBARB2_InputAdcEtc1Coco0	ADC_ETC1_COCO0 output assigned to XBARB2_IN64 input.
kXBARB2_InputAdcEtc1Coco1	ADC_ETC1_COCO1 output assigned to XBARB2_IN65 input.
kXBARB2_InputAdcEtc1Coco2	ADC_ETC1_COCO2 output assigned to XBARB2_IN66 input.
kXBARB2_InputAdcEtc1Coco3	ADC_ETC1_COCO3 output assigned to XBARB2_IN67 input.
kXBARB2_InputRESERVED68	XBARB2_IN68 input is reserved.
kXBARB2_InputRESERVED69	XBARB2_IN69 input is reserved.
kXBARB2_InputRESERVED70	XBARB2_IN70 input is reserved.
kXBARB2_InputRESERVED71	XBARB2_IN71 input is reserved.
kXBARB2_InputRESERVED72	XBARB2_IN72 input is reserved.
kXBARB2_InputRESERVED73	XBARB2_IN73 input is reserved.
kXBARB2_InputRESERVED74	XBARB2_IN74 input is reserved.
kXBARB2_InputRESERVED75	XBARB2_IN75 input is reserved.
kXBARB2_InputDec1PosMatch	DEC1_POS_MATCH output assigned to XBARB2_IN76 input.
kXBARB2_InputDec2PosMatch	DEC2_POS_MATCH output assigned to XBARB2_IN77 input.
kXBARB2_InputDec3PosMatch	DEC3_POS_MATCH output assigned to XBARB2_IN78 input.
kXBARB2_InputDec4PosMatch	DEC4_POS_MATCH output assigned to XBARB2_IN79 input.
kXBARB2_InputRESERVED80	XBARB2_IN80 input is reserved.
kXBARB2_InputRESERVED81	XBARB2_IN81 input is reserved.
kXBARB2_InputDmaDone0	DMA_DONE0 output assigned to XBARB2_IN82 input.
kXBARB2_InputDmaDone1	DMA_DONE1 output assigned to XBARB2_IN83 input.
kXBARB2_InputDmaDone2	DMA_DONE2 output assigned to XBARB2_IN84 input.
kXBARB2_InputDmaDone3	DMA_DONE3 output assigned to XBARB2_IN85 input.
kXBARB2_InputDmaDone4	DMA_DONE4 output assigned to XBARB2_IN86 input.
kXBARB2_InputDmaDone5	DMA_DONE5 output assigned to XBARB2_IN87 input.
kXBARB2_InputDmaDone6	DMA_DONE6 output assigned to XBARB2_IN88 input.
kXBARB2_InputDmaDone7	DMA_DONE7 output assigned to XBARB2_IN89 input.
kXBARB2_InputDmaLpsrDone0	DMA_LPSR_DONE0 output assigned to XBARB2_IN90 input.
kXBARB2_InputDmaLpsrDone1	DMA_LPSR_DONE1 output assigned to XBARB2_IN91 input.
kXBARB2_InputDmaLpsrDone2	DMA_LPSR_DONE2 output assigned to XBARB2_IN92 input.
kXBARB2_InputDmaLpsrDone3	DMA_LPSR_DONE3 output assigned to XBARB2_IN93 input.
kXBARB2_InputDmaLpsrDone4	DMA_LPSR_DONE4 output assigned to XBARB2_IN94 input.
kXBARB2_InputDmaLpsrDone5	DMA_LPSR_DONE5 output assigned to XBARB2_IN95 input.
kXBARB2_InputDmaLpsrDone6	DMA_LPSR_DONE6 output assigned to XBARB2_IN96 input.
kXBARB2_InputDmaLpsrDone7	DMA_LPSR_DONE7 output assigned to XBARB2_IN97 input.
kXBARB3_InputLogicLow	LOGIC_LOW output assigned to XBARB3_IN0 input.
kXBARB3_InputLogicHigh	LOGIC_HIGH output assigned to XBARB3_IN1 input.
kXBARB3_InputAcmp1Out	ACMP1_OUT output assigned to XBARB3_IN2 input.
kXBARB3_InputAcmp2Out	ACMP2_OUT output assigned to XBARB3_IN3 input.
kXBARB3_InputAcmp3Out	ACMP3_OUT output assigned to XBARB3_IN4 input.
kXBARB3_InputAcmp4Out	ACMP4_OUT output assigned to XBARB3_IN5 input.
kXBARB3_InputRESERVED6	XBARB3_IN6 input is reserved.
kXBARB3_InputRESERVED7	XBARB3_IN7 input is reserved.
kXBARB3_InputRESERVED8	XBARB3_IN8 input is reserved.
kXBARB3_InputRESERVED9	XBARB3_IN9 input is reserved.
kXBARB3_InputQtimer1Timer0	QTIMER1_TIMER0 output assigned to XBARB3_IN10 input.
kXBARB3_InputQtimer1Timer1	QTIMER1_TIMER1 output assigned to XBARB3_IN11 input.
kXBARB3_InputQtimer1Timer2	QTIMER1_TIMER2 output assigned to XBARB3_IN12 input.
kXBARB3_InputQtimer1Timer3	QTIMER1_TIMER3 output assigned to XBARB3_IN13 input.
kXBARB3_InputQtimer2Timer0	QTIMER2_TIMER0 output assigned to XBARB3_IN14 input.
kXBARB3_InputQtimer2Timer1	QTIMER2_TIMER1 output assigned to XBARB3_IN15 input.
kXBARB3_InputQtimer2Timer2	QTIMER2_TIMER2 output assigned to XBARB3_IN16 input.
kXBARB3_InputQtimer2Timer3	QTIMER2_TIMER3 output assigned to XBARB3_IN17 input.
kXBARB3_InputQtimer3Timer0	QTIMER3_TIMER0 output assigned to XBARB3_IN18 input.
kXBARB3_InputQtimer3Timer1	QTIMER3_TIMER1 output assigned to XBARB3_IN19 input.
kXBARB3_InputQtimer3Timer2	QTIMER3_TIMER2 output assigned to XBARB3_IN20 input.
kXBARB3_InputQtimer3Timer3	QTIMER3_TIMER3 output assigned to XBARB3_IN21 input.
kXBARB3_InputQtimer4Timer0	QTIMER4_TIMER0 output assigned to XBARB3_IN22 input.
kXBARB3_InputQtimer4Timer1	QTIMER4_TIMER1 output assigned to XBARB3_IN23 input.
kXBARB3_InputQtimer4Timer2	QTIMER4_TIMER2 output assigned to XBARB3_IN24 input.
kXBARB3_InputQtimer4Timer3	QTIMER4_TIMER3 output assigned to XBARB3_IN25 input.
kXBARB3_InputRESERVED26	XBARB3_IN26 input is reserved.
kXBARB3_InputRESERVED27	XBARB3_IN27 input is reserved.
kXBARB3_InputRESERVED28	XBARB3_IN28 input is reserved.
kXBARB3_InputRESERVED29	XBARB3_IN29 input is reserved.
kXBARB3_InputRESERVED30	XBARB3_IN30 input is reserved.
kXBARB3_InputRESERVED31	XBARB3_IN31 input is reserved.
kXBARB3_InputRESERVED32	XBARB3_IN32 input is reserved.
kXBARB3_InputRESERVED33	XBARB3_IN33 input is reserved.
kXBARB3_InputFlexpwm1Pwm0OutTrig01	FLEXPWM1_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN34 input.
kXBARB3_InputFlexpwm1Pwm1OutTrig01	FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN35 input.
kXBARB3_InputFlexpwm1Pwm2OutTrig01	FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN36 input.
kXBARB3_InputFlexpwm1Pwm3OutTrig01	FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN37 input.
kXBARB3_InputFlexpwm2Pwm0OutTrig01	FLEXPWM2_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN38 input.
kXBARB3_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN39 input.
kXBARB3_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN40 input.
kXBARB3_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN41 input.
kXBARB3_InputFlexpwm3Pwm0OutTrig01	FLEXPWM3_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN42 input.
kXBARB3_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN43 input.
kXBARB3_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN44 input.
kXBARB3_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN45 input.
kXBARB3_InputFlexpwm4Pwm0OutTrig01	FLEXPWM4_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN46 input.
kXBARB3_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN47 input.
kXBARB3_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN48 input.
kXBARB3_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN49 input.
kXBARB3_InputRESERVED50	XBARB3_IN50 input is reserved.
kXBARB3_InputRESERVED51	XBARB3_IN51 input is reserved.
kXBARB3_InputRESERVED52	XBARB3_IN52 input is reserved.
kXBARB3_InputRESERVED53	XBARB3_IN53 input is reserved.
kXBARB3_InputRESERVED54	XBARB3_IN54 input is reserved.
kXBARB3_InputRESERVED55	XBARB3_IN55 input is reserved.
kXBARB3_InputRESERVED56	XBARB3_IN56 input is reserved.
kXBARB3_InputRESERVED57	XBARB3_IN57 input is reserved.
kXBARB3_InputPit1Trigger0	PIT1_TRIGGER0 output assigned to XBARB3_IN58 input.
kXBARB3_InputPit1Trigger1	PIT1_TRIGGER1 output assigned to XBARB3_IN59 input.
kXBARB3_InputAdcEtc0Coco0	ADC_ETC0_COCO0 output assigned to XBARB3_IN60 input.
kXBARB3_InputAdcEtc0Coco1	ADC_ETC0_COCO1 output assigned to XBARB3_IN61 input.
kXBARB3_InputAdcEtc0Coco2	ADC_ETC0_COCO2 output assigned to XBARB3_IN62 input.
kXBARB3_InputAdcEtc0Coco3	ADC_ETC0_COCO3 output assigned to XBARB3_IN63 input.
kXBARB3_InputAdcEtc1Coco0	ADC_ETC1_COCO0 output assigned to XBARB3_IN64 input.
kXBARB3_InputAdcEtc1Coco1	ADC_ETC1_COCO1 output assigned to XBARB3_IN65 input.
kXBARB3_InputAdcEtc1Coco2	ADC_ETC1_COCO2 output assigned to XBARB3_IN66 input.
kXBARB3_InputAdcEtc1Coco3	ADC_ETC1_COCO3 output assigned to XBARB3_IN67 input.
kXBARB3_InputRESERVED68	XBARB3_IN68 input is reserved.
kXBARB3_InputRESERVED69	XBARB3_IN69 input is reserved.
kXBARB3_InputRESERVED70	XBARB3_IN70 input is reserved.
kXBARB3_InputRESERVED71	XBARB3_IN71 input is reserved.
kXBARB3_InputRESERVED72	XBARB3_IN72 input is reserved.
kXBARB3_InputRESERVED73	XBARB3_IN73 input is reserved.
kXBARB3_InputRESERVED74	XBARB3_IN74 input is reserved.
kXBARB3_InputRESERVED75	XBARB3_IN75 input is reserved.
kXBARB3_InputDec1PosMatch	DEC1_POS_MATCH output assigned to XBARB3_IN76 input.
kXBARB3_InputDec2PosMatch	DEC2_POS_MATCH output assigned to XBARB3_IN77 input.
kXBARB3_InputDec3PosMatch	DEC3_POS_MATCH output assigned to XBARB3_IN78 input.
kXBARB3_InputDec4PosMatch	DEC4_POS_MATCH output assigned to XBARB3_IN79 input.
kXBARB3_InputRESERVED80	XBARB3_IN80 input is reserved.
kXBARB3_InputRESERVED81	XBARB3_IN81 input is reserved.
kXBARB3_InputDmaDone0	DMA_DONE0 output assigned to XBARB3_IN82 input.
kXBARB3_InputDmaDone1	DMA_DONE1 output assigned to XBARB3_IN83 input.
kXBARB3_InputDmaDone2	DMA_DONE2 output assigned to XBARB3_IN84 input.
kXBARB3_InputDmaDone3	DMA_DONE3 output assigned to XBARB3_IN85 input.
kXBARB3_InputDmaDone4	DMA_DONE4 output assigned to XBARB3_IN86 input.
kXBARB3_InputDmaDone5	DMA_DONE5 output assigned to XBARB3_IN87 input.
kXBARB3_InputDmaDone6	DMA_DONE6 output assigned to XBARB3_IN88 input.
kXBARB3_InputDmaDone7	DMA_DONE7 output assigned to XBARB3_IN89 input.
kXBARB3_InputDmaLpsrDone0	DMA_LPSR_DONE0 output assigned to XBARB3_IN90 input.
kXBARB3_InputDmaLpsrDone1	DMA_LPSR_DONE1 output assigned to XBARB3_IN91 input.
kXBARB3_InputDmaLpsrDone2	DMA_LPSR_DONE2 output assigned to XBARB3_IN92 input.
kXBARB3_InputDmaLpsrDone3	DMA_LPSR_DONE3 output assigned to XBARB3_IN93 input.
kXBARB3_InputDmaLpsrDone4	DMA_LPSR_DONE4 output assigned to XBARB3_IN94 input.
kXBARB3_InputDmaLpsrDone5	DMA_LPSR_DONE5 output assigned to XBARB3_IN95 input.
kXBARB3_InputDmaLpsrDone6	DMA_LPSR_DONE6 output assigned to XBARB3_IN96 input.
kXBARB3_InputDmaLpsrDone7	DMA_LPSR_DONE7 output assigned to XBARB3_IN97 input.
kXBARA1_InputLogicLow	LOGIC_LOW output assigned to XBARA1_IN0 input.
kXBARA1_InputLogicHigh	LOGIC_HIGH output assigned to XBARA1_IN1 input.
kXBARA1_InputRESERVED2	XBARA1_IN2 input is reserved.
kXBARA1_InputRESERVED3	XBARA1_IN3 input is reserved.
kXBARA1_InputIomuxXbarInout04	IOMUX_XBAR_INOUT04 output assigned to XBARA1_IN4 input.
kXBARA1_InputIomuxXbarInout05	IOMUX_XBAR_INOUT05 output assigned to XBARA1_IN5 input.
kXBARA1_InputIomuxXbarInout06	IOMUX_XBAR_INOUT06 output assigned to XBARA1_IN6 input.
kXBARA1_InputIomuxXbarInout07	IOMUX_XBAR_INOUT07 output assigned to XBARA1_IN7 input.
kXBARA1_InputIomuxXbarInout08	IOMUX_XBAR_INOUT08 output assigned to XBARA1_IN8 input.
kXBARA1_InputIomuxXbarInout09	IOMUX_XBAR_INOUT09 output assigned to XBARA1_IN9 input.
kXBARA1_InputIomuxXbarInout10	IOMUX_XBAR_INOUT10 output assigned to XBARA1_IN10 input.
kXBARA1_InputIomuxXbarInout11	IOMUX_XBAR_INOUT11 output assigned to XBARA1_IN11 input.
kXBARA1_InputIomuxXbarInout12	IOMUX_XBAR_INOUT12 output assigned to XBARA1_IN12 input.
kXBARA1_InputIomuxXbarInout13	IOMUX_XBAR_INOUT13 output assigned to XBARA1_IN13 input.
kXBARA1_InputIomuxXbarInout14	IOMUX_XBAR_INOUT14 output assigned to XBARA1_IN14 input.
kXBARA1_InputIomuxXbarInout15	IOMUX_XBAR_INOUT15 output assigned to XBARA1_IN15 input.
kXBARA1_InputIomuxXbarInout16	IOMUX_XBAR_INOUT16 output assigned to XBARA1_IN16 input.
kXBARA1_InputIomuxXbarInout17	IOMUX_XBAR_INOUT17 output assigned to XBARA1_IN17 input.
kXBARA1_InputIomuxXbarInout18	IOMUX_XBAR_INOUT18 output assigned to XBARA1_IN18 input.
kXBARA1_InputIomuxXbarInout19	IOMUX_XBAR_INOUT19 output assigned to XBARA1_IN19 input.
kXBARA1_InputIomuxXbarInout20	IOMUX_XBAR_INOUT20 output assigned to XBARA1_IN20 input.
kXBARA1_InputIomuxXbarInout21	IOMUX_XBAR_INOUT21 output assigned to XBARA1_IN21 input.
kXBARA1_InputIomuxXbarInout22	IOMUX_XBAR_INOUT22 output assigned to XBARA1_IN22 input.
kXBARA1_InputIomuxXbarInout23	IOMUX_XBAR_INOUT23 output assigned to XBARA1_IN23 input.
kXBARA1_InputIomuxXbarInout24	IOMUX_XBAR_INOUT24 output assigned to XBARA1_IN24 input.
kXBARA1_InputIomuxXbarInout25	IOMUX_XBAR_INOUT25 output assigned to XBARA1_IN25 input.
kXBARA1_InputIomuxXbarInout26	IOMUX_XBAR_INOUT26 output assigned to XBARA1_IN26 input.
kXBARA1_InputIomuxXbarInout27	IOMUX_XBAR_INOUT27 output assigned to XBARA1_IN27 input.
kXBARA1_InputIomuxXbarInout28	IOMUX_XBAR_INOUT28 output assigned to XBARA1_IN28 input.
kXBARA1_InputIomuxXbarInout29	IOMUX_XBAR_INOUT29 output assigned to XBARA1_IN29 input.
kXBARA1_InputIomuxXbarInout30	IOMUX_XBAR_INOUT30 output assigned to XBARA1_IN30 input.
kXBARA1_InputIomuxXbarInout31	IOMUX_XBAR_INOUT31 output assigned to XBARA1_IN31 input.
kXBARA1_InputIomuxXbarInout32	IOMUX_XBAR_INOUT32 output assigned to XBARA1_IN32 input.
kXBARA1_InputIomuxXbarInout33	IOMUX_XBAR_INOUT33 output assigned to XBARA1_IN33 input.
kXBARA1_InputIomuxXbarInout34	IOMUX_XBAR_INOUT34 output assigned to XBARA1_IN34 input.
kXBARA1_InputIomuxXbarInout35	IOMUX_XBAR_INOUT35 output assigned to XBARA1_IN35 input.
kXBARA1_InputIomuxXbarInout36	IOMUX_XBAR_INOUT36 output assigned to XBARA1_IN36 input.
kXBARA1_InputIomuxXbarInout37	IOMUX_XBAR_INOUT37 output assigned to XBARA1_IN37 input.
kXBARA1_InputIomuxXbarInout38	IOMUX_XBAR_INOUT38 output assigned to XBARA1_IN38 input.
kXBARA1_InputIomuxXbarInout39	IOMUX_XBAR_INOUT39 output assigned to XBARA1_IN39 input.
kXBARA1_InputIomuxXbarInout40	IOMUX_XBAR_INOUT40 output assigned to XBARA1_IN40 input.
kXBARA1_InputRESERVED41	XBARA1_IN41 input is reserved.
kXBARA1_InputAcmp1Out	ACMP1_OUT output assigned to XBARA1_IN42 input.
kXBARA1_InputAcmp2Out	ACMP2_OUT output assigned to XBARA1_IN43 input.
kXBARA1_InputAcmp3Out	ACMP3_OUT output assigned to XBARA1_IN44 input.
kXBARA1_InputAcmp4Out	ACMP4_OUT output assigned to XBARA1_IN45 input.
kXBARA1_InputRESERVED46	XBARA1_IN46 input is reserved.
kXBARA1_InputRESERVED47	XBARA1_IN47 input is reserved.
kXBARA1_InputRESERVED48	XBARA1_IN48 input is reserved.
kXBARA1_InputRESERVED49	XBARA1_IN49 input is reserved.
kXBARA1_InputQtimer1Timer0	QTIMER1_TIMER0 output assigned to XBARA1_IN50 input.
kXBARA1_InputQtimer1Timer1	QTIMER1_TIMER1 output assigned to XBARA1_IN51 input.
kXBARA1_InputQtimer1Timer2	QTIMER1_TIMER2 output assigned to XBARA1_IN52 input.
kXBARA1_InputQtimer1Timer3	QTIMER1_TIMER3 output assigned to XBARA1_IN53 input.
kXBARA1_InputQtimer2Timer0	QTIMER2_TIMER0 output assigned to XBARA1_IN54 input.
kXBARA1_InputQtimer2Timer1	QTIMER2_TIMER1 output assigned to XBARA1_IN55 input.
kXBARA1_InputQtimer2Timer2	QTIMER2_TIMER2 output assigned to XBARA1_IN56 input.
kXBARA1_InputQtimer2Timer3	QTIMER2_TIMER3 output assigned to XBARA1_IN57 input.
kXBARA1_InputQtimer3Timer0	QTIMER3_TIMER0 output assigned to XBARA1_IN58 input.
kXBARA1_InputQtimer3Timer1	QTIMER3_TIMER1 output assigned to XBARA1_IN59 input.
kXBARA1_InputQtimer3Timer2	QTIMER3_TIMER2 output assigned to XBARA1_IN60 input.
kXBARA1_InputQtimer3Timer3	QTIMER3_TIMER3 output assigned to XBARA1_IN61 input.
kXBARA1_InputQtimer4Timer0	QTIMER4_TIMER0 output assigned to XBARA1_IN62 input.
kXBARA1_InputQtimer4Timer1	QTIMER4_TIMER1 output assigned to XBARA1_IN63 input.
kXBARA1_InputQtimer4Timer2	QTIMER4_TIMER2 output assigned to XBARA1_IN64 input.
kXBARA1_InputQtimer4Timer3	QTIMER4_TIMER3 output assigned to XBARA1_IN65 input.
kXBARA1_InputRESERVED66	XBARA1_IN66 input is reserved.
kXBARA1_InputRESERVED67	XBARA1_IN67 input is reserved.
kXBARA1_InputRESERVED68	XBARA1_IN68 input is reserved.
kXBARA1_InputRESERVED69	XBARA1_IN69 input is reserved.
kXBARA1_InputRESERVED70	XBARA1_IN70 input is reserved.
kXBARA1_InputRESERVED71	XBARA1_IN71 input is reserved.
kXBARA1_InputRESERVED72	XBARA1_IN72 input is reserved.
kXBARA1_InputRESERVED73	XBARA1_IN73 input is reserved.
kXBARA1_InputFlexpwm1Pwm0OutTrig0	FLEXPWM1_PWM0_OUT_TRIG0 output assigned to XBARA1_IN74 input.
kXBARA1_InputFlexpwm1Pwm0OutTrig1	FLEXPWM1_PWM0_OUT_TRIG1 output assigned to XBARA1_IN75 input.
kXBARA1_InputFlexpwm1Pwm1OutTrig0	FLEXPWM1_PWM1_OUT_TRIG0 output assigned to XBARA1_IN76 input.
kXBARA1_InputFlexpwm1Pwm1OutTrig1	FLEXPWM1_PWM1_OUT_TRIG1 output assigned to XBARA1_IN77 input.
kXBARA1_InputFlexpwm1Pwm2OutTrig0	FLEXPWM1_PWM2_OUT_TRIG0 output assigned to XBARA1_IN78 input.
kXBARA1_InputFlexpwm1Pwm2OutTrig1	FLEXPWM1_PWM2_OUT_TRIG1 output assigned to XBARA1_IN79 input.
kXBARA1_InputFlexpwm1Pwm3OutTrig0	FLEXPWM1_PWM3_OUT_TRIG0 output assigned to XBARA1_IN80 input.
kXBARA1_InputFlexpwm1Pwm3OutTrig1	FLEXPWM1_PWM3_OUT_TRIG1 output assigned to XBARA1_IN81 input.
kXBARA1_InputFlexpwm2Pwm0OutTrig01	FLEXPWM2_PWM0_OUT_TRIG0_1 output assigned to XBARA1_IN82 input.
kXBARA1_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN83 input.
kXBARA1_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN84 input.
kXBARA1_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN85 input.
kXBARA1_InputFlexpwm3Pwm0OutTrig01	FLEXPWM3_PWM0_OUT_TRIG0_1 output assigned to XBARA1_IN86 input.
kXBARA1_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN87 input.
kXBARA1_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN88 input.
kXBARA1_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN89 input.
kXBARA1_InputFlexpwm4Pwm0OutTrig01	FLEXPWM4_PWM0_OUT_TRIG0_1 output assigned to XBARA1_IN90 input.
kXBARA1_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN91 input.
kXBARA1_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN92 input.
kXBARA1_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN93 input.
kXBARA1_InputRESERVED94	XBARA1_IN94 input is reserved.
kXBARA1_InputRESERVED95	XBARA1_IN95 input is reserved.
kXBARA1_InputRESERVED96	XBARA1_IN96 input is reserved.
kXBARA1_InputRESERVED97	XBARA1_IN97 input is reserved.
kXBARA1_InputRESERVED98	XBARA1_IN98 input is reserved.
kXBARA1_InputRESERVED99	XBARA1_IN99 input is reserved.
kXBARA1_InputRESERVED100	XBARA1_IN100 input is reserved.
kXBARA1_InputRESERVED101	XBARA1_IN101 input is reserved.
kXBARA1_InputPit1Trigger0	PIT1_TRIGGER0 output assigned to XBARA1_IN102 input.
kXBARA1_InputPit1Trigger1	PIT1_TRIGGER1 output assigned to XBARA1_IN103 input.
kXBARA1_InputPit1Trigger2	PIT1_TRIGGER2 output assigned to XBARA1_IN104 input.
kXBARA1_InputPit1Trigger3	PIT1_TRIGGER3 output assigned to XBARA1_IN105 input.
kXBARA1_InputDec1PosMatch	DEC1_POS_MATCH output assigned to XBARA1_IN106 input.
kXBARA1_InputDec2PosMatch	DEC2_POS_MATCH output assigned to XBARA1_IN107 input.
kXBARA1_InputDec3PosMatch	DEC3_POS_MATCH output assigned to XBARA1_IN108 input.
kXBARA1_InputDec4PosMatch	DEC4_POS_MATCH output assigned to XBARA1_IN109 input.
kXBARA1_InputRESERVED110	XBARA1_IN110 input is reserved.
kXBARA1_InputRESERVED111	XBARA1_IN111 input is reserved.
kXBARA1_InputDmaDone0	DMA_DONE0 output assigned to XBARA1_IN112 input.
kXBARA1_InputDmaDone1	DMA_DONE1 output assigned to XBARA1_IN113 input.
kXBARA1_InputDmaDone2	DMA_DONE2 output assigned to XBARA1_IN114 input.
kXBARA1_InputDmaDone3	DMA_DONE3 output assigned to XBARA1_IN115 input.
kXBARA1_InputDmaDone4	DMA_DONE4 output assigned to XBARA1_IN116 input.
kXBARA1_InputDmaDone5	DMA_DONE5 output assigned to XBARA1_IN117 input.
kXBARA1_InputDmaDone6	DMA_DONE6 output assigned to XBARA1_IN118 input.
kXBARA1_InputDmaDone7	DMA_DONE7 output assigned to XBARA1_IN119 input.
kXBARA1_InputDmaLpsrDone0	DMA_LPSR_DONE0 output assigned to XBARA1_IN120 input.
kXBARA1_InputDmaLpsrDone1	DMA_LPSR_DONE1 output assigned to XBARA1_IN121 input.
kXBARA1_InputDmaLpsrDone2	DMA_LPSR_DONE2 output assigned to XBARA1_IN122 input.
kXBARA1_InputDmaLpsrDone3	DMA_LPSR_DONE3 output assigned to XBARA1_IN123 input.
kXBARA1_InputDmaLpsrDone4	DMA_LPSR_DONE4 output assigned to XBARA1_IN124 input.
kXBARA1_InputDmaLpsrDone5	DMA_LPSR_DONE5 output assigned to XBARA1_IN125 input.
kXBARA1_InputDmaLpsrDone6	DMA_LPSR_DONE6 output assigned to XBARA1_IN126 input.
kXBARA1_InputDmaLpsrDone7	DMA_LPSR_DONE7 output assigned to XBARA1_IN127 input.
kXBARA1_InputAoi1Out0	AOI1_OUT0 output assigned to XBARA1_IN128 input.
kXBARA1_InputAoi1Out1	AOI1_OUT1 output assigned to XBARA1_IN129 input.
kXBARA1_InputAoi1Out2	AOI1_OUT2 output assigned to XBARA1_IN130 input.
kXBARA1_InputAoi1Out3	AOI1_OUT3 output assigned to XBARA1_IN131 input.
kXBARA1_InputAoi2Out0	AOI2_OUT0 output assigned to XBARA1_IN132 input.
kXBARA1_InputAoi2Out1	AOI2_OUT1 output assigned to XBARA1_IN133 input.
kXBARA1_InputAoi2Out2	AOI2_OUT2 output assigned to XBARA1_IN134 input.
kXBARA1_InputAoi2Out3	AOI2_OUT3 output assigned to XBARA1_IN135 input.
kXBARA1_InputAdcEtc0Coco0	ADC_ETC0_COCO0 output assigned to XBARA1_IN136 input.
kXBARA1_InputAdcEtc0Coco1	ADC_ETC0_COCO1 output assigned to XBARA1_IN137 input.
kXBARA1_InputAdcEtc0Coco2	ADC_ETC0_COCO2 output assigned to XBARA1_IN138 input.
kXBARA1_InputAdcEtc0Coco3	ADC_ETC0_COCO3 output assigned to XBARA1_IN139 input.
kXBARA1_InputAdcEtc1Coco0	ADC_ETC1_COCO0 output assigned to XBARA1_IN140 input.
kXBARA1_InputAdcEtc1Coco1	ADC_ETC1_COCO1 output assigned to XBARA1_IN141 input.
kXBARA1_InputAdcEtc1Coco2	ADC_ETC1_COCO2 output assigned to XBARA1_IN142 input.
kXBARA1_InputAdcEtc1Coco3	ADC_ETC1_COCO3 output assigned to XBARA1_IN143 input.
kXBARB2_InputLogicLow	LOGIC_LOW output assigned to XBARB2_IN0 input.
kXBARB2_InputLogicHigh	LOGIC_HIGH output assigned to XBARB2_IN1 input.
kXBARB2_InputAcmp1Out	ACMP1_OUT output assigned to XBARB2_IN2 input.
kXBARB2_InputAcmp2Out	ACMP2_OUT output assigned to XBARB2_IN3 input.
kXBARB2_InputAcmp3Out	ACMP3_OUT output assigned to XBARB2_IN4 input.
kXBARB2_InputAcmp4Out	ACMP4_OUT output assigned to XBARB2_IN5 input.
kXBARB2_InputRESERVED6	XBARB2_IN6 input is reserved.
kXBARB2_InputRESERVED7	XBARB2_IN7 input is reserved.
kXBARB2_InputRESERVED8	XBARB2_IN8 input is reserved.
kXBARB2_InputRESERVED9	XBARB2_IN9 input is reserved.
kXBARB2_InputQtimer1Timer0	QTIMER1_TIMER0 output assigned to XBARB2_IN10 input.
kXBARB2_InputQtimer1Timer1	QTIMER1_TIMER1 output assigned to XBARB2_IN11 input.
kXBARB2_InputQtimer1Timer2	QTIMER1_TIMER2 output assigned to XBARB2_IN12 input.
kXBARB2_InputQtimer1Timer3	QTIMER1_TIMER3 output assigned to XBARB2_IN13 input.
kXBARB2_InputQtimer2Timer0	QTIMER2_TIMER0 output assigned to XBARB2_IN14 input.
kXBARB2_InputQtimer2Timer1	QTIMER2_TIMER1 output assigned to XBARB2_IN15 input.
kXBARB2_InputQtimer2Timer2	QTIMER2_TIMER2 output assigned to XBARB2_IN16 input.
kXBARB2_InputQtimer2Timer3	QTIMER2_TIMER3 output assigned to XBARB2_IN17 input.
kXBARB2_InputQtimer3Timer0	QTIMER3_TIMER0 output assigned to XBARB2_IN18 input.
kXBARB2_InputQtimer3Timer1	QTIMER3_TIMER1 output assigned to XBARB2_IN19 input.
kXBARB2_InputQtimer3Timer2	QTIMER3_TIMER2 output assigned to XBARB2_IN20 input.
kXBARB2_InputQtimer3Timer3	QTIMER3_TIMER3 output assigned to XBARB2_IN21 input.
kXBARB2_InputQtimer4Timer0	QTIMER4_TIMER0 output assigned to XBARB2_IN22 input.
kXBARB2_InputQtimer4Timer1	QTIMER4_TIMER1 output assigned to XBARB2_IN23 input.
kXBARB2_InputQtimer4Timer2	QTIMER4_TIMER2 output assigned to XBARB2_IN24 input.
kXBARB2_InputQtimer4Timer3	QTIMER4_TIMER3 output assigned to XBARB2_IN25 input.
kXBARB2_InputRESERVED26	XBARB2_IN26 input is reserved.
kXBARB2_InputRESERVED27	XBARB2_IN27 input is reserved.
kXBARB2_InputRESERVED28	XBARB2_IN28 input is reserved.
kXBARB2_InputRESERVED29	XBARB2_IN29 input is reserved.
kXBARB2_InputRESERVED30	XBARB2_IN30 input is reserved.
kXBARB2_InputRESERVED31	XBARB2_IN31 input is reserved.
kXBARB2_InputRESERVED32	XBARB2_IN32 input is reserved.
kXBARB2_InputRESERVED33	XBARB2_IN33 input is reserved.
kXBARB2_InputFlexpwm1Pwm0OutTrig01	FLEXPWM1_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN34 input.
kXBARB2_InputFlexpwm1Pwm1OutTrig01	FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN35 input.
kXBARB2_InputFlexpwm1Pwm2OutTrig01	FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN36 input.
kXBARB2_InputFlexpwm1Pwm3OutTrig01	FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN37 input.
kXBARB2_InputFlexpwm2Pwm0OutTrig01	FLEXPWM2_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN38 input.
kXBARB2_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN39 input.
kXBARB2_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN40 input.
kXBARB2_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN41 input.
kXBARB2_InputFlexpwm3Pwm0OutTrig01	FLEXPWM3_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN42 input.
kXBARB2_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN43 input.
kXBARB2_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN44 input.
kXBARB2_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN45 input.
kXBARB2_InputFlexpwm4Pwm0OutTrig01	FLEXPWM4_PWM0_OUT_TRIG0_1 output assigned to XBARB2_IN46 input.
kXBARB2_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN47 input.
kXBARB2_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN48 input.
kXBARB2_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN49 input.
kXBARB2_InputRESERVED50	XBARB2_IN50 input is reserved.
kXBARB2_InputRESERVED51	XBARB2_IN51 input is reserved.
kXBARB2_InputRESERVED52	XBARB2_IN52 input is reserved.
kXBARB2_InputRESERVED53	XBARB2_IN53 input is reserved.
kXBARB2_InputRESERVED54	XBARB2_IN54 input is reserved.
kXBARB2_InputRESERVED55	XBARB2_IN55 input is reserved.
kXBARB2_InputRESERVED56	XBARB2_IN56 input is reserved.
kXBARB2_InputRESERVED57	XBARB2_IN57 input is reserved.
kXBARB2_InputPit1Trigger0	PIT1_TRIGGER0 output assigned to XBARB2_IN58 input.
kXBARB2_InputPit1Trigger1	PIT1_TRIGGER1 output assigned to XBARB2_IN59 input.
kXBARB2_InputAdcEtc0Coco0	ADC_ETC0_COCO0 output assigned to XBARB2_IN60 input.
kXBARB2_InputAdcEtc0Coco1	ADC_ETC0_COCO1 output assigned to XBARB2_IN61 input.
kXBARB2_InputAdcEtc0Coco2	ADC_ETC0_COCO2 output assigned to XBARB2_IN62 input.
kXBARB2_InputAdcEtc0Coco3	ADC_ETC0_COCO3 output assigned to XBARB2_IN63 input.
kXBARB2_InputAdcEtc1Coco0	ADC_ETC1_COCO0 output assigned to XBARB2_IN64 input.
kXBARB2_InputAdcEtc1Coco1	ADC_ETC1_COCO1 output assigned to XBARB2_IN65 input.
kXBARB2_InputAdcEtc1Coco2	ADC_ETC1_COCO2 output assigned to XBARB2_IN66 input.
kXBARB2_InputAdcEtc1Coco3	ADC_ETC1_COCO3 output assigned to XBARB2_IN67 input.
kXBARB2_InputRESERVED68	XBARB2_IN68 input is reserved.
kXBARB2_InputRESERVED69	XBARB2_IN69 input is reserved.
kXBARB2_InputRESERVED70	XBARB2_IN70 input is reserved.
kXBARB2_InputRESERVED71	XBARB2_IN71 input is reserved.
kXBARB2_InputRESERVED72	XBARB2_IN72 input is reserved.
kXBARB2_InputRESERVED73	XBARB2_IN73 input is reserved.
kXBARB2_InputRESERVED74	XBARB2_IN74 input is reserved.
kXBARB2_InputRESERVED75	XBARB2_IN75 input is reserved.
kXBARB2_InputDec1PosMatch	DEC1_POS_MATCH output assigned to XBARB2_IN76 input.
kXBARB2_InputDec2PosMatch	DEC2_POS_MATCH output assigned to XBARB2_IN77 input.
kXBARB2_InputDec3PosMatch	DEC3_POS_MATCH output assigned to XBARB2_IN78 input.
kXBARB2_InputDec4PosMatch	DEC4_POS_MATCH output assigned to XBARB2_IN79 input.
kXBARB2_InputRESERVED80	XBARB2_IN80 input is reserved.
kXBARB2_InputRESERVED81	XBARB2_IN81 input is reserved.
kXBARB2_InputDmaDone0	DMA_DONE0 output assigned to XBARB2_IN82 input.
kXBARB2_InputDmaDone1	DMA_DONE1 output assigned to XBARB2_IN83 input.
kXBARB2_InputDmaDone2	DMA_DONE2 output assigned to XBARB2_IN84 input.
kXBARB2_InputDmaDone3	DMA_DONE3 output assigned to XBARB2_IN85 input.
kXBARB2_InputDmaDone4	DMA_DONE4 output assigned to XBARB2_IN86 input.
kXBARB2_InputDmaDone5	DMA_DONE5 output assigned to XBARB2_IN87 input.
kXBARB2_InputDmaDone6	DMA_DONE6 output assigned to XBARB2_IN88 input.
kXBARB2_InputDmaDone7	DMA_DONE7 output assigned to XBARB2_IN89 input.
kXBARB2_InputDmaLpsrDone0	DMA_LPSR_DONE0 output assigned to XBARB2_IN90 input.
kXBARB2_InputDmaLpsrDone1	DMA_LPSR_DONE1 output assigned to XBARB2_IN91 input.
kXBARB2_InputDmaLpsrDone2	DMA_LPSR_DONE2 output assigned to XBARB2_IN92 input.
kXBARB2_InputDmaLpsrDone3	DMA_LPSR_DONE3 output assigned to XBARB2_IN93 input.
kXBARB2_InputDmaLpsrDone4	DMA_LPSR_DONE4 output assigned to XBARB2_IN94 input.
kXBARB2_InputDmaLpsrDone5	DMA_LPSR_DONE5 output assigned to XBARB2_IN95 input.
kXBARB2_InputDmaLpsrDone6	DMA_LPSR_DONE6 output assigned to XBARB2_IN96 input.
kXBARB2_InputDmaLpsrDone7	DMA_LPSR_DONE7 output assigned to XBARB2_IN97 input.
kXBARB3_InputLogicLow	LOGIC_LOW output assigned to XBARB3_IN0 input.
kXBARB3_InputLogicHigh	LOGIC_HIGH output assigned to XBARB3_IN1 input.
kXBARB3_InputAcmp1Out	ACMP1_OUT output assigned to XBARB3_IN2 input.
kXBARB3_InputAcmp2Out	ACMP2_OUT output assigned to XBARB3_IN3 input.
kXBARB3_InputAcmp3Out	ACMP3_OUT output assigned to XBARB3_IN4 input.
kXBARB3_InputAcmp4Out	ACMP4_OUT output assigned to XBARB3_IN5 input.
kXBARB3_InputRESERVED6	XBARB3_IN6 input is reserved.
kXBARB3_InputRESERVED7	XBARB3_IN7 input is reserved.
kXBARB3_InputRESERVED8	XBARB3_IN8 input is reserved.
kXBARB3_InputRESERVED9	XBARB3_IN9 input is reserved.
kXBARB3_InputQtimer1Timer0	QTIMER1_TIMER0 output assigned to XBARB3_IN10 input.
kXBARB3_InputQtimer1Timer1	QTIMER1_TIMER1 output assigned to XBARB3_IN11 input.
kXBARB3_InputQtimer1Timer2	QTIMER1_TIMER2 output assigned to XBARB3_IN12 input.
kXBARB3_InputQtimer1Timer3	QTIMER1_TIMER3 output assigned to XBARB3_IN13 input.
kXBARB3_InputQtimer2Timer0	QTIMER2_TIMER0 output assigned to XBARB3_IN14 input.
kXBARB3_InputQtimer2Timer1	QTIMER2_TIMER1 output assigned to XBARB3_IN15 input.
kXBARB3_InputQtimer2Timer2	QTIMER2_TIMER2 output assigned to XBARB3_IN16 input.
kXBARB3_InputQtimer2Timer3	QTIMER2_TIMER3 output assigned to XBARB3_IN17 input.
kXBARB3_InputQtimer3Timer0	QTIMER3_TIMER0 output assigned to XBARB3_IN18 input.
kXBARB3_InputQtimer3Timer1	QTIMER3_TIMER1 output assigned to XBARB3_IN19 input.
kXBARB3_InputQtimer3Timer2	QTIMER3_TIMER2 output assigned to XBARB3_IN20 input.
kXBARB3_InputQtimer3Timer3	QTIMER3_TIMER3 output assigned to XBARB3_IN21 input.
kXBARB3_InputQtimer4Timer0	QTIMER4_TIMER0 output assigned to XBARB3_IN22 input.
kXBARB3_InputQtimer4Timer1	QTIMER4_TIMER1 output assigned to XBARB3_IN23 input.
kXBARB3_InputQtimer4Timer2	QTIMER4_TIMER2 output assigned to XBARB3_IN24 input.
kXBARB3_InputQtimer4Timer3	QTIMER4_TIMER3 output assigned to XBARB3_IN25 input.
kXBARB3_InputRESERVED26	XBARB3_IN26 input is reserved.
kXBARB3_InputRESERVED27	XBARB3_IN27 input is reserved.
kXBARB3_InputRESERVED28	XBARB3_IN28 input is reserved.
kXBARB3_InputRESERVED29	XBARB3_IN29 input is reserved.
kXBARB3_InputRESERVED30	XBARB3_IN30 input is reserved.
kXBARB3_InputRESERVED31	XBARB3_IN31 input is reserved.
kXBARB3_InputRESERVED32	XBARB3_IN32 input is reserved.
kXBARB3_InputRESERVED33	XBARB3_IN33 input is reserved.
kXBARB3_InputFlexpwm1Pwm0OutTrig01	FLEXPWM1_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN34 input.
kXBARB3_InputFlexpwm1Pwm1OutTrig01	FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN35 input.
kXBARB3_InputFlexpwm1Pwm2OutTrig01	FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN36 input.
kXBARB3_InputFlexpwm1Pwm3OutTrig01	FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN37 input.
kXBARB3_InputFlexpwm2Pwm0OutTrig01	FLEXPWM2_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN38 input.
kXBARB3_InputFlexpwm2Pwm1OutTrig01	FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN39 input.
kXBARB3_InputFlexpwm2Pwm2OutTrig01	FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN40 input.
kXBARB3_InputFlexpwm2Pwm3OutTrig01	FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN41 input.
kXBARB3_InputFlexpwm3Pwm0OutTrig01	FLEXPWM3_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN42 input.
kXBARB3_InputFlexpwm3Pwm1OutTrig01	FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN43 input.
kXBARB3_InputFlexpwm3Pwm2OutTrig01	FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN44 input.
kXBARB3_InputFlexpwm3Pwm3OutTrig01	FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN45 input.
kXBARB3_InputFlexpwm4Pwm0OutTrig01	FLEXPWM4_PWM0_OUT_TRIG0_1 output assigned to XBARB3_IN46 input.
kXBARB3_InputFlexpwm4Pwm1OutTrig01	FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN47 input.
kXBARB3_InputFlexpwm4Pwm2OutTrig01	FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN48 input.
kXBARB3_InputFlexpwm4Pwm3OutTrig01	FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN49 input.
kXBARB3_InputRESERVED50	XBARB3_IN50 input is reserved.
kXBARB3_InputRESERVED51	XBARB3_IN51 input is reserved.
kXBARB3_InputRESERVED52	XBARB3_IN52 input is reserved.
kXBARB3_InputRESERVED53	XBARB3_IN53 input is reserved.
kXBARB3_InputRESERVED54	XBARB3_IN54 input is reserved.
kXBARB3_InputRESERVED55	XBARB3_IN55 input is reserved.
kXBARB3_InputRESERVED56	XBARB3_IN56 input is reserved.
kXBARB3_InputRESERVED57	XBARB3_IN57 input is reserved.
kXBARB3_InputPit1Trigger0	PIT1_TRIGGER0 output assigned to XBARB3_IN58 input.
kXBARB3_InputPit1Trigger1	PIT1_TRIGGER1 output assigned to XBARB3_IN59 input.
kXBARB3_InputAdcEtc0Coco0	ADC_ETC0_COCO0 output assigned to XBARB3_IN60 input.
kXBARB3_InputAdcEtc0Coco1	ADC_ETC0_COCO1 output assigned to XBARB3_IN61 input.
kXBARB3_InputAdcEtc0Coco2	ADC_ETC0_COCO2 output assigned to XBARB3_IN62 input.
kXBARB3_InputAdcEtc0Coco3	ADC_ETC0_COCO3 output assigned to XBARB3_IN63 input.
kXBARB3_InputAdcEtc1Coco0	ADC_ETC1_COCO0 output assigned to XBARB3_IN64 input.
kXBARB3_InputAdcEtc1Coco1	ADC_ETC1_COCO1 output assigned to XBARB3_IN65 input.
kXBARB3_InputAdcEtc1Coco2	ADC_ETC1_COCO2 output assigned to XBARB3_IN66 input.
kXBARB3_InputAdcEtc1Coco3	ADC_ETC1_COCO3 output assigned to XBARB3_IN67 input.
kXBARB3_InputRESERVED68	XBARB3_IN68 input is reserved.
kXBARB3_InputRESERVED69	XBARB3_IN69 input is reserved.
kXBARB3_InputRESERVED70	XBARB3_IN70 input is reserved.
kXBARB3_InputRESERVED71	XBARB3_IN71 input is reserved.
kXBARB3_InputRESERVED72	XBARB3_IN72 input is reserved.
kXBARB3_InputRESERVED73	XBARB3_IN73 input is reserved.
kXBARB3_InputRESERVED74	XBARB3_IN74 input is reserved.
kXBARB3_InputRESERVED75	XBARB3_IN75 input is reserved.
kXBARB3_InputDec1PosMatch	DEC1_POS_MATCH output assigned to XBARB3_IN76 input.
kXBARB3_InputDec2PosMatch	DEC2_POS_MATCH output assigned to XBARB3_IN77 input.
kXBARB3_InputDec3PosMatch	DEC3_POS_MATCH output assigned to XBARB3_IN78 input.
kXBARB3_InputDec4PosMatch	DEC4_POS_MATCH output assigned to XBARB3_IN79 input.
kXBARB3_InputRESERVED80	XBARB3_IN80 input is reserved.
kXBARB3_InputRESERVED81	XBARB3_IN81 input is reserved.
kXBARB3_InputDmaDone0	DMA_DONE0 output assigned to XBARB3_IN82 input.
kXBARB3_InputDmaDone1	DMA_DONE1 output assigned to XBARB3_IN83 input.
kXBARB3_InputDmaDone2	DMA_DONE2 output assigned to XBARB3_IN84 input.
kXBARB3_InputDmaDone3	DMA_DONE3 output assigned to XBARB3_IN85 input.
kXBARB3_InputDmaDone4	DMA_DONE4 output assigned to XBARB3_IN86 input.
kXBARB3_InputDmaDone5	DMA_DONE5 output assigned to XBARB3_IN87 input.
kXBARB3_InputDmaDone6	DMA_DONE6 output assigned to XBARB3_IN88 input.
kXBARB3_InputDmaDone7	DMA_DONE7 output assigned to XBARB3_IN89 input.
kXBARB3_InputDmaLpsrDone0	DMA_LPSR_DONE0 output assigned to XBARB3_IN90 input.
kXBARB3_InputDmaLpsrDone1	DMA_LPSR_DONE1 output assigned to XBARB3_IN91 input.
kXBARB3_InputDmaLpsrDone2	DMA_LPSR_DONE2 output assigned to XBARB3_IN92 input.
kXBARB3_InputDmaLpsrDone3	DMA_LPSR_DONE3 output assigned to XBARB3_IN93 input.
kXBARB3_InputDmaLpsrDone4	DMA_LPSR_DONE4 output assigned to XBARB3_IN94 input.
kXBARB3_InputDmaLpsrDone5	DMA_LPSR_DONE5 output assigned to XBARB3_IN95 input.
kXBARB3_InputDmaLpsrDone6	DMA_LPSR_DONE6 output assigned to XBARB3_IN96 input.
kXBARB3_InputDmaLpsrDone7	DMA_LPSR_DONE7 output assigned to XBARB3_IN97 input.

_xbar_output_signal [1/2]

enum _xbar_output_signal

Enumerator
kXBARA1_OutputDmaChMuxReq30	XBARA1_OUT0 output assigned to DMA_CH_MUX_REQ30
kXBARA1_OutputDmaChMuxReq31	XBARA1_OUT1 output assigned to DMA_CH_MUX_REQ31
kXBARA1_OutputDmaChMuxReq94	XBARA1_OUT2 output assigned to DMA_CH_MUX_REQ94
kXBARA1_OutputDmaChMuxReq95	XBARA1_OUT3 output assigned to DMA_CH_MUX_REQ95
kXBARA1_OutputIomuxXbarInout04	XBARA1_OUT4 output assigned to IOMUX_XBAR_INOUT04
kXBARA1_OutputIomuxXbarInout05	XBARA1_OUT5 output assigned to IOMUX_XBAR_INOUT05
kXBARA1_OutputIomuxXbarInout06	XBARA1_OUT6 output assigned to IOMUX_XBAR_INOUT06
kXBARA1_OutputIomuxXbarInout07	XBARA1_OUT7 output assigned to IOMUX_XBAR_INOUT07
kXBARA1_OutputIomuxXbarInout08	XBARA1_OUT8 output assigned to IOMUX_XBAR_INOUT08
kXBARA1_OutputIomuxXbarInout09	XBARA1_OUT9 output assigned to IOMUX_XBAR_INOUT09
kXBARA1_OutputIomuxXbarInout10	XBARA1_OUT10 output assigned to IOMUX_XBAR_INOUT10
kXBARA1_OutputIomuxXbarInout11	XBARA1_OUT11 output assigned to IOMUX_XBAR_INOUT11
kXBARA1_OutputIomuxXbarInout12	XBARA1_OUT12 output assigned to IOMUX_XBAR_INOUT12
kXBARA1_OutputIomuxXbarInout13	XBARA1_OUT13 output assigned to IOMUX_XBAR_INOUT13
kXBARA1_OutputIomuxXbarInout14	XBARA1_OUT14 output assigned to IOMUX_XBAR_INOUT14
kXBARA1_OutputIomuxXbarInout15	XBARA1_OUT15 output assigned to IOMUX_XBAR_INOUT15
kXBARA1_OutputIomuxXbarInout16	XBARA1_OUT16 output assigned to IOMUX_XBAR_INOUT16
kXBARA1_OutputIomuxXbarInout17	XBARA1_OUT17 output assigned to IOMUX_XBAR_INOUT17
kXBARA1_OutputIomuxXbarInout18	XBARA1_OUT18 output assigned to IOMUX_XBAR_INOUT18
kXBARA1_OutputIomuxXbarInout19	XBARA1_OUT19 output assigned to IOMUX_XBAR_INOUT19
kXBARA1_OutputAcmp1Sample	XBARA1_OUT20 output assigned to ACMP1_SAMPLE
kXBARA1_OutputAcmp2Sample	XBARA1_OUT21 output assigned to ACMP2_SAMPLE
kXBARA1_OutputAcmp3Sample	XBARA1_OUT22 output assigned to ACMP3_SAMPLE
kXBARA1_OutputAcmp4Sample	XBARA1_OUT23 output assigned to ACMP4_SAMPLE
kXBARA1_OutputRESERVED24	XBARA1_OUT24 output is reserved.
kXBARA1_OutputRESERVED25	XBARA1_OUT25 output is reserved.
kXBARA1_OutputFlexpwm1Exta0	XBARA1_OUT26 output assigned to FLEXPWM1_EXTA0
kXBARA1_OutputFlexpwm1Exta1	XBARA1_OUT27 output assigned to FLEXPWM1_EXTA1
kXBARA1_OutputFlexpwm1Exta2	XBARA1_OUT28 output assigned to FLEXPWM1_EXTA2
kXBARA1_OutputFlexpwm1Exta3	XBARA1_OUT29 output assigned to FLEXPWM1_EXTA3
kXBARA1_OutputFlexpwm1ExtSync0	XBARA1_OUT30 output assigned to FLEXPWM1_EXT_SYNC0
kXBARA1_OutputFlexpwm1ExtSync1	XBARA1_OUT31 output assigned to FLEXPWM1_EXT_SYNC1
kXBARA1_OutputFlexpwm1ExtSync2	XBARA1_OUT32 output assigned to FLEXPWM1_EXT_SYNC2
kXBARA1_OutputFlexpwm1ExtSync3	XBARA1_OUT33 output assigned to FLEXPWM1_EXT_SYNC3
kXBARA1_OutputFlexpwm1ExtClk	XBARA1_OUT34 output assigned to FLEXPWM1_EXT_CLK
kXBARA1_OutputFlexpwm1Fault0	XBARA1_OUT35 output assigned to FLEXPWM1_FAULT0
kXBARA1_OutputFlexpwm1Fault1	XBARA1_OUT36 output assigned to FLEXPWM1_FAULT1
kXBARA1_OutputFlexpwm1234Fault2	XBARA1_OUT37 output assigned to FLEXPWM1_2_3_4_FAULT2
kXBARA1_OutputFlexpwm1234Fault3	XBARA1_OUT38 output assigned to FLEXPWM1_2_3_4_FAULT3
kXBARA1_OutputFlexpwm1ExtForce	XBARA1_OUT39 output assigned to FLEXPWM1_EXT_FORCE
kXBARA1_OutputFlexpwm234Exta0	XBARA1_OUT40 output assigned to FLEXPWM2_3_4_EXTA0
kXBARA1_OutputFlexpwm234Exta1	XBARA1_OUT41 output assigned to FLEXPWM2_3_4_EXTA1
kXBARA1_OutputFlexpwm234Exta2	XBARA1_OUT42 output assigned to FLEXPWM2_3_4_EXTA2
kXBARA1_OutputFlexpwm234Exta3	XBARA1_OUT43 output assigned to FLEXPWM2_3_4_EXTA3
kXBARA1_OutputFlexpwm2ExtSync0	XBARA1_OUT44 output assigned to FLEXPWM2_EXT_SYNC0
kXBARA1_OutputFlexpwm2ExtSync1	XBARA1_OUT45 output assigned to FLEXPWM2_EXT_SYNC1
kXBARA1_OutputFlexpwm2ExtSync2	XBARA1_OUT46 output assigned to FLEXPWM2_EXT_SYNC2
kXBARA1_OutputFlexpwm2ExtSync3	XBARA1_OUT47 output assigned to FLEXPWM2_EXT_SYNC3
kXBARA1_OutputFlexpwm234ExtClk	XBARA1_OUT48 output assigned to FLEXPWM2_3_4_EXT_CLK
kXBARA1_OutputFlexpwm2Fault0	XBARA1_OUT49 output assigned to FLEXPWM2_FAULT0
kXBARA1_OutputFlexpwm2Fault1	XBARA1_OUT50 output assigned to FLEXPWM2_FAULT1
kXBARA1_OutputFlexpwm2ExtForce	XBARA1_OUT51 output assigned to FLEXPWM2_EXT_FORCE
kXBARA1_OutputFlexpwm3ExtSync0	XBARA1_OUT52 output assigned to FLEXPWM3_EXT_SYNC0
kXBARA1_OutputFlexpwm3ExtSync1	XBARA1_OUT53 output assigned to FLEXPWM3_EXT_SYNC1
kXBARA1_OutputFlexpwm3ExtSync2	XBARA1_OUT54 output assigned to FLEXPWM3_EXT_SYNC2
kXBARA1_OutputFlexpwm3ExtSync3	XBARA1_OUT55 output assigned to FLEXPWM3_EXT_SYNC3
kXBARA1_OutputFlexpwm3Fault0	XBARA1_OUT56 output assigned to FLEXPWM3_FAULT0
kXBARA1_OutputFlexpwm3Fault1	XBARA1_OUT57 output assigned to FLEXPWM3_FAULT1
kXBARA1_OutputFlexpwm3ExtForce	XBARA1_OUT58 output assigned to FLEXPWM3_EXT_FORCE
kXBARA1_OutputFlexpwm4ExtSync0	XBARA1_OUT59 output assigned to FLEXPWM4_EXT_SYNC0
kXBARA1_OutputFlexpwm4ExtSync1	XBARA1_OUT60 output assigned to FLEXPWM4_EXT_SYNC1
kXBARA1_OutputFlexpwm4ExtSync2	XBARA1_OUT61 output assigned to FLEXPWM4_EXT_SYNC2
kXBARA1_OutputFlexpwm4ExtSync3	XBARA1_OUT62 output assigned to FLEXPWM4_EXT_SYNC3
kXBARA1_OutputFlexpwm4Fault0	XBARA1_OUT63 output assigned to FLEXPWM4_FAULT0
kXBARA1_OutputFlexpwm4Fault1	XBARA1_OUT64 output assigned to FLEXPWM4_FAULT1
kXBARA1_OutputFlexpwm4ExtForce	XBARA1_OUT65 output assigned to FLEXPWM4_EXT_FORCE
kXBARA1_OutputEnc1PhaseAInput	XBARA1_OUT66 output assigned to ENC1_PHASE_A_INPUT
kXBARA1_OutputEnc1PhaseBInput	XBARA1_OUT67 output assigned to ENC1_PHASE_B_INPUT
kXBARA1_OutputEnc1Index	XBARA1_OUT68 output assigned to ENC1_INDEX
kXBARA1_OutputEnc1Home	XBARA1_OUT69 output assigned to ENC1_HOME
kXBARA1_OutputEnc1Trigger	XBARA1_OUT70 output assigned to ENC1_TRIGGER
kXBARA1_OutputEnc2PhaseAInput	XBARA1_OUT71 output assigned to ENC2_PHASE_A_INPUT
kXBARA1_OutputEnc2PhaseBInput	XBARA1_OUT72 output assigned to ENC2_PHASE_B_INPUT
kXBARA1_OutputEnc2Index	XBARA1_OUT73 output assigned to ENC2_INDEX
kXBARA1_OutputEnc2Home	XBARA1_OUT74 output assigned to ENC2_HOME
kXBARA1_OutputEnc2Trigger	XBARA1_OUT75 output assigned to ENC2_TRIGGER
kXBARA1_OutputEnc3PhaseAInput	XBARA1_OUT76 output assigned to ENC3_PHASE_A_INPUT
kXBARA1_OutputEnc3PhaseBInput	XBARA1_OUT77 output assigned to ENC3_PHASE_B_INPUT
kXBARA1_OutputEnc3Index	XBARA1_OUT78 output assigned to ENC3_INDEX
kXBARA1_OutputEnc3Home	XBARA1_OUT79 output assigned to ENC3_HOME
kXBARA1_OutputEnc3Trigger	XBARA1_OUT80 output assigned to ENC3_TRIGGER
kXBARA1_OutputEnc4PhaseAInput	XBARA1_OUT81 output assigned to ENC4_PHASE_A_INPUT
kXBARA1_OutputEnc4PhaseBInput	XBARA1_OUT82 output assigned to ENC4_PHASE_B_INPUT
kXBARA1_OutputEnc4Index	XBARA1_OUT83 output assigned to ENC4_INDEX
kXBARA1_OutputEnc4Home	XBARA1_OUT84 output assigned to ENC4_HOME
kXBARA1_OutputEnc4Trigger	XBARA1_OUT85 output assigned to ENC4_TRIGGER
kXBARA1_OutputQtimer1Tmr0Input	XBARA1_OUT86 output assigned to QTIMER1_TMR0_INPUT
kXBARA1_OutputQtimer1Tmr1Input	XBARA1_OUT87 output assigned to QTIMER1_TMR1_INPUT
kXBARA1_OutputQtimer1Tmr2Input	XBARA1_OUT88 output assigned to QTIMER1_TMR2_INPUT
kXBARA1_OutputQtimer1Tmr3Input	XBARA1_OUT89 output assigned to QTIMER1_TMR3_INPUT
kXBARA1_OutputQtimer2Tmr0Input	XBARA1_OUT90 output assigned to QTIMER2_TMR0_INPUT
kXBARA1_OutputQtimer2Tmr1Input	XBARA1_OUT91 output assigned to QTIMER2_TMR1_INPUT
kXBARA1_OutputQtimer2Tmr2Input	XBARA1_OUT92 output assigned to QTIMER2_TMR2_INPUT
kXBARA1_OutputQtimer2Tmr3Input	XBARA1_OUT93 output assigned to QTIMER2_TMR3_INPUT
kXBARA1_OutputQtimer3Tmr0Input	XBARA1_OUT94 output assigned to QTIMER3_TMR0_INPUT
kXBARA1_OutputQtimer3Tmr1Input	XBARA1_OUT95 output assigned to QTIMER3_TMR1_INPUT
kXBARA1_OutputQtimer3Tmr2Input	XBARA1_OUT96 output assigned to QTIMER3_TMR2_INPUT
kXBARA1_OutputQtimer3Tmr3Input	XBARA1_OUT97 output assigned to QTIMER3_TMR3_INPUT
kXBARA1_OutputQtimer4Tmr0Input	XBARA1_OUT98 output assigned to QTIMER4_TMR0_INPUT
kXBARA1_OutputQtimer4Tmr1Input	XBARA1_OUT99 output assigned to QTIMER4_TMR1_INPUT
kXBARA1_OutputQtimer4Tmr2Input	XBARA1_OUT100 output assigned to QTIMER4_TMR2_INPUT
kXBARA1_OutputQtimer4Tmr3Input	XBARA1_OUT101 output assigned to QTIMER4_TMR3_INPUT
kXBARA1_OutputEwmEwmIn	XBARA1_OUT102 output assigned to EWM_EWM_IN
kXBARA1_OutputAdcEtcXbar0Trig0	XBARA1_OUT103 output assigned to ADC_ETC_XBAR0_TRIG0
kXBARA1_OutputAdcEtcXbar0Trig1	XBARA1_OUT104 output assigned to ADC_ETC_XBAR0_TRIG1
kXBARA1_OutputAdcEtcXbar0Trig2	XBARA1_OUT105 output assigned to ADC_ETC_XBAR0_TRIG2
kXBARA1_OutputAdcEtcXbar0Trig3	XBARA1_OUT106 output assigned to ADC_ETC_XBAR0_TRIG3
kXBARA1_OutputAdcEtcXbar1Trig0	XBARA1_OUT107 output assigned to ADC_ETC_XBAR1_TRIG0
kXBARA1_OutputAdcEtcXbar1Trig1	XBARA1_OUT108 output assigned to ADC_ETC_XBAR1_TRIG1
kXBARA1_OutputAdcEtcXbar1Trig2	XBARA1_OUT109 output assigned to ADC_ETC_XBAR1_TRIG2
kXBARA1_OutputAdcEtcXbar1Trig3	XBARA1_OUT110 output assigned to ADC_ETC_XBAR1_TRIG3
kXBARA1_OutputLpi2c1TrgInput	XBARA1_OUT111 output assigned to LPI2C1_TRG_INPUT
kXBARA1_OutputLpi2c2TrgInput	XBARA1_OUT112 output assigned to LPI2C2_TRG_INPUT
kXBARA1_OutputLpi2c3TrgInput	XBARA1_OUT113 output assigned to LPI2C3_TRG_INPUT
kXBARA1_OutputLpi2c4TrgInput	XBARA1_OUT114 output assigned to LPI2C4_TRG_INPUT
kXBARA1_OutputLpspi1TrgInput	XBARA1_OUT115 output assigned to LPSPI1_TRG_INPUT
kXBARA1_OutputLpspi2TrgInput	XBARA1_OUT116 output assigned to LPSPI2_TRG_INPUT
kXBARA1_OutputLpspi3TrgInput	XBARA1_OUT117 output assigned to LPSPI3_TRG_INPUT
kXBARA1_OutputLpspi4TrgInput	XBARA1_OUT118 output assigned to LPSPI4_TRG_INPUT
kXBARA1_OutputLpuart1TrgInput	XBARA1_OUT119 output assigned to LPUART1_TRG_INPUT
kXBARA1_OutputLpuart2TrgInput	XBARA1_OUT120 output assigned to LPUART2_TRG_INPUT
kXBARA1_OutputLpuart3TrgInput	XBARA1_OUT121 output assigned to LPUART3_TRG_INPUT
kXBARA1_OutputLpuart4TrgInput	XBARA1_OUT122 output assigned to LPUART4_TRG_INPUT
kXBARA1_OutputLpuart5TrgInput	XBARA1_OUT123 output assigned to LPUART5_TRG_INPUT
kXBARA1_OutputLpuart6TrgInput	XBARA1_OUT124 output assigned to LPUART6_TRG_INPUT
kXBARA1_OutputLpuart7TrgInput	XBARA1_OUT125 output assigned to LPUART7_TRG_INPUT
kXBARA1_OutputLpuart8TrgInput	XBARA1_OUT126 output assigned to LPUART8_TRG_INPUT
kXBARA1_OutputFlexio1TriggerIn0	XBARA1_OUT127 output assigned to FLEXIO1_TRIGGER_IN0
kXBARA1_OutputFlexio1TriggerIn1	XBARA1_OUT128 output assigned to FLEXIO1_TRIGGER_IN1
kXBARA1_OutputFlexio2TriggerIn0	XBARA1_OUT129 output assigned to FLEXIO2_TRIGGER_IN0
kXBARA1_OutputFlexio2TriggerIn1	XBARA1_OUT130 output assigned to FLEXIO2_TRIGGER_IN1
kXBARB2_OutputAoi1In00	XBARB2_OUT0 output assigned to AOI1_IN00
kXBARB2_OutputAoi1In01	XBARB2_OUT1 output assigned to AOI1_IN01
kXBARB2_OutputAoi1In02	XBARB2_OUT2 output assigned to AOI1_IN02
kXBARB2_OutputAoi1In03	XBARB2_OUT3 output assigned to AOI1_IN03
kXBARB2_OutputAoi1In04	XBARB2_OUT4 output assigned to AOI1_IN04
kXBARB2_OutputAoi1In05	XBARB2_OUT5 output assigned to AOI1_IN05
kXBARB2_OutputAoi1In06	XBARB2_OUT6 output assigned to AOI1_IN06
kXBARB2_OutputAoi1In07	XBARB2_OUT7 output assigned to AOI1_IN07
kXBARB2_OutputAoi1In08	XBARB2_OUT8 output assigned to AOI1_IN08
kXBARB2_OutputAoi1In09	XBARB2_OUT9 output assigned to AOI1_IN09
kXBARB2_OutputAoi1In10	XBARB2_OUT10 output assigned to AOI1_IN10
kXBARB2_OutputAoi1In11	XBARB2_OUT11 output assigned to AOI1_IN11
kXBARB2_OutputAoi1In12	XBARB2_OUT12 output assigned to AOI1_IN12
kXBARB2_OutputAoi1In13	XBARB2_OUT13 output assigned to AOI1_IN13
kXBARB2_OutputAoi1In14	XBARB2_OUT14 output assigned to AOI1_IN14
kXBARB2_OutputAoi1In15	XBARB2_OUT15 output assigned to AOI1_IN15
kXBARB3_OutputAoi2In00	XBARB3_OUT0 output assigned to AOI2_IN00
kXBARB3_OutputAoi2In01	XBARB3_OUT1 output assigned to AOI2_IN01
kXBARB3_OutputAoi2In02	XBARB3_OUT2 output assigned to AOI2_IN02
kXBARB3_OutputAoi2In03	XBARB3_OUT3 output assigned to AOI2_IN03
kXBARB3_OutputAoi2In04	XBARB3_OUT4 output assigned to AOI2_IN04
kXBARB3_OutputAoi2In05	XBARB3_OUT5 output assigned to AOI2_IN05
kXBARB3_OutputAoi2In06	XBARB3_OUT6 output assigned to AOI2_IN06
kXBARB3_OutputAoi2In07	XBARB3_OUT7 output assigned to AOI2_IN07
kXBARB3_OutputAoi2In08	XBARB3_OUT8 output assigned to AOI2_IN08
kXBARB3_OutputAoi2In09	XBARB3_OUT9 output assigned to AOI2_IN09
kXBARB3_OutputAoi2In10	XBARB3_OUT10 output assigned to AOI2_IN10
kXBARB3_OutputAoi2In11	XBARB3_OUT11 output assigned to AOI2_IN11
kXBARB3_OutputAoi2In12	XBARB3_OUT12 output assigned to AOI2_IN12
kXBARB3_OutputAoi2In13	XBARB3_OUT13 output assigned to AOI2_IN13
kXBARB3_OutputAoi2In14	XBARB3_OUT14 output assigned to AOI2_IN14
kXBARB3_OutputAoi2In15	XBARB3_OUT15 output assigned to AOI2_IN15
kXBARA1_OutputDmaChMuxReq81	XBARA1_OUT0 output assigned to DMA_CH_MUX_REQ81
kXBARA1_OutputDmaChMuxReq82	XBARA1_OUT1 output assigned to DMA_CH_MUX_REQ82
kXBARA1_OutputDmaChMuxReq83	XBARA1_OUT2 output assigned to DMA_CH_MUX_REQ83
kXBARA1_OutputDmaChMuxReq84	XBARA1_OUT3 output assigned to DMA_CH_MUX_REQ84
kXBARA1_OutputIomuxXbarInout04	XBARA1_OUT4 output assigned to IOMUX_XBAR_INOUT04
kXBARA1_OutputIomuxXbarInout05	XBARA1_OUT5 output assigned to IOMUX_XBAR_INOUT05
kXBARA1_OutputIomuxXbarInout06	XBARA1_OUT6 output assigned to IOMUX_XBAR_INOUT06
kXBARA1_OutputIomuxXbarInout07	XBARA1_OUT7 output assigned to IOMUX_XBAR_INOUT07
kXBARA1_OutputIomuxXbarInout08	XBARA1_OUT8 output assigned to IOMUX_XBAR_INOUT08
kXBARA1_OutputIomuxXbarInout09	XBARA1_OUT9 output assigned to IOMUX_XBAR_INOUT09
kXBARA1_OutputIomuxXbarInout10	XBARA1_OUT10 output assigned to IOMUX_XBAR_INOUT10
kXBARA1_OutputIomuxXbarInout11	XBARA1_OUT11 output assigned to IOMUX_XBAR_INOUT11
kXBARA1_OutputIomuxXbarInout12	XBARA1_OUT12 output assigned to IOMUX_XBAR_INOUT12
kXBARA1_OutputIomuxXbarInout13	XBARA1_OUT13 output assigned to IOMUX_XBAR_INOUT13
kXBARA1_OutputIomuxXbarInout14	XBARA1_OUT14 output assigned to IOMUX_XBAR_INOUT14
kXBARA1_OutputIomuxXbarInout15	XBARA1_OUT15 output assigned to IOMUX_XBAR_INOUT15
kXBARA1_OutputIomuxXbarInout16	XBARA1_OUT16 output assigned to IOMUX_XBAR_INOUT16
kXBARA1_OutputIomuxXbarInout17	XBARA1_OUT17 output assigned to IOMUX_XBAR_INOUT17
kXBARA1_OutputIomuxXbarInout18	XBARA1_OUT18 output assigned to IOMUX_XBAR_INOUT18
kXBARA1_OutputIomuxXbarInout19	XBARA1_OUT19 output assigned to IOMUX_XBAR_INOUT19
kXBARA1_OutputIomuxXbarInout20	XBARA1_OUT20 output assigned to IOMUX_XBAR_INOUT20
kXBARA1_OutputIomuxXbarInout21	XBARA1_OUT21 output assigned to IOMUX_XBAR_INOUT21
kXBARA1_OutputIomuxXbarInout22	XBARA1_OUT22 output assigned to IOMUX_XBAR_INOUT22
kXBARA1_OutputIomuxXbarInout23	XBARA1_OUT23 output assigned to IOMUX_XBAR_INOUT23
kXBARA1_OutputIomuxXbarInout24	XBARA1_OUT24 output assigned to IOMUX_XBAR_INOUT24
kXBARA1_OutputIomuxXbarInout25	XBARA1_OUT25 output assigned to IOMUX_XBAR_INOUT25
kXBARA1_OutputIomuxXbarInout26	XBARA1_OUT26 output assigned to IOMUX_XBAR_INOUT26
kXBARA1_OutputIomuxXbarInout27	XBARA1_OUT27 output assigned to IOMUX_XBAR_INOUT27
kXBARA1_OutputIomuxXbarInout28	XBARA1_OUT28 output assigned to IOMUX_XBAR_INOUT28
kXBARA1_OutputIomuxXbarInout29	XBARA1_OUT29 output assigned to IOMUX_XBAR_INOUT29
kXBARA1_OutputIomuxXbarInout30	XBARA1_OUT30 output assigned to IOMUX_XBAR_INOUT30
kXBARA1_OutputIomuxXbarInout31	XBARA1_OUT31 output assigned to IOMUX_XBAR_INOUT31
kXBARA1_OutputIomuxXbarInout32	XBARA1_OUT32 output assigned to IOMUX_XBAR_INOUT32
kXBARA1_OutputIomuxXbarInout33	XBARA1_OUT33 output assigned to IOMUX_XBAR_INOUT33
kXBARA1_OutputIomuxXbarInout34	XBARA1_OUT34 output assigned to IOMUX_XBAR_INOUT34
kXBARA1_OutputIomuxXbarInout35	XBARA1_OUT35 output assigned to IOMUX_XBAR_INOUT35
kXBARA1_OutputIomuxXbarInout36	XBARA1_OUT36 output assigned to IOMUX_XBAR_INOUT36
kXBARA1_OutputIomuxXbarInout37	XBARA1_OUT37 output assigned to IOMUX_XBAR_INOUT37
kXBARA1_OutputIomuxXbarInout38	XBARA1_OUT38 output assigned to IOMUX_XBAR_INOUT38
kXBARA1_OutputIomuxXbarInout39	XBARA1_OUT39 output assigned to IOMUX_XBAR_INOUT39
kXBARA1_OutputIomuxXbarInout40	XBARA1_OUT40 output assigned to IOMUX_XBAR_INOUT40
kXBARA1_OutputAcmp1Sample	XBARA1_OUT41 output assigned to ACMP1_SAMPLE
kXBARA1_OutputAcmp2Sample	XBARA1_OUT42 output assigned to ACMP2_SAMPLE
kXBARA1_OutputAcmp3Sample	XBARA1_OUT43 output assigned to ACMP3_SAMPLE
kXBARA1_OutputAcmp4Sample	XBARA1_OUT44 output assigned to ACMP4_SAMPLE
kXBARA1_OutputRESERVED45	XBARA1_OUT45 output is reserved.
kXBARA1_OutputRESERVED46	XBARA1_OUT46 output is reserved.
kXBARA1_OutputRESERVED47	XBARA1_OUT47 output is reserved.
kXBARA1_OutputRESERVED48	XBARA1_OUT48 output is reserved.
kXBARA1_OutputFlexpwm1Pwm0Exta	XBARA1_OUT49 output assigned to FLEXPWM1_PWM0_EXTA
kXBARA1_OutputFlexpwm1Pwm1Exta	XBARA1_OUT50 output assigned to FLEXPWM1_PWM1_EXTA
kXBARA1_OutputFlexpwm1Pwm2Exta	XBARA1_OUT51 output assigned to FLEXPWM1_PWM2_EXTA
kXBARA1_OutputFlexpwm1Pwm3Exta	XBARA1_OUT52 output assigned to FLEXPWM1_PWM3_EXTA
kXBARA1_OutputFlexpwm1Pwm0ExtSync	XBARA1_OUT53 output assigned to FLEXPWM1_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm1Pwm1ExtSync	XBARA1_OUT54 output assigned to FLEXPWM1_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm1Pwm2ExtSync	XBARA1_OUT55 output assigned to FLEXPWM1_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm1Pwm3ExtSync	XBARA1_OUT56 output assigned to FLEXPWM1_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm1ExtClk	XBARA1_OUT57 output assigned to FLEXPWM1_EXT_CLK
kXBARA1_OutputFlexpwm1Fault0	XBARA1_OUT58 output assigned to FLEXPWM1_FAULT0
kXBARA1_OutputFlexpwm1Fault1	XBARA1_OUT59 output assigned to FLEXPWM1_FAULT1
kXBARA1_OutputFlexpwm1234Fault2	XBARA1_OUT60 output assigned to FLEXPWM1_2_3_4_FAULT2
kXBARA1_OutputFlexpwm1234Fault3	XBARA1_OUT61 output assigned to FLEXPWM1_2_3_4_FAULT3
kXBARA1_OutputFlexpwm1ExtForce	XBARA1_OUT62 output assigned to FLEXPWM1_EXT_FORCE
kXBARA1_OutputFlexpwm2Pwm0Exta	XBARA1_OUT63 output assigned to FLEXPWM2_PWM0_EXTA
kXBARA1_OutputFlexpwm2Pwm1Exta	XBARA1_OUT64 output assigned to FLEXPWM2_PWM1_EXTA
kXBARA1_OutputFlexpwm2Pwm2Exta	XBARA1_OUT65 output assigned to FLEXPWM2_PWM2_EXTA
kXBARA1_OutputFlexpwm2Pwm3Exta	XBARA1_OUT66 output assigned to FLEXPWM2_PWM3_EXTA
kXBARA1_OutputFlexpwm2Pwm0ExtSync	XBARA1_OUT67 output assigned to FLEXPWM2_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm2Pwm1ExtSync	XBARA1_OUT68 output assigned to FLEXPWM2_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm2Pwm2ExtSync	XBARA1_OUT69 output assigned to FLEXPWM2_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm2Pwm3ExtSync	XBARA1_OUT70 output assigned to FLEXPWM2_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm2ExtClk	XBARA1_OUT71 output assigned to FLEXPWM2_EXT_CLK
kXBARA1_OutputFlexpwm2Fault0	XBARA1_OUT72 output assigned to FLEXPWM2_FAULT0
kXBARA1_OutputFlexpwm2Fault1	XBARA1_OUT73 output assigned to FLEXPWM2_FAULT1
kXBARA1_OutputFlexpwm2ExtForce	XBARA1_OUT74 output assigned to FLEXPWM2_EXT_FORCE
kXBARA1_OutputFlexpwm34Pwm0Exta	XBARA1_OUT75 output assigned to FLEXPWM3_4_PWM0_EXTA
kXBARA1_OutputFlexpwm34Pwm1Exta	XBARA1_OUT76 output assigned to FLEXPWM3_4_PWM1_EXTA
kXBARA1_OutputFlexpwm34Pwm2Exta	XBARA1_OUT77 output assigned to FLEXPWM3_4_PWM2_EXTA
kXBARA1_OutputFlexpwm34Pwm3Exta	XBARA1_OUT78 output assigned to FLEXPWM3_4_PWM3_EXTA
kXBARA1_OutputFlexpwm34ExtClk	XBARA1_OUT79 output assigned to FLEXPWM3_4_EXT_CLK
kXBARA1_OutputFlexpwm3Pwm0ExtSync	XBARA1_OUT80 output assigned to FLEXPWM3_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm3Pwm1ExtSync	XBARA1_OUT81 output assigned to FLEXPWM3_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm3Pwm2ExtSync	XBARA1_OUT82 output assigned to FLEXPWM3_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm3Pwm3ExtSync	XBARA1_OUT83 output assigned to FLEXPWM3_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm3Fault0	XBARA1_OUT84 output assigned to FLEXPWM3_FAULT0
kXBARA1_OutputFlexpwm3Fault1	XBARA1_OUT85 output assigned to FLEXPWM3_FAULT1
kXBARA1_OutputFlexpwm3ExtForce	XBARA1_OUT86 output assigned to FLEXPWM3_EXT_FORCE
kXBARA1_OutputFlexpwm4Pwm0ExtSync	XBARA1_OUT87 output assigned to FLEXPWM4_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm4Pwm1ExtSync	XBARA1_OUT88 output assigned to FLEXPWM4_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm4Pwm2ExtSync	XBARA1_OUT89 output assigned to FLEXPWM4_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm4Pwm3ExtSync	XBARA1_OUT90 output assigned to FLEXPWM4_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm4Fault0	XBARA1_OUT91 output assigned to FLEXPWM4_FAULT0
kXBARA1_OutputFlexpwm4Fault1	XBARA1_OUT92 output assigned to FLEXPWM4_FAULT1
kXBARA1_OutputFlexpwm4ExtForce	XBARA1_OUT93 output assigned to FLEXPWM4_EXT_FORCE
kXBARA1_OutputRESERVED94	XBARA1_OUT94 output is reserved.
kXBARA1_OutputRESERVED95	XBARA1_OUT95 output is reserved.
kXBARA1_OutputRESERVED96	XBARA1_OUT96 output is reserved.
kXBARA1_OutputRESERVED97	XBARA1_OUT97 output is reserved.
kXBARA1_OutputRESERVED98	XBARA1_OUT98 output is reserved.
kXBARA1_OutputRESERVED99	XBARA1_OUT99 output is reserved.
kXBARA1_OutputRESERVED100	XBARA1_OUT100 output is reserved.
kXBARA1_OutputRESERVED101	XBARA1_OUT101 output is reserved.
kXBARA1_OutputRESERVED102	XBARA1_OUT102 output is reserved.
kXBARA1_OutputRESERVED103	XBARA1_OUT103 output is reserved.
kXBARA1_OutputRESERVED104	XBARA1_OUT104 output is reserved.
kXBARA1_OutputRESERVED105	XBARA1_OUT105 output is reserved.
kXBARA1_OutputRESERVED106	XBARA1_OUT106 output is reserved.
kXBARA1_OutputRESERVED107	XBARA1_OUT107 output is reserved.
kXBARA1_OutputDec1Phasea	XBARA1_OUT108 output assigned to DEC1_PHASEA
kXBARA1_OutputDec1Phaseb	XBARA1_OUT109 output assigned to DEC1_PHASEB
kXBARA1_OutputDec1Index	XBARA1_OUT110 output assigned to DEC1_INDEX
kXBARA1_OutputDec1Home	XBARA1_OUT111 output assigned to DEC1_HOME
kXBARA1_OutputDec1Trigger	XBARA1_OUT112 output assigned to DEC1_TRIGGER
kXBARA1_OutputDec2Phasea	XBARA1_OUT113 output assigned to DEC2_PHASEA
kXBARA1_OutputDec2Phaseb	XBARA1_OUT114 output assigned to DEC2_PHASEB
kXBARA1_OutputDec2Index	XBARA1_OUT115 output assigned to DEC2_INDEX
kXBARA1_OutputDec2Home	XBARA1_OUT116 output assigned to DEC2_HOME
kXBARA1_OutputDec2Trigger	XBARA1_OUT117 output assigned to DEC2_TRIGGER
kXBARA1_OutputDec3Phasea	XBARA1_OUT118 output assigned to DEC3_PHASEA
kXBARA1_OutputDec3Phaseb	XBARA1_OUT119 output assigned to DEC3_PHASEB
kXBARA1_OutputDec3Index	XBARA1_OUT120 output assigned to DEC3_INDEX
kXBARA1_OutputDec3Home	XBARA1_OUT121 output assigned to DEC3_HOME
kXBARA1_OutputDec3Trigger	XBARA1_OUT122 output assigned to DEC3_TRIGGER
kXBARA1_OutputDec4Phasea	XBARA1_OUT123 output assigned to DEC4_PHASEA
kXBARA1_OutputDec4Phaseb	XBARA1_OUT124 output assigned to DEC4_PHASEB
kXBARA1_OutputDec4Index	XBARA1_OUT125 output assigned to DEC4_INDEX
kXBARA1_OutputDec4Home	XBARA1_OUT126 output assigned to DEC4_HOME
kXBARA1_OutputDec4Trigger	XBARA1_OUT127 output assigned to DEC4_TRIGGER
kXBARA1_OutputRESERVED128	XBARA1_OUT128 output is reserved.
kXBARA1_OutputRESERVED129	XBARA1_OUT129 output is reserved.
kXBARA1_OutputRESERVED130	XBARA1_OUT130 output is reserved.
kXBARA1_OutputRESERVED131	XBARA1_OUT131 output is reserved.
kXBARA1_OutputCan1	XBARA1_OUT132 output assigned to CAN1
kXBARA1_OutputCan2	XBARA1_OUT133 output assigned to CAN2
kXBARA1_OutputRESERVED134	XBARA1_OUT134 output is reserved.
kXBARA1_OutputRESERVED135	XBARA1_OUT135 output is reserved.
kXBARA1_OutputRESERVED136	XBARA1_OUT136 output is reserved.
kXBARA1_OutputRESERVED137	XBARA1_OUT137 output is reserved.
kXBARA1_OutputQtimer1Timer0	XBARA1_OUT138 output assigned to QTIMER1_TIMER0
kXBARA1_OutputQtimer1Timer1	XBARA1_OUT139 output assigned to QTIMER1_TIMER1
kXBARA1_OutputQtimer1Timer2	XBARA1_OUT140 output assigned to QTIMER1_TIMER2
kXBARA1_OutputQtimer1Timer3	XBARA1_OUT141 output assigned to QTIMER1_TIMER3
kXBARA1_OutputQtimer2Timer0	XBARA1_OUT142 output assigned to QTIMER2_TIMER0
kXBARA1_OutputQtimer2Timer1	XBARA1_OUT143 output assigned to QTIMER2_TIMER1
kXBARA1_OutputQtimer2Timer2	XBARA1_OUT144 output assigned to QTIMER2_TIMER2
kXBARA1_OutputQtimer2Timer3	XBARA1_OUT145 output assigned to QTIMER2_TIMER3
kXBARA1_OutputQtimer3Timer0	XBARA1_OUT146 output assigned to QTIMER3_TIMER0
kXBARA1_OutputQtimer3Timer1	XBARA1_OUT147 output assigned to QTIMER3_TIMER1
kXBARA1_OutputQtimer3Timer2	XBARA1_OUT148 output assigned to QTIMER3_TIMER2
kXBARA1_OutputQtimer3Timer3	XBARA1_OUT149 output assigned to QTIMER3_TIMER3
kXBARA1_OutputQtimer4Timer0	XBARA1_OUT150 output assigned to QTIMER4_TIMER0
kXBARA1_OutputQtimer4Timer1	XBARA1_OUT151 output assigned to QTIMER4_TIMER1
kXBARA1_OutputQtimer4Timer2	XBARA1_OUT152 output assigned to QTIMER4_TIMER2
kXBARA1_OutputQtimer4Timer3	XBARA1_OUT153 output assigned to QTIMER4_TIMER3
kXBARA1_OutputEwmEwmIn	XBARA1_OUT154 output assigned to EWM_EWM_IN
kXBARA1_OutputAdcEtc0Coco0	XBARA1_OUT155 output assigned to ADC_ETC0_COCO0
kXBARA1_OutputAdcEtc0Coco1	XBARA1_OUT156 output assigned to ADC_ETC0_COCO1
kXBARA1_OutputAdcEtc0Coco2	XBARA1_OUT157 output assigned to ADC_ETC0_COCO2
kXBARA1_OutputAdcEtc0Coco3	XBARA1_OUT158 output assigned to ADC_ETC0_COCO3
kXBARA1_OutputAdcEtc1Coco0	XBARA1_OUT159 output assigned to ADC_ETC1_COCO0
kXBARA1_OutputAdcEtc1Coco1	XBARA1_OUT160 output assigned to ADC_ETC1_COCO1
kXBARA1_OutputAdcEtc1Coco2	XBARA1_OUT161 output assigned to ADC_ETC1_COCO2
kXBARA1_OutputAdcEtc1Coco3	XBARA1_OUT162 output assigned to ADC_ETC1_COCO3
kXBARA1_OutputRESERVED163	XBARA1_OUT163 output is reserved.
kXBARA1_OutputRESERVED164	XBARA1_OUT164 output is reserved.
kXBARA1_OutputRESERVED165	XBARA1_OUT165 output is reserved.
kXBARA1_OutputRESERVED166	XBARA1_OUT166 output is reserved.
kXBARA1_OutputRESERVED167	XBARA1_OUT167 output is reserved.
kXBARA1_OutputRESERVED168	XBARA1_OUT168 output is reserved.
kXBARA1_OutputRESERVED169	XBARA1_OUT169 output is reserved.
kXBARA1_OutputRESERVED170	XBARA1_OUT170 output is reserved.
kXBARA1_OutputFlexio1TrigIn0	XBARA1_OUT171 output assigned to FLEXIO1_TRIG_IN0
kXBARA1_OutputFlexio1TrigIn1	XBARA1_OUT172 output assigned to FLEXIO1_TRIG_IN1
kXBARA1_OutputFlexio2TrigIn0	XBARA1_OUT173 output assigned to FLEXIO2_TRIG_IN0
kXBARA1_OutputFlexio2TrigIn1	XBARA1_OUT174 output assigned to FLEXIO2_TRIG_IN1
kXBARB2_OutputAoi1In00	XBARB2_OUT0 output assigned to AOI1_IN00
kXBARB2_OutputAoi1In01	XBARB2_OUT1 output assigned to AOI1_IN01
kXBARB2_OutputAoi1In02	XBARB2_OUT2 output assigned to AOI1_IN02
kXBARB2_OutputAoi1In03	XBARB2_OUT3 output assigned to AOI1_IN03
kXBARB2_OutputAoi1In04	XBARB2_OUT4 output assigned to AOI1_IN04
kXBARB2_OutputAoi1In05	XBARB2_OUT5 output assigned to AOI1_IN05
kXBARB2_OutputAoi1In06	XBARB2_OUT6 output assigned to AOI1_IN06
kXBARB2_OutputAoi1In07	XBARB2_OUT7 output assigned to AOI1_IN07
kXBARB2_OutputAoi1In08	XBARB2_OUT8 output assigned to AOI1_IN08
kXBARB2_OutputAoi1In09	XBARB2_OUT9 output assigned to AOI1_IN09
kXBARB2_OutputAoi1In10	XBARB2_OUT10 output assigned to AOI1_IN10
kXBARB2_OutputAoi1In11	XBARB2_OUT11 output assigned to AOI1_IN11
kXBARB2_OutputAoi1In12	XBARB2_OUT12 output assigned to AOI1_IN12
kXBARB2_OutputAoi1In13	XBARB2_OUT13 output assigned to AOI1_IN13
kXBARB2_OutputAoi1In14	XBARB2_OUT14 output assigned to AOI1_IN14
kXBARB2_OutputAoi1In15	XBARB2_OUT15 output assigned to AOI1_IN15
kXBARB3_OutputAoi2In00	XBARB3_OUT0 output assigned to AOI2_IN00
kXBARB3_OutputAoi2In01	XBARB3_OUT1 output assigned to AOI2_IN01
kXBARB3_OutputAoi2In02	XBARB3_OUT2 output assigned to AOI2_IN02
kXBARB3_OutputAoi2In03	XBARB3_OUT3 output assigned to AOI2_IN03
kXBARB3_OutputAoi2In04	XBARB3_OUT4 output assigned to AOI2_IN04
kXBARB3_OutputAoi2In05	XBARB3_OUT5 output assigned to AOI2_IN05
kXBARB3_OutputAoi2In06	XBARB3_OUT6 output assigned to AOI2_IN06
kXBARB3_OutputAoi2In07	XBARB3_OUT7 output assigned to AOI2_IN07
kXBARB3_OutputAoi2In08	XBARB3_OUT8 output assigned to AOI2_IN08
kXBARB3_OutputAoi2In09	XBARB3_OUT9 output assigned to AOI2_IN09
kXBARB3_OutputAoi2In10	XBARB3_OUT10 output assigned to AOI2_IN10
kXBARB3_OutputAoi2In11	XBARB3_OUT11 output assigned to AOI2_IN11
kXBARB3_OutputAoi2In12	XBARB3_OUT12 output assigned to AOI2_IN12
kXBARB3_OutputAoi2In13	XBARB3_OUT13 output assigned to AOI2_IN13
kXBARB3_OutputAoi2In14	XBARB3_OUT14 output assigned to AOI2_IN14
kXBARB3_OutputAoi2In15	XBARB3_OUT15 output assigned to AOI2_IN15
kXBARA1_OutputDmaChMuxReq81	XBARA1_OUT0 output assigned to DMA_CH_MUX_REQ81
kXBARA1_OutputDmaChMuxReq82	XBARA1_OUT1 output assigned to DMA_CH_MUX_REQ82
kXBARA1_OutputDmaChMuxReq83	XBARA1_OUT2 output assigned to DMA_CH_MUX_REQ83
kXBARA1_OutputDmaChMuxReq84	XBARA1_OUT3 output assigned to DMA_CH_MUX_REQ84
kXBARA1_OutputIomuxXbarInout04	XBARA1_OUT4 output assigned to IOMUX_XBAR_INOUT04
kXBARA1_OutputIomuxXbarInout05	XBARA1_OUT5 output assigned to IOMUX_XBAR_INOUT05
kXBARA1_OutputIomuxXbarInout06	XBARA1_OUT6 output assigned to IOMUX_XBAR_INOUT06
kXBARA1_OutputIomuxXbarInout07	XBARA1_OUT7 output assigned to IOMUX_XBAR_INOUT07
kXBARA1_OutputIomuxXbarInout08	XBARA1_OUT8 output assigned to IOMUX_XBAR_INOUT08
kXBARA1_OutputIomuxXbarInout09	XBARA1_OUT9 output assigned to IOMUX_XBAR_INOUT09
kXBARA1_OutputIomuxXbarInout10	XBARA1_OUT10 output assigned to IOMUX_XBAR_INOUT10
kXBARA1_OutputIomuxXbarInout11	XBARA1_OUT11 output assigned to IOMUX_XBAR_INOUT11
kXBARA1_OutputIomuxXbarInout12	XBARA1_OUT12 output assigned to IOMUX_XBAR_INOUT12
kXBARA1_OutputIomuxXbarInout13	XBARA1_OUT13 output assigned to IOMUX_XBAR_INOUT13
kXBARA1_OutputIomuxXbarInout14	XBARA1_OUT14 output assigned to IOMUX_XBAR_INOUT14
kXBARA1_OutputIomuxXbarInout15	XBARA1_OUT15 output assigned to IOMUX_XBAR_INOUT15
kXBARA1_OutputIomuxXbarInout16	XBARA1_OUT16 output assigned to IOMUX_XBAR_INOUT16
kXBARA1_OutputIomuxXbarInout17	XBARA1_OUT17 output assigned to IOMUX_XBAR_INOUT17
kXBARA1_OutputIomuxXbarInout18	XBARA1_OUT18 output assigned to IOMUX_XBAR_INOUT18
kXBARA1_OutputIomuxXbarInout19	XBARA1_OUT19 output assigned to IOMUX_XBAR_INOUT19
kXBARA1_OutputIomuxXbarInout20	XBARA1_OUT20 output assigned to IOMUX_XBAR_INOUT20
kXBARA1_OutputIomuxXbarInout21	XBARA1_OUT21 output assigned to IOMUX_XBAR_INOUT21
kXBARA1_OutputIomuxXbarInout22	XBARA1_OUT22 output assigned to IOMUX_XBAR_INOUT22
kXBARA1_OutputIomuxXbarInout23	XBARA1_OUT23 output assigned to IOMUX_XBAR_INOUT23
kXBARA1_OutputIomuxXbarInout24	XBARA1_OUT24 output assigned to IOMUX_XBAR_INOUT24
kXBARA1_OutputIomuxXbarInout25	XBARA1_OUT25 output assigned to IOMUX_XBAR_INOUT25
kXBARA1_OutputIomuxXbarInout26	XBARA1_OUT26 output assigned to IOMUX_XBAR_INOUT26
kXBARA1_OutputIomuxXbarInout27	XBARA1_OUT27 output assigned to IOMUX_XBAR_INOUT27
kXBARA1_OutputIomuxXbarInout28	XBARA1_OUT28 output assigned to IOMUX_XBAR_INOUT28
kXBARA1_OutputIomuxXbarInout29	XBARA1_OUT29 output assigned to IOMUX_XBAR_INOUT29
kXBARA1_OutputIomuxXbarInout30	XBARA1_OUT30 output assigned to IOMUX_XBAR_INOUT30
kXBARA1_OutputIomuxXbarInout31	XBARA1_OUT31 output assigned to IOMUX_XBAR_INOUT31
kXBARA1_OutputIomuxXbarInout32	XBARA1_OUT32 output assigned to IOMUX_XBAR_INOUT32
kXBARA1_OutputIomuxXbarInout33	XBARA1_OUT33 output assigned to IOMUX_XBAR_INOUT33
kXBARA1_OutputIomuxXbarInout34	XBARA1_OUT34 output assigned to IOMUX_XBAR_INOUT34
kXBARA1_OutputIomuxXbarInout35	XBARA1_OUT35 output assigned to IOMUX_XBAR_INOUT35
kXBARA1_OutputIomuxXbarInout36	XBARA1_OUT36 output assigned to IOMUX_XBAR_INOUT36
kXBARA1_OutputIomuxXbarInout37	XBARA1_OUT37 output assigned to IOMUX_XBAR_INOUT37
kXBARA1_OutputIomuxXbarInout38	XBARA1_OUT38 output assigned to IOMUX_XBAR_INOUT38
kXBARA1_OutputIomuxXbarInout39	XBARA1_OUT39 output assigned to IOMUX_XBAR_INOUT39
kXBARA1_OutputIomuxXbarInout40	XBARA1_OUT40 output assigned to IOMUX_XBAR_INOUT40
kXBARA1_OutputAcmp1Sample	XBARA1_OUT41 output assigned to ACMP1_SAMPLE
kXBARA1_OutputAcmp2Sample	XBARA1_OUT42 output assigned to ACMP2_SAMPLE
kXBARA1_OutputAcmp3Sample	XBARA1_OUT43 output assigned to ACMP3_SAMPLE
kXBARA1_OutputAcmp4Sample	XBARA1_OUT44 output assigned to ACMP4_SAMPLE
kXBARA1_OutputRESERVED45	XBARA1_OUT45 output is reserved.
kXBARA1_OutputRESERVED46	XBARA1_OUT46 output is reserved.
kXBARA1_OutputRESERVED47	XBARA1_OUT47 output is reserved.
kXBARA1_OutputRESERVED48	XBARA1_OUT48 output is reserved.
kXBARA1_OutputFlexpwm1Pwm0Exta	XBARA1_OUT49 output assigned to FLEXPWM1_PWM0_EXTA
kXBARA1_OutputFlexpwm1Pwm1Exta	XBARA1_OUT50 output assigned to FLEXPWM1_PWM1_EXTA
kXBARA1_OutputFlexpwm1Pwm2Exta	XBARA1_OUT51 output assigned to FLEXPWM1_PWM2_EXTA
kXBARA1_OutputFlexpwm1Pwm3Exta	XBARA1_OUT52 output assigned to FLEXPWM1_PWM3_EXTA
kXBARA1_OutputFlexpwm1Pwm0ExtSync	XBARA1_OUT53 output assigned to FLEXPWM1_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm1Pwm1ExtSync	XBARA1_OUT54 output assigned to FLEXPWM1_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm1Pwm2ExtSync	XBARA1_OUT55 output assigned to FLEXPWM1_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm1Pwm3ExtSync	XBARA1_OUT56 output assigned to FLEXPWM1_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm1ExtClk	XBARA1_OUT57 output assigned to FLEXPWM1_EXT_CLK
kXBARA1_OutputFlexpwm1Fault0	XBARA1_OUT58 output assigned to FLEXPWM1_FAULT0
kXBARA1_OutputFlexpwm1Fault1	XBARA1_OUT59 output assigned to FLEXPWM1_FAULT1
kXBARA1_OutputFlexpwm1234Fault2	XBARA1_OUT60 output assigned to FLEXPWM1_2_3_4_FAULT2
kXBARA1_OutputFlexpwm1234Fault3	XBARA1_OUT61 output assigned to FLEXPWM1_2_3_4_FAULT3
kXBARA1_OutputFlexpwm1ExtForce	XBARA1_OUT62 output assigned to FLEXPWM1_EXT_FORCE
kXBARA1_OutputFlexpwm2Pwm0Exta	XBARA1_OUT63 output assigned to FLEXPWM2_PWM0_EXTA
kXBARA1_OutputFlexpwm2Pwm1Exta	XBARA1_OUT64 output assigned to FLEXPWM2_PWM1_EXTA
kXBARA1_OutputFlexpwm2Pwm2Exta	XBARA1_OUT65 output assigned to FLEXPWM2_PWM2_EXTA
kXBARA1_OutputFlexpwm2Pwm3Exta	XBARA1_OUT66 output assigned to FLEXPWM2_PWM3_EXTA
kXBARA1_OutputFlexpwm2Pwm0ExtSync	XBARA1_OUT67 output assigned to FLEXPWM2_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm2Pwm1ExtSync	XBARA1_OUT68 output assigned to FLEXPWM2_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm2Pwm2ExtSync	XBARA1_OUT69 output assigned to FLEXPWM2_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm2Pwm3ExtSync	XBARA1_OUT70 output assigned to FLEXPWM2_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm2ExtClk	XBARA1_OUT71 output assigned to FLEXPWM2_EXT_CLK
kXBARA1_OutputFlexpwm2Fault0	XBARA1_OUT72 output assigned to FLEXPWM2_FAULT0
kXBARA1_OutputFlexpwm2Fault1	XBARA1_OUT73 output assigned to FLEXPWM2_FAULT1
kXBARA1_OutputFlexpwm2ExtForce	XBARA1_OUT74 output assigned to FLEXPWM2_EXT_FORCE
kXBARA1_OutputFlexpwm34Pwm0Exta	XBARA1_OUT75 output assigned to FLEXPWM3_4_PWM0_EXTA
kXBARA1_OutputFlexpwm34Pwm1Exta	XBARA1_OUT76 output assigned to FLEXPWM3_4_PWM1_EXTA
kXBARA1_OutputFlexpwm34Pwm2Exta	XBARA1_OUT77 output assigned to FLEXPWM3_4_PWM2_EXTA
kXBARA1_OutputFlexpwm34Pwm3Exta	XBARA1_OUT78 output assigned to FLEXPWM3_4_PWM3_EXTA
kXBARA1_OutputFlexpwm34ExtClk	XBARA1_OUT79 output assigned to FLEXPWM3_4_EXT_CLK
kXBARA1_OutputFlexpwm3Pwm0ExtSync	XBARA1_OUT80 output assigned to FLEXPWM3_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm3Pwm1ExtSync	XBARA1_OUT81 output assigned to FLEXPWM3_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm3Pwm2ExtSync	XBARA1_OUT82 output assigned to FLEXPWM3_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm3Pwm3ExtSync	XBARA1_OUT83 output assigned to FLEXPWM3_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm3Fault0	XBARA1_OUT84 output assigned to FLEXPWM3_FAULT0
kXBARA1_OutputFlexpwm3Fault1	XBARA1_OUT85 output assigned to FLEXPWM3_FAULT1
kXBARA1_OutputFlexpwm3ExtForce	XBARA1_OUT86 output assigned to FLEXPWM3_EXT_FORCE
kXBARA1_OutputFlexpwm4Pwm0ExtSync	XBARA1_OUT87 output assigned to FLEXPWM4_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm4Pwm1ExtSync	XBARA1_OUT88 output assigned to FLEXPWM4_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm4Pwm2ExtSync	XBARA1_OUT89 output assigned to FLEXPWM4_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm4Pwm3ExtSync	XBARA1_OUT90 output assigned to FLEXPWM4_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm4Fault0	XBARA1_OUT91 output assigned to FLEXPWM4_FAULT0
kXBARA1_OutputFlexpwm4Fault1	XBARA1_OUT92 output assigned to FLEXPWM4_FAULT1
kXBARA1_OutputFlexpwm4ExtForce	XBARA1_OUT93 output assigned to FLEXPWM4_EXT_FORCE
kXBARA1_OutputRESERVED94	XBARA1_OUT94 output is reserved.
kXBARA1_OutputRESERVED95	XBARA1_OUT95 output is reserved.
kXBARA1_OutputRESERVED96	XBARA1_OUT96 output is reserved.
kXBARA1_OutputRESERVED97	XBARA1_OUT97 output is reserved.
kXBARA1_OutputRESERVED98	XBARA1_OUT98 output is reserved.
kXBARA1_OutputRESERVED99	XBARA1_OUT99 output is reserved.
kXBARA1_OutputRESERVED100	XBARA1_OUT100 output is reserved.
kXBARA1_OutputRESERVED101	XBARA1_OUT101 output is reserved.
kXBARA1_OutputRESERVED102	XBARA1_OUT102 output is reserved.
kXBARA1_OutputRESERVED103	XBARA1_OUT103 output is reserved.
kXBARA1_OutputRESERVED104	XBARA1_OUT104 output is reserved.
kXBARA1_OutputRESERVED105	XBARA1_OUT105 output is reserved.
kXBARA1_OutputRESERVED106	XBARA1_OUT106 output is reserved.
kXBARA1_OutputRESERVED107	XBARA1_OUT107 output is reserved.
kXBARA1_OutputDec1Phasea	XBARA1_OUT108 output assigned to DEC1_PHASEA
kXBARA1_OutputDec1Phaseb	XBARA1_OUT109 output assigned to DEC1_PHASEB
kXBARA1_OutputDec1Index	XBARA1_OUT110 output assigned to DEC1_INDEX
kXBARA1_OutputDec1Home	XBARA1_OUT111 output assigned to DEC1_HOME
kXBARA1_OutputDec1Trigger	XBARA1_OUT112 output assigned to DEC1_TRIGGER
kXBARA1_OutputDec2Phasea	XBARA1_OUT113 output assigned to DEC2_PHASEA
kXBARA1_OutputDec2Phaseb	XBARA1_OUT114 output assigned to DEC2_PHASEB
kXBARA1_OutputDec2Index	XBARA1_OUT115 output assigned to DEC2_INDEX
kXBARA1_OutputDec2Home	XBARA1_OUT116 output assigned to DEC2_HOME
kXBARA1_OutputDec2Trigger	XBARA1_OUT117 output assigned to DEC2_TRIGGER
kXBARA1_OutputDec3Phasea	XBARA1_OUT118 output assigned to DEC3_PHASEA
kXBARA1_OutputDec3Phaseb	XBARA1_OUT119 output assigned to DEC3_PHASEB
kXBARA1_OutputDec3Index	XBARA1_OUT120 output assigned to DEC3_INDEX
kXBARA1_OutputDec3Home	XBARA1_OUT121 output assigned to DEC3_HOME
kXBARA1_OutputDec3Trigger	XBARA1_OUT122 output assigned to DEC3_TRIGGER
kXBARA1_OutputDec4Phasea	XBARA1_OUT123 output assigned to DEC4_PHASEA
kXBARA1_OutputDec4Phaseb	XBARA1_OUT124 output assigned to DEC4_PHASEB
kXBARA1_OutputDec4Index	XBARA1_OUT125 output assigned to DEC4_INDEX
kXBARA1_OutputDec4Home	XBARA1_OUT126 output assigned to DEC4_HOME
kXBARA1_OutputDec4Trigger	XBARA1_OUT127 output assigned to DEC4_TRIGGER
kXBARA1_OutputRESERVED128	XBARA1_OUT128 output is reserved.
kXBARA1_OutputRESERVED129	XBARA1_OUT129 output is reserved.
kXBARA1_OutputRESERVED130	XBARA1_OUT130 output is reserved.
kXBARA1_OutputRESERVED131	XBARA1_OUT131 output is reserved.
kXBARA1_OutputCan1	XBARA1_OUT132 output assigned to CAN1
kXBARA1_OutputCan2	XBARA1_OUT133 output assigned to CAN2
kXBARA1_OutputRESERVED134	XBARA1_OUT134 output is reserved.
kXBARA1_OutputRESERVED135	XBARA1_OUT135 output is reserved.
kXBARA1_OutputRESERVED136	XBARA1_OUT136 output is reserved.
kXBARA1_OutputRESERVED137	XBARA1_OUT137 output is reserved.
kXBARA1_OutputQtimer1Timer0	XBARA1_OUT138 output assigned to QTIMER1_TIMER0
kXBARA1_OutputQtimer1Timer1	XBARA1_OUT139 output assigned to QTIMER1_TIMER1
kXBARA1_OutputQtimer1Timer2	XBARA1_OUT140 output assigned to QTIMER1_TIMER2
kXBARA1_OutputQtimer1Timer3	XBARA1_OUT141 output assigned to QTIMER1_TIMER3
kXBARA1_OutputQtimer2Timer0	XBARA1_OUT142 output assigned to QTIMER2_TIMER0
kXBARA1_OutputQtimer2Timer1	XBARA1_OUT143 output assigned to QTIMER2_TIMER1
kXBARA1_OutputQtimer2Timer2	XBARA1_OUT144 output assigned to QTIMER2_TIMER2
kXBARA1_OutputQtimer2Timer3	XBARA1_OUT145 output assigned to QTIMER2_TIMER3
kXBARA1_OutputQtimer3Timer0	XBARA1_OUT146 output assigned to QTIMER3_TIMER0
kXBARA1_OutputQtimer3Timer1	XBARA1_OUT147 output assigned to QTIMER3_TIMER1
kXBARA1_OutputQtimer3Timer2	XBARA1_OUT148 output assigned to QTIMER3_TIMER2
kXBARA1_OutputQtimer3Timer3	XBARA1_OUT149 output assigned to QTIMER3_TIMER3
kXBARA1_OutputQtimer4Timer0	XBARA1_OUT150 output assigned to QTIMER4_TIMER0
kXBARA1_OutputQtimer4Timer1	XBARA1_OUT151 output assigned to QTIMER4_TIMER1
kXBARA1_OutputQtimer4Timer2	XBARA1_OUT152 output assigned to QTIMER4_TIMER2
kXBARA1_OutputQtimer4Timer3	XBARA1_OUT153 output assigned to QTIMER4_TIMER3
kXBARA1_OutputEwmEwmIn	XBARA1_OUT154 output assigned to EWM_EWM_IN
kXBARA1_OutputAdcEtc0Coco0	XBARA1_OUT155 output assigned to ADC_ETC0_COCO0
kXBARA1_OutputAdcEtc0Coco1	XBARA1_OUT156 output assigned to ADC_ETC0_COCO1
kXBARA1_OutputAdcEtc0Coco2	XBARA1_OUT157 output assigned to ADC_ETC0_COCO2
kXBARA1_OutputAdcEtc0Coco3	XBARA1_OUT158 output assigned to ADC_ETC0_COCO3
kXBARA1_OutputAdcEtc1Coco0	XBARA1_OUT159 output assigned to ADC_ETC1_COCO0
kXBARA1_OutputAdcEtc1Coco1	XBARA1_OUT160 output assigned to ADC_ETC1_COCO1
kXBARA1_OutputAdcEtc1Coco2	XBARA1_OUT161 output assigned to ADC_ETC1_COCO2
kXBARA1_OutputAdcEtc1Coco3	XBARA1_OUT162 output assigned to ADC_ETC1_COCO3
kXBARA1_OutputRESERVED163	XBARA1_OUT163 output is reserved.
kXBARA1_OutputRESERVED164	XBARA1_OUT164 output is reserved.
kXBARA1_OutputRESERVED165	XBARA1_OUT165 output is reserved.
kXBARA1_OutputRESERVED166	XBARA1_OUT166 output is reserved.
kXBARA1_OutputRESERVED167	XBARA1_OUT167 output is reserved.
kXBARA1_OutputRESERVED168	XBARA1_OUT168 output is reserved.
kXBARA1_OutputRESERVED169	XBARA1_OUT169 output is reserved.
kXBARA1_OutputRESERVED170	XBARA1_OUT170 output is reserved.
kXBARA1_OutputFlexio1TrigIn0	XBARA1_OUT171 output assigned to FLEXIO1_TRIG_IN0
kXBARA1_OutputFlexio1TrigIn1	XBARA1_OUT172 output assigned to FLEXIO1_TRIG_IN1
kXBARA1_OutputFlexio2TrigIn0	XBARA1_OUT173 output assigned to FLEXIO2_TRIG_IN0
kXBARA1_OutputFlexio2TrigIn1	XBARA1_OUT174 output assigned to FLEXIO2_TRIG_IN1
kXBARB2_OutputAoi1In00	XBARB2_OUT0 output assigned to AOI1_IN00
kXBARB2_OutputAoi1In01	XBARB2_OUT1 output assigned to AOI1_IN01
kXBARB2_OutputAoi1In02	XBARB2_OUT2 output assigned to AOI1_IN02
kXBARB2_OutputAoi1In03	XBARB2_OUT3 output assigned to AOI1_IN03
kXBARB2_OutputAoi1In04	XBARB2_OUT4 output assigned to AOI1_IN04
kXBARB2_OutputAoi1In05	XBARB2_OUT5 output assigned to AOI1_IN05
kXBARB2_OutputAoi1In06	XBARB2_OUT6 output assigned to AOI1_IN06
kXBARB2_OutputAoi1In07	XBARB2_OUT7 output assigned to AOI1_IN07
kXBARB2_OutputAoi1In08	XBARB2_OUT8 output assigned to AOI1_IN08
kXBARB2_OutputAoi1In09	XBARB2_OUT9 output assigned to AOI1_IN09
kXBARB2_OutputAoi1In10	XBARB2_OUT10 output assigned to AOI1_IN10
kXBARB2_OutputAoi1In11	XBARB2_OUT11 output assigned to AOI1_IN11
kXBARB2_OutputAoi1In12	XBARB2_OUT12 output assigned to AOI1_IN12
kXBARB2_OutputAoi1In13	XBARB2_OUT13 output assigned to AOI1_IN13
kXBARB2_OutputAoi1In14	XBARB2_OUT14 output assigned to AOI1_IN14
kXBARB2_OutputAoi1In15	XBARB2_OUT15 output assigned to AOI1_IN15
kXBARB3_OutputAoi2In00	XBARB3_OUT0 output assigned to AOI2_IN00
kXBARB3_OutputAoi2In01	XBARB3_OUT1 output assigned to AOI2_IN01
kXBARB3_OutputAoi2In02	XBARB3_OUT2 output assigned to AOI2_IN02
kXBARB3_OutputAoi2In03	XBARB3_OUT3 output assigned to AOI2_IN03
kXBARB3_OutputAoi2In04	XBARB3_OUT4 output assigned to AOI2_IN04
kXBARB3_OutputAoi2In05	XBARB3_OUT5 output assigned to AOI2_IN05
kXBARB3_OutputAoi2In06	XBARB3_OUT6 output assigned to AOI2_IN06
kXBARB3_OutputAoi2In07	XBARB3_OUT7 output assigned to AOI2_IN07
kXBARB3_OutputAoi2In08	XBARB3_OUT8 output assigned to AOI2_IN08
kXBARB3_OutputAoi2In09	XBARB3_OUT9 output assigned to AOI2_IN09
kXBARB3_OutputAoi2In10	XBARB3_OUT10 output assigned to AOI2_IN10
kXBARB3_OutputAoi2In11	XBARB3_OUT11 output assigned to AOI2_IN11
kXBARB3_OutputAoi2In12	XBARB3_OUT12 output assigned to AOI2_IN12
kXBARB3_OutputAoi2In13	XBARB3_OUT13 output assigned to AOI2_IN13
kXBARB3_OutputAoi2In14	XBARB3_OUT14 output assigned to AOI2_IN14
kXBARB3_OutputAoi2In15	XBARB3_OUT15 output assigned to AOI2_IN15

_xbar_output_signal [2/2]

enum _xbar_output_signal

Enumerator
kXBARA1_OutputDmaChMuxReq30	XBARA1_OUT0 output assigned to DMA_CH_MUX_REQ30
kXBARA1_OutputDmaChMuxReq31	XBARA1_OUT1 output assigned to DMA_CH_MUX_REQ31
kXBARA1_OutputDmaChMuxReq94	XBARA1_OUT2 output assigned to DMA_CH_MUX_REQ94
kXBARA1_OutputDmaChMuxReq95	XBARA1_OUT3 output assigned to DMA_CH_MUX_REQ95
kXBARA1_OutputIomuxXbarInout04	XBARA1_OUT4 output assigned to IOMUX_XBAR_INOUT04
kXBARA1_OutputIomuxXbarInout05	XBARA1_OUT5 output assigned to IOMUX_XBAR_INOUT05
kXBARA1_OutputIomuxXbarInout06	XBARA1_OUT6 output assigned to IOMUX_XBAR_INOUT06
kXBARA1_OutputIomuxXbarInout07	XBARA1_OUT7 output assigned to IOMUX_XBAR_INOUT07
kXBARA1_OutputIomuxXbarInout08	XBARA1_OUT8 output assigned to IOMUX_XBAR_INOUT08
kXBARA1_OutputIomuxXbarInout09	XBARA1_OUT9 output assigned to IOMUX_XBAR_INOUT09
kXBARA1_OutputIomuxXbarInout10	XBARA1_OUT10 output assigned to IOMUX_XBAR_INOUT10
kXBARA1_OutputIomuxXbarInout11	XBARA1_OUT11 output assigned to IOMUX_XBAR_INOUT11
kXBARA1_OutputIomuxXbarInout12	XBARA1_OUT12 output assigned to IOMUX_XBAR_INOUT12
kXBARA1_OutputIomuxXbarInout13	XBARA1_OUT13 output assigned to IOMUX_XBAR_INOUT13
kXBARA1_OutputIomuxXbarInout14	XBARA1_OUT14 output assigned to IOMUX_XBAR_INOUT14
kXBARA1_OutputIomuxXbarInout15	XBARA1_OUT15 output assigned to IOMUX_XBAR_INOUT15
kXBARA1_OutputIomuxXbarInout16	XBARA1_OUT16 output assigned to IOMUX_XBAR_INOUT16
kXBARA1_OutputIomuxXbarInout17	XBARA1_OUT17 output assigned to IOMUX_XBAR_INOUT17
kXBARA1_OutputIomuxXbarInout18	XBARA1_OUT18 output assigned to IOMUX_XBAR_INOUT18
kXBARA1_OutputIomuxXbarInout19	XBARA1_OUT19 output assigned to IOMUX_XBAR_INOUT19
kXBARA1_OutputAcmp1Sample	XBARA1_OUT20 output assigned to ACMP1_SAMPLE
kXBARA1_OutputAcmp2Sample	XBARA1_OUT21 output assigned to ACMP2_SAMPLE
kXBARA1_OutputAcmp3Sample	XBARA1_OUT22 output assigned to ACMP3_SAMPLE
kXBARA1_OutputAcmp4Sample	XBARA1_OUT23 output assigned to ACMP4_SAMPLE
kXBARA1_OutputRESERVED24	XBARA1_OUT24 output is reserved.
kXBARA1_OutputRESERVED25	XBARA1_OUT25 output is reserved.
kXBARA1_OutputFlexpwm1Exta0	XBARA1_OUT26 output assigned to FLEXPWM1_EXTA0
kXBARA1_OutputFlexpwm1Exta1	XBARA1_OUT27 output assigned to FLEXPWM1_EXTA1
kXBARA1_OutputFlexpwm1Exta2	XBARA1_OUT28 output assigned to FLEXPWM1_EXTA2
kXBARA1_OutputFlexpwm1Exta3	XBARA1_OUT29 output assigned to FLEXPWM1_EXTA3
kXBARA1_OutputFlexpwm1ExtSync0	XBARA1_OUT30 output assigned to FLEXPWM1_EXT_SYNC0
kXBARA1_OutputFlexpwm1ExtSync1	XBARA1_OUT31 output assigned to FLEXPWM1_EXT_SYNC1
kXBARA1_OutputFlexpwm1ExtSync2	XBARA1_OUT32 output assigned to FLEXPWM1_EXT_SYNC2
kXBARA1_OutputFlexpwm1ExtSync3	XBARA1_OUT33 output assigned to FLEXPWM1_EXT_SYNC3
kXBARA1_OutputFlexpwm1ExtClk	XBARA1_OUT34 output assigned to FLEXPWM1_EXT_CLK
kXBARA1_OutputFlexpwm1Fault0	XBARA1_OUT35 output assigned to FLEXPWM1_FAULT0
kXBARA1_OutputFlexpwm1Fault1	XBARA1_OUT36 output assigned to FLEXPWM1_FAULT1
kXBARA1_OutputFlexpwm1234Fault2	XBARA1_OUT37 output assigned to FLEXPWM1_2_3_4_FAULT2
kXBARA1_OutputFlexpwm1234Fault3	XBARA1_OUT38 output assigned to FLEXPWM1_2_3_4_FAULT3
kXBARA1_OutputFlexpwm1ExtForce	XBARA1_OUT39 output assigned to FLEXPWM1_EXT_FORCE
kXBARA1_OutputFlexpwm234Exta0	XBARA1_OUT40 output assigned to FLEXPWM2_3_4_EXTA0
kXBARA1_OutputFlexpwm234Exta1	XBARA1_OUT41 output assigned to FLEXPWM2_3_4_EXTA1
kXBARA1_OutputFlexpwm234Exta2	XBARA1_OUT42 output assigned to FLEXPWM2_3_4_EXTA2
kXBARA1_OutputFlexpwm234Exta3	XBARA1_OUT43 output assigned to FLEXPWM2_3_4_EXTA3
kXBARA1_OutputFlexpwm2ExtSync0	XBARA1_OUT44 output assigned to FLEXPWM2_EXT_SYNC0
kXBARA1_OutputFlexpwm2ExtSync1	XBARA1_OUT45 output assigned to FLEXPWM2_EXT_SYNC1
kXBARA1_OutputFlexpwm2ExtSync2	XBARA1_OUT46 output assigned to FLEXPWM2_EXT_SYNC2
kXBARA1_OutputFlexpwm2ExtSync3	XBARA1_OUT47 output assigned to FLEXPWM2_EXT_SYNC3
kXBARA1_OutputFlexpwm234ExtClk	XBARA1_OUT48 output assigned to FLEXPWM2_3_4_EXT_CLK
kXBARA1_OutputFlexpwm2Fault0	XBARA1_OUT49 output assigned to FLEXPWM2_FAULT0
kXBARA1_OutputFlexpwm2Fault1	XBARA1_OUT50 output assigned to FLEXPWM2_FAULT1
kXBARA1_OutputFlexpwm2ExtForce	XBARA1_OUT51 output assigned to FLEXPWM2_EXT_FORCE
kXBARA1_OutputFlexpwm3ExtSync0	XBARA1_OUT52 output assigned to FLEXPWM3_EXT_SYNC0
kXBARA1_OutputFlexpwm3ExtSync1	XBARA1_OUT53 output assigned to FLEXPWM3_EXT_SYNC1
kXBARA1_OutputFlexpwm3ExtSync2	XBARA1_OUT54 output assigned to FLEXPWM3_EXT_SYNC2
kXBARA1_OutputFlexpwm3ExtSync3	XBARA1_OUT55 output assigned to FLEXPWM3_EXT_SYNC3
kXBARA1_OutputFlexpwm3Fault0	XBARA1_OUT56 output assigned to FLEXPWM3_FAULT0
kXBARA1_OutputFlexpwm3Fault1	XBARA1_OUT57 output assigned to FLEXPWM3_FAULT1
kXBARA1_OutputFlexpwm3ExtForce	XBARA1_OUT58 output assigned to FLEXPWM3_EXT_FORCE
kXBARA1_OutputFlexpwm4ExtSync0	XBARA1_OUT59 output assigned to FLEXPWM4_EXT_SYNC0
kXBARA1_OutputFlexpwm4ExtSync1	XBARA1_OUT60 output assigned to FLEXPWM4_EXT_SYNC1
kXBARA1_OutputFlexpwm4ExtSync2	XBARA1_OUT61 output assigned to FLEXPWM4_EXT_SYNC2
kXBARA1_OutputFlexpwm4ExtSync3	XBARA1_OUT62 output assigned to FLEXPWM4_EXT_SYNC3
kXBARA1_OutputFlexpwm4Fault0	XBARA1_OUT63 output assigned to FLEXPWM4_FAULT0
kXBARA1_OutputFlexpwm4Fault1	XBARA1_OUT64 output assigned to FLEXPWM4_FAULT1
kXBARA1_OutputFlexpwm4ExtForce	XBARA1_OUT65 output assigned to FLEXPWM4_EXT_FORCE
kXBARA1_OutputEnc1PhaseAInput	XBARA1_OUT66 output assigned to ENC1_PHASE_A_INPUT
kXBARA1_OutputEnc1PhaseBInput	XBARA1_OUT67 output assigned to ENC1_PHASE_B_INPUT
kXBARA1_OutputEnc1Index	XBARA1_OUT68 output assigned to ENC1_INDEX
kXBARA1_OutputEnc1Home	XBARA1_OUT69 output assigned to ENC1_HOME
kXBARA1_OutputEnc1Trigger	XBARA1_OUT70 output assigned to ENC1_TRIGGER
kXBARA1_OutputEnc2PhaseAInput	XBARA1_OUT71 output assigned to ENC2_PHASE_A_INPUT
kXBARA1_OutputEnc2PhaseBInput	XBARA1_OUT72 output assigned to ENC2_PHASE_B_INPUT
kXBARA1_OutputEnc2Index	XBARA1_OUT73 output assigned to ENC2_INDEX
kXBARA1_OutputEnc2Home	XBARA1_OUT74 output assigned to ENC2_HOME
kXBARA1_OutputEnc2Trigger	XBARA1_OUT75 output assigned to ENC2_TRIGGER
kXBARA1_OutputEnc3PhaseAInput	XBARA1_OUT76 output assigned to ENC3_PHASE_A_INPUT
kXBARA1_OutputEnc3PhaseBInput	XBARA1_OUT77 output assigned to ENC3_PHASE_B_INPUT
kXBARA1_OutputEnc3Index	XBARA1_OUT78 output assigned to ENC3_INDEX
kXBARA1_OutputEnc3Home	XBARA1_OUT79 output assigned to ENC3_HOME
kXBARA1_OutputEnc3Trigger	XBARA1_OUT80 output assigned to ENC3_TRIGGER
kXBARA1_OutputEnc4PhaseAInput	XBARA1_OUT81 output assigned to ENC4_PHASE_A_INPUT
kXBARA1_OutputEnc4PhaseBInput	XBARA1_OUT82 output assigned to ENC4_PHASE_B_INPUT
kXBARA1_OutputEnc4Index	XBARA1_OUT83 output assigned to ENC4_INDEX
kXBARA1_OutputEnc4Home	XBARA1_OUT84 output assigned to ENC4_HOME
kXBARA1_OutputEnc4Trigger	XBARA1_OUT85 output assigned to ENC4_TRIGGER
kXBARA1_OutputQtimer1Tmr0Input	XBARA1_OUT86 output assigned to QTIMER1_TMR0_INPUT
kXBARA1_OutputQtimer1Tmr1Input	XBARA1_OUT87 output assigned to QTIMER1_TMR1_INPUT
kXBARA1_OutputQtimer1Tmr2Input	XBARA1_OUT88 output assigned to QTIMER1_TMR2_INPUT
kXBARA1_OutputQtimer1Tmr3Input	XBARA1_OUT89 output assigned to QTIMER1_TMR3_INPUT
kXBARA1_OutputQtimer2Tmr0Input	XBARA1_OUT90 output assigned to QTIMER2_TMR0_INPUT
kXBARA1_OutputQtimer2Tmr1Input	XBARA1_OUT91 output assigned to QTIMER2_TMR1_INPUT
kXBARA1_OutputQtimer2Tmr2Input	XBARA1_OUT92 output assigned to QTIMER2_TMR2_INPUT
kXBARA1_OutputQtimer2Tmr3Input	XBARA1_OUT93 output assigned to QTIMER2_TMR3_INPUT
kXBARA1_OutputQtimer3Tmr0Input	XBARA1_OUT94 output assigned to QTIMER3_TMR0_INPUT
kXBARA1_OutputQtimer3Tmr1Input	XBARA1_OUT95 output assigned to QTIMER3_TMR1_INPUT
kXBARA1_OutputQtimer3Tmr2Input	XBARA1_OUT96 output assigned to QTIMER3_TMR2_INPUT
kXBARA1_OutputQtimer3Tmr3Input	XBARA1_OUT97 output assigned to QTIMER3_TMR3_INPUT
kXBARA1_OutputQtimer4Tmr0Input	XBARA1_OUT98 output assigned to QTIMER4_TMR0_INPUT
kXBARA1_OutputQtimer4Tmr1Input	XBARA1_OUT99 output assigned to QTIMER4_TMR1_INPUT
kXBARA1_OutputQtimer4Tmr2Input	XBARA1_OUT100 output assigned to QTIMER4_TMR2_INPUT
kXBARA1_OutputQtimer4Tmr3Input	XBARA1_OUT101 output assigned to QTIMER4_TMR3_INPUT
kXBARA1_OutputEwmEwmIn	XBARA1_OUT102 output assigned to EWM_EWM_IN
kXBARA1_OutputAdcEtcXbar0Trig0	XBARA1_OUT103 output assigned to ADC_ETC_XBAR0_TRIG0
kXBARA1_OutputAdcEtcXbar0Trig1	XBARA1_OUT104 output assigned to ADC_ETC_XBAR0_TRIG1
kXBARA1_OutputAdcEtcXbar0Trig2	XBARA1_OUT105 output assigned to ADC_ETC_XBAR0_TRIG2
kXBARA1_OutputAdcEtcXbar0Trig3	XBARA1_OUT106 output assigned to ADC_ETC_XBAR0_TRIG3
kXBARA1_OutputAdcEtcXbar1Trig0	XBARA1_OUT107 output assigned to ADC_ETC_XBAR1_TRIG0
kXBARA1_OutputAdcEtcXbar1Trig1	XBARA1_OUT108 output assigned to ADC_ETC_XBAR1_TRIG1
kXBARA1_OutputAdcEtcXbar1Trig2	XBARA1_OUT109 output assigned to ADC_ETC_XBAR1_TRIG2
kXBARA1_OutputAdcEtcXbar1Trig3	XBARA1_OUT110 output assigned to ADC_ETC_XBAR1_TRIG3
kXBARA1_OutputLpi2c1TrgInput	XBARA1_OUT111 output assigned to LPI2C1_TRG_INPUT
kXBARA1_OutputLpi2c2TrgInput	XBARA1_OUT112 output assigned to LPI2C2_TRG_INPUT
kXBARA1_OutputLpi2c3TrgInput	XBARA1_OUT113 output assigned to LPI2C3_TRG_INPUT
kXBARA1_OutputLpi2c4TrgInput	XBARA1_OUT114 output assigned to LPI2C4_TRG_INPUT
kXBARA1_OutputLpspi1TrgInput	XBARA1_OUT115 output assigned to LPSPI1_TRG_INPUT
kXBARA1_OutputLpspi2TrgInput	XBARA1_OUT116 output assigned to LPSPI2_TRG_INPUT
kXBARA1_OutputLpspi3TrgInput	XBARA1_OUT117 output assigned to LPSPI3_TRG_INPUT
kXBARA1_OutputLpspi4TrgInput	XBARA1_OUT118 output assigned to LPSPI4_TRG_INPUT
kXBARA1_OutputLpuart1TrgInput	XBARA1_OUT119 output assigned to LPUART1_TRG_INPUT
kXBARA1_OutputLpuart2TrgInput	XBARA1_OUT120 output assigned to LPUART2_TRG_INPUT
kXBARA1_OutputLpuart3TrgInput	XBARA1_OUT121 output assigned to LPUART3_TRG_INPUT
kXBARA1_OutputLpuart4TrgInput	XBARA1_OUT122 output assigned to LPUART4_TRG_INPUT
kXBARA1_OutputLpuart5TrgInput	XBARA1_OUT123 output assigned to LPUART5_TRG_INPUT
kXBARA1_OutputLpuart6TrgInput	XBARA1_OUT124 output assigned to LPUART6_TRG_INPUT
kXBARA1_OutputLpuart7TrgInput	XBARA1_OUT125 output assigned to LPUART7_TRG_INPUT
kXBARA1_OutputLpuart8TrgInput	XBARA1_OUT126 output assigned to LPUART8_TRG_INPUT
kXBARA1_OutputFlexio1TriggerIn0	XBARA1_OUT127 output assigned to FLEXIO1_TRIGGER_IN0
kXBARA1_OutputFlexio1TriggerIn1	XBARA1_OUT128 output assigned to FLEXIO1_TRIGGER_IN1
kXBARA1_OutputFlexio2TriggerIn0	XBARA1_OUT129 output assigned to FLEXIO2_TRIGGER_IN0
kXBARA1_OutputFlexio2TriggerIn1	XBARA1_OUT130 output assigned to FLEXIO2_TRIGGER_IN1
kXBARB2_OutputAoi1In00	XBARB2_OUT0 output assigned to AOI1_IN00
kXBARB2_OutputAoi1In01	XBARB2_OUT1 output assigned to AOI1_IN01
kXBARB2_OutputAoi1In02	XBARB2_OUT2 output assigned to AOI1_IN02
kXBARB2_OutputAoi1In03	XBARB2_OUT3 output assigned to AOI1_IN03
kXBARB2_OutputAoi1In04	XBARB2_OUT4 output assigned to AOI1_IN04
kXBARB2_OutputAoi1In05	XBARB2_OUT5 output assigned to AOI1_IN05
kXBARB2_OutputAoi1In06	XBARB2_OUT6 output assigned to AOI1_IN06
kXBARB2_OutputAoi1In07	XBARB2_OUT7 output assigned to AOI1_IN07
kXBARB2_OutputAoi1In08	XBARB2_OUT8 output assigned to AOI1_IN08
kXBARB2_OutputAoi1In09	XBARB2_OUT9 output assigned to AOI1_IN09
kXBARB2_OutputAoi1In10	XBARB2_OUT10 output assigned to AOI1_IN10
kXBARB2_OutputAoi1In11	XBARB2_OUT11 output assigned to AOI1_IN11
kXBARB2_OutputAoi1In12	XBARB2_OUT12 output assigned to AOI1_IN12
kXBARB2_OutputAoi1In13	XBARB2_OUT13 output assigned to AOI1_IN13
kXBARB2_OutputAoi1In14	XBARB2_OUT14 output assigned to AOI1_IN14
kXBARB2_OutputAoi1In15	XBARB2_OUT15 output assigned to AOI1_IN15
kXBARB3_OutputAoi2In00	XBARB3_OUT0 output assigned to AOI2_IN00
kXBARB3_OutputAoi2In01	XBARB3_OUT1 output assigned to AOI2_IN01
kXBARB3_OutputAoi2In02	XBARB3_OUT2 output assigned to AOI2_IN02
kXBARB3_OutputAoi2In03	XBARB3_OUT3 output assigned to AOI2_IN03
kXBARB3_OutputAoi2In04	XBARB3_OUT4 output assigned to AOI2_IN04
kXBARB3_OutputAoi2In05	XBARB3_OUT5 output assigned to AOI2_IN05
kXBARB3_OutputAoi2In06	XBARB3_OUT6 output assigned to AOI2_IN06
kXBARB3_OutputAoi2In07	XBARB3_OUT7 output assigned to AOI2_IN07
kXBARB3_OutputAoi2In08	XBARB3_OUT8 output assigned to AOI2_IN08
kXBARB3_OutputAoi2In09	XBARB3_OUT9 output assigned to AOI2_IN09
kXBARB3_OutputAoi2In10	XBARB3_OUT10 output assigned to AOI2_IN10
kXBARB3_OutputAoi2In11	XBARB3_OUT11 output assigned to AOI2_IN11
kXBARB3_OutputAoi2In12	XBARB3_OUT12 output assigned to AOI2_IN12
kXBARB3_OutputAoi2In13	XBARB3_OUT13 output assigned to AOI2_IN13
kXBARB3_OutputAoi2In14	XBARB3_OUT14 output assigned to AOI2_IN14
kXBARB3_OutputAoi2In15	XBARB3_OUT15 output assigned to AOI2_IN15
kXBARA1_OutputDmaChMuxReq81	XBARA1_OUT0 output assigned to DMA_CH_MUX_REQ81
kXBARA1_OutputDmaChMuxReq82	XBARA1_OUT1 output assigned to DMA_CH_MUX_REQ82
kXBARA1_OutputDmaChMuxReq83	XBARA1_OUT2 output assigned to DMA_CH_MUX_REQ83
kXBARA1_OutputDmaChMuxReq84	XBARA1_OUT3 output assigned to DMA_CH_MUX_REQ84
kXBARA1_OutputIomuxXbarInout04	XBARA1_OUT4 output assigned to IOMUX_XBAR_INOUT04
kXBARA1_OutputIomuxXbarInout05	XBARA1_OUT5 output assigned to IOMUX_XBAR_INOUT05
kXBARA1_OutputIomuxXbarInout06	XBARA1_OUT6 output assigned to IOMUX_XBAR_INOUT06
kXBARA1_OutputIomuxXbarInout07	XBARA1_OUT7 output assigned to IOMUX_XBAR_INOUT07
kXBARA1_OutputIomuxXbarInout08	XBARA1_OUT8 output assigned to IOMUX_XBAR_INOUT08
kXBARA1_OutputIomuxXbarInout09	XBARA1_OUT9 output assigned to IOMUX_XBAR_INOUT09
kXBARA1_OutputIomuxXbarInout10	XBARA1_OUT10 output assigned to IOMUX_XBAR_INOUT10
kXBARA1_OutputIomuxXbarInout11	XBARA1_OUT11 output assigned to IOMUX_XBAR_INOUT11
kXBARA1_OutputIomuxXbarInout12	XBARA1_OUT12 output assigned to IOMUX_XBAR_INOUT12
kXBARA1_OutputIomuxXbarInout13	XBARA1_OUT13 output assigned to IOMUX_XBAR_INOUT13
kXBARA1_OutputIomuxXbarInout14	XBARA1_OUT14 output assigned to IOMUX_XBAR_INOUT14
kXBARA1_OutputIomuxXbarInout15	XBARA1_OUT15 output assigned to IOMUX_XBAR_INOUT15
kXBARA1_OutputIomuxXbarInout16	XBARA1_OUT16 output assigned to IOMUX_XBAR_INOUT16
kXBARA1_OutputIomuxXbarInout17	XBARA1_OUT17 output assigned to IOMUX_XBAR_INOUT17
kXBARA1_OutputIomuxXbarInout18	XBARA1_OUT18 output assigned to IOMUX_XBAR_INOUT18
kXBARA1_OutputIomuxXbarInout19	XBARA1_OUT19 output assigned to IOMUX_XBAR_INOUT19
kXBARA1_OutputIomuxXbarInout20	XBARA1_OUT20 output assigned to IOMUX_XBAR_INOUT20
kXBARA1_OutputIomuxXbarInout21	XBARA1_OUT21 output assigned to IOMUX_XBAR_INOUT21
kXBARA1_OutputIomuxXbarInout22	XBARA1_OUT22 output assigned to IOMUX_XBAR_INOUT22
kXBARA1_OutputIomuxXbarInout23	XBARA1_OUT23 output assigned to IOMUX_XBAR_INOUT23
kXBARA1_OutputIomuxXbarInout24	XBARA1_OUT24 output assigned to IOMUX_XBAR_INOUT24
kXBARA1_OutputIomuxXbarInout25	XBARA1_OUT25 output assigned to IOMUX_XBAR_INOUT25
kXBARA1_OutputIomuxXbarInout26	XBARA1_OUT26 output assigned to IOMUX_XBAR_INOUT26
kXBARA1_OutputIomuxXbarInout27	XBARA1_OUT27 output assigned to IOMUX_XBAR_INOUT27
kXBARA1_OutputIomuxXbarInout28	XBARA1_OUT28 output assigned to IOMUX_XBAR_INOUT28
kXBARA1_OutputIomuxXbarInout29	XBARA1_OUT29 output assigned to IOMUX_XBAR_INOUT29
kXBARA1_OutputIomuxXbarInout30	XBARA1_OUT30 output assigned to IOMUX_XBAR_INOUT30
kXBARA1_OutputIomuxXbarInout31	XBARA1_OUT31 output assigned to IOMUX_XBAR_INOUT31
kXBARA1_OutputIomuxXbarInout32	XBARA1_OUT32 output assigned to IOMUX_XBAR_INOUT32
kXBARA1_OutputIomuxXbarInout33	XBARA1_OUT33 output assigned to IOMUX_XBAR_INOUT33
kXBARA1_OutputIomuxXbarInout34	XBARA1_OUT34 output assigned to IOMUX_XBAR_INOUT34
kXBARA1_OutputIomuxXbarInout35	XBARA1_OUT35 output assigned to IOMUX_XBAR_INOUT35
kXBARA1_OutputIomuxXbarInout36	XBARA1_OUT36 output assigned to IOMUX_XBAR_INOUT36
kXBARA1_OutputIomuxXbarInout37	XBARA1_OUT37 output assigned to IOMUX_XBAR_INOUT37
kXBARA1_OutputIomuxXbarInout38	XBARA1_OUT38 output assigned to IOMUX_XBAR_INOUT38
kXBARA1_OutputIomuxXbarInout39	XBARA1_OUT39 output assigned to IOMUX_XBAR_INOUT39
kXBARA1_OutputIomuxXbarInout40	XBARA1_OUT40 output assigned to IOMUX_XBAR_INOUT40
kXBARA1_OutputAcmp1Sample	XBARA1_OUT41 output assigned to ACMP1_SAMPLE
kXBARA1_OutputAcmp2Sample	XBARA1_OUT42 output assigned to ACMP2_SAMPLE
kXBARA1_OutputAcmp3Sample	XBARA1_OUT43 output assigned to ACMP3_SAMPLE
kXBARA1_OutputAcmp4Sample	XBARA1_OUT44 output assigned to ACMP4_SAMPLE
kXBARA1_OutputRESERVED45	XBARA1_OUT45 output is reserved.
kXBARA1_OutputRESERVED46	XBARA1_OUT46 output is reserved.
kXBARA1_OutputRESERVED47	XBARA1_OUT47 output is reserved.
kXBARA1_OutputRESERVED48	XBARA1_OUT48 output is reserved.
kXBARA1_OutputFlexpwm1Pwm0Exta	XBARA1_OUT49 output assigned to FLEXPWM1_PWM0_EXTA
kXBARA1_OutputFlexpwm1Pwm1Exta	XBARA1_OUT50 output assigned to FLEXPWM1_PWM1_EXTA
kXBARA1_OutputFlexpwm1Pwm2Exta	XBARA1_OUT51 output assigned to FLEXPWM1_PWM2_EXTA
kXBARA1_OutputFlexpwm1Pwm3Exta	XBARA1_OUT52 output assigned to FLEXPWM1_PWM3_EXTA
kXBARA1_OutputFlexpwm1Pwm0ExtSync	XBARA1_OUT53 output assigned to FLEXPWM1_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm1Pwm1ExtSync	XBARA1_OUT54 output assigned to FLEXPWM1_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm1Pwm2ExtSync	XBARA1_OUT55 output assigned to FLEXPWM1_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm1Pwm3ExtSync	XBARA1_OUT56 output assigned to FLEXPWM1_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm1ExtClk	XBARA1_OUT57 output assigned to FLEXPWM1_EXT_CLK
kXBARA1_OutputFlexpwm1Fault0	XBARA1_OUT58 output assigned to FLEXPWM1_FAULT0
kXBARA1_OutputFlexpwm1Fault1	XBARA1_OUT59 output assigned to FLEXPWM1_FAULT1
kXBARA1_OutputFlexpwm1234Fault2	XBARA1_OUT60 output assigned to FLEXPWM1_2_3_4_FAULT2
kXBARA1_OutputFlexpwm1234Fault3	XBARA1_OUT61 output assigned to FLEXPWM1_2_3_4_FAULT3
kXBARA1_OutputFlexpwm1ExtForce	XBARA1_OUT62 output assigned to FLEXPWM1_EXT_FORCE
kXBARA1_OutputFlexpwm2Pwm0Exta	XBARA1_OUT63 output assigned to FLEXPWM2_PWM0_EXTA
kXBARA1_OutputFlexpwm2Pwm1Exta	XBARA1_OUT64 output assigned to FLEXPWM2_PWM1_EXTA
kXBARA1_OutputFlexpwm2Pwm2Exta	XBARA1_OUT65 output assigned to FLEXPWM2_PWM2_EXTA
kXBARA1_OutputFlexpwm2Pwm3Exta	XBARA1_OUT66 output assigned to FLEXPWM2_PWM3_EXTA
kXBARA1_OutputFlexpwm2Pwm0ExtSync	XBARA1_OUT67 output assigned to FLEXPWM2_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm2Pwm1ExtSync	XBARA1_OUT68 output assigned to FLEXPWM2_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm2Pwm2ExtSync	XBARA1_OUT69 output assigned to FLEXPWM2_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm2Pwm3ExtSync	XBARA1_OUT70 output assigned to FLEXPWM2_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm2ExtClk	XBARA1_OUT71 output assigned to FLEXPWM2_EXT_CLK
kXBARA1_OutputFlexpwm2Fault0	XBARA1_OUT72 output assigned to FLEXPWM2_FAULT0
kXBARA1_OutputFlexpwm2Fault1	XBARA1_OUT73 output assigned to FLEXPWM2_FAULT1
kXBARA1_OutputFlexpwm2ExtForce	XBARA1_OUT74 output assigned to FLEXPWM2_EXT_FORCE
kXBARA1_OutputFlexpwm34Pwm0Exta	XBARA1_OUT75 output assigned to FLEXPWM3_4_PWM0_EXTA
kXBARA1_OutputFlexpwm34Pwm1Exta	XBARA1_OUT76 output assigned to FLEXPWM3_4_PWM1_EXTA
kXBARA1_OutputFlexpwm34Pwm2Exta	XBARA1_OUT77 output assigned to FLEXPWM3_4_PWM2_EXTA
kXBARA1_OutputFlexpwm34Pwm3Exta	XBARA1_OUT78 output assigned to FLEXPWM3_4_PWM3_EXTA
kXBARA1_OutputFlexpwm34ExtClk	XBARA1_OUT79 output assigned to FLEXPWM3_4_EXT_CLK
kXBARA1_OutputFlexpwm3Pwm0ExtSync	XBARA1_OUT80 output assigned to FLEXPWM3_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm3Pwm1ExtSync	XBARA1_OUT81 output assigned to FLEXPWM3_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm3Pwm2ExtSync	XBARA1_OUT82 output assigned to FLEXPWM3_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm3Pwm3ExtSync	XBARA1_OUT83 output assigned to FLEXPWM3_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm3Fault0	XBARA1_OUT84 output assigned to FLEXPWM3_FAULT0
kXBARA1_OutputFlexpwm3Fault1	XBARA1_OUT85 output assigned to FLEXPWM3_FAULT1
kXBARA1_OutputFlexpwm3ExtForce	XBARA1_OUT86 output assigned to FLEXPWM3_EXT_FORCE
kXBARA1_OutputFlexpwm4Pwm0ExtSync	XBARA1_OUT87 output assigned to FLEXPWM4_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm4Pwm1ExtSync	XBARA1_OUT88 output assigned to FLEXPWM4_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm4Pwm2ExtSync	XBARA1_OUT89 output assigned to FLEXPWM4_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm4Pwm3ExtSync	XBARA1_OUT90 output assigned to FLEXPWM4_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm4Fault0	XBARA1_OUT91 output assigned to FLEXPWM4_FAULT0
kXBARA1_OutputFlexpwm4Fault1	XBARA1_OUT92 output assigned to FLEXPWM4_FAULT1
kXBARA1_OutputFlexpwm4ExtForce	XBARA1_OUT93 output assigned to FLEXPWM4_EXT_FORCE
kXBARA1_OutputRESERVED94	XBARA1_OUT94 output is reserved.
kXBARA1_OutputRESERVED95	XBARA1_OUT95 output is reserved.
kXBARA1_OutputRESERVED96	XBARA1_OUT96 output is reserved.
kXBARA1_OutputRESERVED97	XBARA1_OUT97 output is reserved.
kXBARA1_OutputRESERVED98	XBARA1_OUT98 output is reserved.
kXBARA1_OutputRESERVED99	XBARA1_OUT99 output is reserved.
kXBARA1_OutputRESERVED100	XBARA1_OUT100 output is reserved.
kXBARA1_OutputRESERVED101	XBARA1_OUT101 output is reserved.
kXBARA1_OutputRESERVED102	XBARA1_OUT102 output is reserved.
kXBARA1_OutputRESERVED103	XBARA1_OUT103 output is reserved.
kXBARA1_OutputRESERVED104	XBARA1_OUT104 output is reserved.
kXBARA1_OutputRESERVED105	XBARA1_OUT105 output is reserved.
kXBARA1_OutputRESERVED106	XBARA1_OUT106 output is reserved.
kXBARA1_OutputRESERVED107	XBARA1_OUT107 output is reserved.
kXBARA1_OutputDec1Phasea	XBARA1_OUT108 output assigned to DEC1_PHASEA
kXBARA1_OutputDec1Phaseb	XBARA1_OUT109 output assigned to DEC1_PHASEB
kXBARA1_OutputDec1Index	XBARA1_OUT110 output assigned to DEC1_INDEX
kXBARA1_OutputDec1Home	XBARA1_OUT111 output assigned to DEC1_HOME
kXBARA1_OutputDec1Trigger	XBARA1_OUT112 output assigned to DEC1_TRIGGER
kXBARA1_OutputDec2Phasea	XBARA1_OUT113 output assigned to DEC2_PHASEA
kXBARA1_OutputDec2Phaseb	XBARA1_OUT114 output assigned to DEC2_PHASEB
kXBARA1_OutputDec2Index	XBARA1_OUT115 output assigned to DEC2_INDEX
kXBARA1_OutputDec2Home	XBARA1_OUT116 output assigned to DEC2_HOME
kXBARA1_OutputDec2Trigger	XBARA1_OUT117 output assigned to DEC2_TRIGGER
kXBARA1_OutputDec3Phasea	XBARA1_OUT118 output assigned to DEC3_PHASEA
kXBARA1_OutputDec3Phaseb	XBARA1_OUT119 output assigned to DEC3_PHASEB
kXBARA1_OutputDec3Index	XBARA1_OUT120 output assigned to DEC3_INDEX
kXBARA1_OutputDec3Home	XBARA1_OUT121 output assigned to DEC3_HOME
kXBARA1_OutputDec3Trigger	XBARA1_OUT122 output assigned to DEC3_TRIGGER
kXBARA1_OutputDec4Phasea	XBARA1_OUT123 output assigned to DEC4_PHASEA
kXBARA1_OutputDec4Phaseb	XBARA1_OUT124 output assigned to DEC4_PHASEB
kXBARA1_OutputDec4Index	XBARA1_OUT125 output assigned to DEC4_INDEX
kXBARA1_OutputDec4Home	XBARA1_OUT126 output assigned to DEC4_HOME
kXBARA1_OutputDec4Trigger	XBARA1_OUT127 output assigned to DEC4_TRIGGER
kXBARA1_OutputRESERVED128	XBARA1_OUT128 output is reserved.
kXBARA1_OutputRESERVED129	XBARA1_OUT129 output is reserved.
kXBARA1_OutputRESERVED130	XBARA1_OUT130 output is reserved.
kXBARA1_OutputRESERVED131	XBARA1_OUT131 output is reserved.
kXBARA1_OutputCan1	XBARA1_OUT132 output assigned to CAN1
kXBARA1_OutputCan2	XBARA1_OUT133 output assigned to CAN2
kXBARA1_OutputRESERVED134	XBARA1_OUT134 output is reserved.
kXBARA1_OutputRESERVED135	XBARA1_OUT135 output is reserved.
kXBARA1_OutputRESERVED136	XBARA1_OUT136 output is reserved.
kXBARA1_OutputRESERVED137	XBARA1_OUT137 output is reserved.
kXBARA1_OutputQtimer1Timer0	XBARA1_OUT138 output assigned to QTIMER1_TIMER0
kXBARA1_OutputQtimer1Timer1	XBARA1_OUT139 output assigned to QTIMER1_TIMER1
kXBARA1_OutputQtimer1Timer2	XBARA1_OUT140 output assigned to QTIMER1_TIMER2
kXBARA1_OutputQtimer1Timer3	XBARA1_OUT141 output assigned to QTIMER1_TIMER3
kXBARA1_OutputQtimer2Timer0	XBARA1_OUT142 output assigned to QTIMER2_TIMER0
kXBARA1_OutputQtimer2Timer1	XBARA1_OUT143 output assigned to QTIMER2_TIMER1
kXBARA1_OutputQtimer2Timer2	XBARA1_OUT144 output assigned to QTIMER2_TIMER2
kXBARA1_OutputQtimer2Timer3	XBARA1_OUT145 output assigned to QTIMER2_TIMER3
kXBARA1_OutputQtimer3Timer0	XBARA1_OUT146 output assigned to QTIMER3_TIMER0
kXBARA1_OutputQtimer3Timer1	XBARA1_OUT147 output assigned to QTIMER3_TIMER1
kXBARA1_OutputQtimer3Timer2	XBARA1_OUT148 output assigned to QTIMER3_TIMER2
kXBARA1_OutputQtimer3Timer3	XBARA1_OUT149 output assigned to QTIMER3_TIMER3
kXBARA1_OutputQtimer4Timer0	XBARA1_OUT150 output assigned to QTIMER4_TIMER0
kXBARA1_OutputQtimer4Timer1	XBARA1_OUT151 output assigned to QTIMER4_TIMER1
kXBARA1_OutputQtimer4Timer2	XBARA1_OUT152 output assigned to QTIMER4_TIMER2
kXBARA1_OutputQtimer4Timer3	XBARA1_OUT153 output assigned to QTIMER4_TIMER3
kXBARA1_OutputEwmEwmIn	XBARA1_OUT154 output assigned to EWM_EWM_IN
kXBARA1_OutputAdcEtc0Coco0	XBARA1_OUT155 output assigned to ADC_ETC0_COCO0
kXBARA1_OutputAdcEtc0Coco1	XBARA1_OUT156 output assigned to ADC_ETC0_COCO1
kXBARA1_OutputAdcEtc0Coco2	XBARA1_OUT157 output assigned to ADC_ETC0_COCO2
kXBARA1_OutputAdcEtc0Coco3	XBARA1_OUT158 output assigned to ADC_ETC0_COCO3
kXBARA1_OutputAdcEtc1Coco0	XBARA1_OUT159 output assigned to ADC_ETC1_COCO0
kXBARA1_OutputAdcEtc1Coco1	XBARA1_OUT160 output assigned to ADC_ETC1_COCO1
kXBARA1_OutputAdcEtc1Coco2	XBARA1_OUT161 output assigned to ADC_ETC1_COCO2
kXBARA1_OutputAdcEtc1Coco3	XBARA1_OUT162 output assigned to ADC_ETC1_COCO3
kXBARA1_OutputRESERVED163	XBARA1_OUT163 output is reserved.
kXBARA1_OutputRESERVED164	XBARA1_OUT164 output is reserved.
kXBARA1_OutputRESERVED165	XBARA1_OUT165 output is reserved.
kXBARA1_OutputRESERVED166	XBARA1_OUT166 output is reserved.
kXBARA1_OutputRESERVED167	XBARA1_OUT167 output is reserved.
kXBARA1_OutputRESERVED168	XBARA1_OUT168 output is reserved.
kXBARA1_OutputRESERVED169	XBARA1_OUT169 output is reserved.
kXBARA1_OutputRESERVED170	XBARA1_OUT170 output is reserved.
kXBARA1_OutputFlexio1TrigIn0	XBARA1_OUT171 output assigned to FLEXIO1_TRIG_IN0
kXBARA1_OutputFlexio1TrigIn1	XBARA1_OUT172 output assigned to FLEXIO1_TRIG_IN1
kXBARA1_OutputFlexio2TrigIn0	XBARA1_OUT173 output assigned to FLEXIO2_TRIG_IN0
kXBARA1_OutputFlexio2TrigIn1	XBARA1_OUT174 output assigned to FLEXIO2_TRIG_IN1
kXBARB2_OutputAoi1In00	XBARB2_OUT0 output assigned to AOI1_IN00
kXBARB2_OutputAoi1In01	XBARB2_OUT1 output assigned to AOI1_IN01
kXBARB2_OutputAoi1In02	XBARB2_OUT2 output assigned to AOI1_IN02
kXBARB2_OutputAoi1In03	XBARB2_OUT3 output assigned to AOI1_IN03
kXBARB2_OutputAoi1In04	XBARB2_OUT4 output assigned to AOI1_IN04
kXBARB2_OutputAoi1In05	XBARB2_OUT5 output assigned to AOI1_IN05
kXBARB2_OutputAoi1In06	XBARB2_OUT6 output assigned to AOI1_IN06
kXBARB2_OutputAoi1In07	XBARB2_OUT7 output assigned to AOI1_IN07
kXBARB2_OutputAoi1In08	XBARB2_OUT8 output assigned to AOI1_IN08
kXBARB2_OutputAoi1In09	XBARB2_OUT9 output assigned to AOI1_IN09
kXBARB2_OutputAoi1In10	XBARB2_OUT10 output assigned to AOI1_IN10
kXBARB2_OutputAoi1In11	XBARB2_OUT11 output assigned to AOI1_IN11
kXBARB2_OutputAoi1In12	XBARB2_OUT12 output assigned to AOI1_IN12
kXBARB2_OutputAoi1In13	XBARB2_OUT13 output assigned to AOI1_IN13
kXBARB2_OutputAoi1In14	XBARB2_OUT14 output assigned to AOI1_IN14
kXBARB2_OutputAoi1In15	XBARB2_OUT15 output assigned to AOI1_IN15
kXBARB3_OutputAoi2In00	XBARB3_OUT0 output assigned to AOI2_IN00
kXBARB3_OutputAoi2In01	XBARB3_OUT1 output assigned to AOI2_IN01
kXBARB3_OutputAoi2In02	XBARB3_OUT2 output assigned to AOI2_IN02
kXBARB3_OutputAoi2In03	XBARB3_OUT3 output assigned to AOI2_IN03
kXBARB3_OutputAoi2In04	XBARB3_OUT4 output assigned to AOI2_IN04
kXBARB3_OutputAoi2In05	XBARB3_OUT5 output assigned to AOI2_IN05
kXBARB3_OutputAoi2In06	XBARB3_OUT6 output assigned to AOI2_IN06
kXBARB3_OutputAoi2In07	XBARB3_OUT7 output assigned to AOI2_IN07
kXBARB3_OutputAoi2In08	XBARB3_OUT8 output assigned to AOI2_IN08
kXBARB3_OutputAoi2In09	XBARB3_OUT9 output assigned to AOI2_IN09
kXBARB3_OutputAoi2In10	XBARB3_OUT10 output assigned to AOI2_IN10
kXBARB3_OutputAoi2In11	XBARB3_OUT11 output assigned to AOI2_IN11
kXBARB3_OutputAoi2In12	XBARB3_OUT12 output assigned to AOI2_IN12
kXBARB3_OutputAoi2In13	XBARB3_OUT13 output assigned to AOI2_IN13
kXBARB3_OutputAoi2In14	XBARB3_OUT14 output assigned to AOI2_IN14
kXBARB3_OutputAoi2In15	XBARB3_OUT15 output assigned to AOI2_IN15
kXBARA1_OutputDmaChMuxReq81	XBARA1_OUT0 output assigned to DMA_CH_MUX_REQ81
kXBARA1_OutputDmaChMuxReq82	XBARA1_OUT1 output assigned to DMA_CH_MUX_REQ82
kXBARA1_OutputDmaChMuxReq83	XBARA1_OUT2 output assigned to DMA_CH_MUX_REQ83
kXBARA1_OutputDmaChMuxReq84	XBARA1_OUT3 output assigned to DMA_CH_MUX_REQ84
kXBARA1_OutputIomuxXbarInout04	XBARA1_OUT4 output assigned to IOMUX_XBAR_INOUT04
kXBARA1_OutputIomuxXbarInout05	XBARA1_OUT5 output assigned to IOMUX_XBAR_INOUT05
kXBARA1_OutputIomuxXbarInout06	XBARA1_OUT6 output assigned to IOMUX_XBAR_INOUT06
kXBARA1_OutputIomuxXbarInout07	XBARA1_OUT7 output assigned to IOMUX_XBAR_INOUT07
kXBARA1_OutputIomuxXbarInout08	XBARA1_OUT8 output assigned to IOMUX_XBAR_INOUT08
kXBARA1_OutputIomuxXbarInout09	XBARA1_OUT9 output assigned to IOMUX_XBAR_INOUT09
kXBARA1_OutputIomuxXbarInout10	XBARA1_OUT10 output assigned to IOMUX_XBAR_INOUT10
kXBARA1_OutputIomuxXbarInout11	XBARA1_OUT11 output assigned to IOMUX_XBAR_INOUT11
kXBARA1_OutputIomuxXbarInout12	XBARA1_OUT12 output assigned to IOMUX_XBAR_INOUT12
kXBARA1_OutputIomuxXbarInout13	XBARA1_OUT13 output assigned to IOMUX_XBAR_INOUT13
kXBARA1_OutputIomuxXbarInout14	XBARA1_OUT14 output assigned to IOMUX_XBAR_INOUT14
kXBARA1_OutputIomuxXbarInout15	XBARA1_OUT15 output assigned to IOMUX_XBAR_INOUT15
kXBARA1_OutputIomuxXbarInout16	XBARA1_OUT16 output assigned to IOMUX_XBAR_INOUT16
kXBARA1_OutputIomuxXbarInout17	XBARA1_OUT17 output assigned to IOMUX_XBAR_INOUT17
kXBARA1_OutputIomuxXbarInout18	XBARA1_OUT18 output assigned to IOMUX_XBAR_INOUT18
kXBARA1_OutputIomuxXbarInout19	XBARA1_OUT19 output assigned to IOMUX_XBAR_INOUT19
kXBARA1_OutputIomuxXbarInout20	XBARA1_OUT20 output assigned to IOMUX_XBAR_INOUT20
kXBARA1_OutputIomuxXbarInout21	XBARA1_OUT21 output assigned to IOMUX_XBAR_INOUT21
kXBARA1_OutputIomuxXbarInout22	XBARA1_OUT22 output assigned to IOMUX_XBAR_INOUT22
kXBARA1_OutputIomuxXbarInout23	XBARA1_OUT23 output assigned to IOMUX_XBAR_INOUT23
kXBARA1_OutputIomuxXbarInout24	XBARA1_OUT24 output assigned to IOMUX_XBAR_INOUT24
kXBARA1_OutputIomuxXbarInout25	XBARA1_OUT25 output assigned to IOMUX_XBAR_INOUT25
kXBARA1_OutputIomuxXbarInout26	XBARA1_OUT26 output assigned to IOMUX_XBAR_INOUT26
kXBARA1_OutputIomuxXbarInout27	XBARA1_OUT27 output assigned to IOMUX_XBAR_INOUT27
kXBARA1_OutputIomuxXbarInout28	XBARA1_OUT28 output assigned to IOMUX_XBAR_INOUT28
kXBARA1_OutputIomuxXbarInout29	XBARA1_OUT29 output assigned to IOMUX_XBAR_INOUT29
kXBARA1_OutputIomuxXbarInout30	XBARA1_OUT30 output assigned to IOMUX_XBAR_INOUT30
kXBARA1_OutputIomuxXbarInout31	XBARA1_OUT31 output assigned to IOMUX_XBAR_INOUT31
kXBARA1_OutputIomuxXbarInout32	XBARA1_OUT32 output assigned to IOMUX_XBAR_INOUT32
kXBARA1_OutputIomuxXbarInout33	XBARA1_OUT33 output assigned to IOMUX_XBAR_INOUT33
kXBARA1_OutputIomuxXbarInout34	XBARA1_OUT34 output assigned to IOMUX_XBAR_INOUT34
kXBARA1_OutputIomuxXbarInout35	XBARA1_OUT35 output assigned to IOMUX_XBAR_INOUT35
kXBARA1_OutputIomuxXbarInout36	XBARA1_OUT36 output assigned to IOMUX_XBAR_INOUT36
kXBARA1_OutputIomuxXbarInout37	XBARA1_OUT37 output assigned to IOMUX_XBAR_INOUT37
kXBARA1_OutputIomuxXbarInout38	XBARA1_OUT38 output assigned to IOMUX_XBAR_INOUT38
kXBARA1_OutputIomuxXbarInout39	XBARA1_OUT39 output assigned to IOMUX_XBAR_INOUT39
kXBARA1_OutputIomuxXbarInout40	XBARA1_OUT40 output assigned to IOMUX_XBAR_INOUT40
kXBARA1_OutputAcmp1Sample	XBARA1_OUT41 output assigned to ACMP1_SAMPLE
kXBARA1_OutputAcmp2Sample	XBARA1_OUT42 output assigned to ACMP2_SAMPLE
kXBARA1_OutputAcmp3Sample	XBARA1_OUT43 output assigned to ACMP3_SAMPLE
kXBARA1_OutputAcmp4Sample	XBARA1_OUT44 output assigned to ACMP4_SAMPLE
kXBARA1_OutputRESERVED45	XBARA1_OUT45 output is reserved.
kXBARA1_OutputRESERVED46	XBARA1_OUT46 output is reserved.
kXBARA1_OutputRESERVED47	XBARA1_OUT47 output is reserved.
kXBARA1_OutputRESERVED48	XBARA1_OUT48 output is reserved.
kXBARA1_OutputFlexpwm1Pwm0Exta	XBARA1_OUT49 output assigned to FLEXPWM1_PWM0_EXTA
kXBARA1_OutputFlexpwm1Pwm1Exta	XBARA1_OUT50 output assigned to FLEXPWM1_PWM1_EXTA
kXBARA1_OutputFlexpwm1Pwm2Exta	XBARA1_OUT51 output assigned to FLEXPWM1_PWM2_EXTA
kXBARA1_OutputFlexpwm1Pwm3Exta	XBARA1_OUT52 output assigned to FLEXPWM1_PWM3_EXTA
kXBARA1_OutputFlexpwm1Pwm0ExtSync	XBARA1_OUT53 output assigned to FLEXPWM1_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm1Pwm1ExtSync	XBARA1_OUT54 output assigned to FLEXPWM1_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm1Pwm2ExtSync	XBARA1_OUT55 output assigned to FLEXPWM1_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm1Pwm3ExtSync	XBARA1_OUT56 output assigned to FLEXPWM1_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm1ExtClk	XBARA1_OUT57 output assigned to FLEXPWM1_EXT_CLK
kXBARA1_OutputFlexpwm1Fault0	XBARA1_OUT58 output assigned to FLEXPWM1_FAULT0
kXBARA1_OutputFlexpwm1Fault1	XBARA1_OUT59 output assigned to FLEXPWM1_FAULT1
kXBARA1_OutputFlexpwm1234Fault2	XBARA1_OUT60 output assigned to FLEXPWM1_2_3_4_FAULT2
kXBARA1_OutputFlexpwm1234Fault3	XBARA1_OUT61 output assigned to FLEXPWM1_2_3_4_FAULT3
kXBARA1_OutputFlexpwm1ExtForce	XBARA1_OUT62 output assigned to FLEXPWM1_EXT_FORCE
kXBARA1_OutputFlexpwm2Pwm0Exta	XBARA1_OUT63 output assigned to FLEXPWM2_PWM0_EXTA
kXBARA1_OutputFlexpwm2Pwm1Exta	XBARA1_OUT64 output assigned to FLEXPWM2_PWM1_EXTA
kXBARA1_OutputFlexpwm2Pwm2Exta	XBARA1_OUT65 output assigned to FLEXPWM2_PWM2_EXTA
kXBARA1_OutputFlexpwm2Pwm3Exta	XBARA1_OUT66 output assigned to FLEXPWM2_PWM3_EXTA
kXBARA1_OutputFlexpwm2Pwm0ExtSync	XBARA1_OUT67 output assigned to FLEXPWM2_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm2Pwm1ExtSync	XBARA1_OUT68 output assigned to FLEXPWM2_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm2Pwm2ExtSync	XBARA1_OUT69 output assigned to FLEXPWM2_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm2Pwm3ExtSync	XBARA1_OUT70 output assigned to FLEXPWM2_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm2ExtClk	XBARA1_OUT71 output assigned to FLEXPWM2_EXT_CLK
kXBARA1_OutputFlexpwm2Fault0	XBARA1_OUT72 output assigned to FLEXPWM2_FAULT0
kXBARA1_OutputFlexpwm2Fault1	XBARA1_OUT73 output assigned to FLEXPWM2_FAULT1
kXBARA1_OutputFlexpwm2ExtForce	XBARA1_OUT74 output assigned to FLEXPWM2_EXT_FORCE
kXBARA1_OutputFlexpwm34Pwm0Exta	XBARA1_OUT75 output assigned to FLEXPWM3_4_PWM0_EXTA
kXBARA1_OutputFlexpwm34Pwm1Exta	XBARA1_OUT76 output assigned to FLEXPWM3_4_PWM1_EXTA
kXBARA1_OutputFlexpwm34Pwm2Exta	XBARA1_OUT77 output assigned to FLEXPWM3_4_PWM2_EXTA
kXBARA1_OutputFlexpwm34Pwm3Exta	XBARA1_OUT78 output assigned to FLEXPWM3_4_PWM3_EXTA
kXBARA1_OutputFlexpwm34ExtClk	XBARA1_OUT79 output assigned to FLEXPWM3_4_EXT_CLK
kXBARA1_OutputFlexpwm3Pwm0ExtSync	XBARA1_OUT80 output assigned to FLEXPWM3_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm3Pwm1ExtSync	XBARA1_OUT81 output assigned to FLEXPWM3_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm3Pwm2ExtSync	XBARA1_OUT82 output assigned to FLEXPWM3_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm3Pwm3ExtSync	XBARA1_OUT83 output assigned to FLEXPWM3_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm3Fault0	XBARA1_OUT84 output assigned to FLEXPWM3_FAULT0
kXBARA1_OutputFlexpwm3Fault1	XBARA1_OUT85 output assigned to FLEXPWM3_FAULT1
kXBARA1_OutputFlexpwm3ExtForce	XBARA1_OUT86 output assigned to FLEXPWM3_EXT_FORCE
kXBARA1_OutputFlexpwm4Pwm0ExtSync	XBARA1_OUT87 output assigned to FLEXPWM4_PWM0_EXT_SYNC
kXBARA1_OutputFlexpwm4Pwm1ExtSync	XBARA1_OUT88 output assigned to FLEXPWM4_PWM1_EXT_SYNC
kXBARA1_OutputFlexpwm4Pwm2ExtSync	XBARA1_OUT89 output assigned to FLEXPWM4_PWM2_EXT_SYNC
kXBARA1_OutputFlexpwm4Pwm3ExtSync	XBARA1_OUT90 output assigned to FLEXPWM4_PWM3_EXT_SYNC
kXBARA1_OutputFlexpwm4Fault0	XBARA1_OUT91 output assigned to FLEXPWM4_FAULT0
kXBARA1_OutputFlexpwm4Fault1	XBARA1_OUT92 output assigned to FLEXPWM4_FAULT1
kXBARA1_OutputFlexpwm4ExtForce	XBARA1_OUT93 output assigned to FLEXPWM4_EXT_FORCE
kXBARA1_OutputRESERVED94	XBARA1_OUT94 output is reserved.
kXBARA1_OutputRESERVED95	XBARA1_OUT95 output is reserved.
kXBARA1_OutputRESERVED96	XBARA1_OUT96 output is reserved.
kXBARA1_OutputRESERVED97	XBARA1_OUT97 output is reserved.
kXBARA1_OutputRESERVED98	XBARA1_OUT98 output is reserved.
kXBARA1_OutputRESERVED99	XBARA1_OUT99 output is reserved.
kXBARA1_OutputRESERVED100	XBARA1_OUT100 output is reserved.
kXBARA1_OutputRESERVED101	XBARA1_OUT101 output is reserved.
kXBARA1_OutputRESERVED102	XBARA1_OUT102 output is reserved.
kXBARA1_OutputRESERVED103	XBARA1_OUT103 output is reserved.
kXBARA1_OutputRESERVED104	XBARA1_OUT104 output is reserved.
kXBARA1_OutputRESERVED105	XBARA1_OUT105 output is reserved.
kXBARA1_OutputRESERVED106	XBARA1_OUT106 output is reserved.
kXBARA1_OutputRESERVED107	XBARA1_OUT107 output is reserved.
kXBARA1_OutputDec1Phasea	XBARA1_OUT108 output assigned to DEC1_PHASEA
kXBARA1_OutputDec1Phaseb	XBARA1_OUT109 output assigned to DEC1_PHASEB
kXBARA1_OutputDec1Index	XBARA1_OUT110 output assigned to DEC1_INDEX
kXBARA1_OutputDec1Home	XBARA1_OUT111 output assigned to DEC1_HOME
kXBARA1_OutputDec1Trigger	XBARA1_OUT112 output assigned to DEC1_TRIGGER
kXBARA1_OutputDec2Phasea	XBARA1_OUT113 output assigned to DEC2_PHASEA
kXBARA1_OutputDec2Phaseb	XBARA1_OUT114 output assigned to DEC2_PHASEB
kXBARA1_OutputDec2Index	XBARA1_OUT115 output assigned to DEC2_INDEX
kXBARA1_OutputDec2Home	XBARA1_OUT116 output assigned to DEC2_HOME
kXBARA1_OutputDec2Trigger	XBARA1_OUT117 output assigned to DEC2_TRIGGER
kXBARA1_OutputDec3Phasea	XBARA1_OUT118 output assigned to DEC3_PHASEA
kXBARA1_OutputDec3Phaseb	XBARA1_OUT119 output assigned to DEC3_PHASEB
kXBARA1_OutputDec3Index	XBARA1_OUT120 output assigned to DEC3_INDEX
kXBARA1_OutputDec3Home	XBARA1_OUT121 output assigned to DEC3_HOME
kXBARA1_OutputDec3Trigger	XBARA1_OUT122 output assigned to DEC3_TRIGGER
kXBARA1_OutputDec4Phasea	XBARA1_OUT123 output assigned to DEC4_PHASEA
kXBARA1_OutputDec4Phaseb	XBARA1_OUT124 output assigned to DEC4_PHASEB
kXBARA1_OutputDec4Index	XBARA1_OUT125 output assigned to DEC4_INDEX
kXBARA1_OutputDec4Home	XBARA1_OUT126 output assigned to DEC4_HOME
kXBARA1_OutputDec4Trigger	XBARA1_OUT127 output assigned to DEC4_TRIGGER
kXBARA1_OutputRESERVED128	XBARA1_OUT128 output is reserved.
kXBARA1_OutputRESERVED129	XBARA1_OUT129 output is reserved.
kXBARA1_OutputRESERVED130	XBARA1_OUT130 output is reserved.
kXBARA1_OutputRESERVED131	XBARA1_OUT131 output is reserved.
kXBARA1_OutputCan1	XBARA1_OUT132 output assigned to CAN1
kXBARA1_OutputCan2	XBARA1_OUT133 output assigned to CAN2
kXBARA1_OutputRESERVED134	XBARA1_OUT134 output is reserved.
kXBARA1_OutputRESERVED135	XBARA1_OUT135 output is reserved.
kXBARA1_OutputRESERVED136	XBARA1_OUT136 output is reserved.
kXBARA1_OutputRESERVED137	XBARA1_OUT137 output is reserved.
kXBARA1_OutputQtimer1Timer0	XBARA1_OUT138 output assigned to QTIMER1_TIMER0
kXBARA1_OutputQtimer1Timer1	XBARA1_OUT139 output assigned to QTIMER1_TIMER1
kXBARA1_OutputQtimer1Timer2	XBARA1_OUT140 output assigned to QTIMER1_TIMER2
kXBARA1_OutputQtimer1Timer3	XBARA1_OUT141 output assigned to QTIMER1_TIMER3
kXBARA1_OutputQtimer2Timer0	XBARA1_OUT142 output assigned to QTIMER2_TIMER0
kXBARA1_OutputQtimer2Timer1	XBARA1_OUT143 output assigned to QTIMER2_TIMER1
kXBARA1_OutputQtimer2Timer2	XBARA1_OUT144 output assigned to QTIMER2_TIMER2
kXBARA1_OutputQtimer2Timer3	XBARA1_OUT145 output assigned to QTIMER2_TIMER3
kXBARA1_OutputQtimer3Timer0	XBARA1_OUT146 output assigned to QTIMER3_TIMER0
kXBARA1_OutputQtimer3Timer1	XBARA1_OUT147 output assigned to QTIMER3_TIMER1
kXBARA1_OutputQtimer3Timer2	XBARA1_OUT148 output assigned to QTIMER3_TIMER2
kXBARA1_OutputQtimer3Timer3	XBARA1_OUT149 output assigned to QTIMER3_TIMER3
kXBARA1_OutputQtimer4Timer0	XBARA1_OUT150 output assigned to QTIMER4_TIMER0
kXBARA1_OutputQtimer4Timer1	XBARA1_OUT151 output assigned to QTIMER4_TIMER1
kXBARA1_OutputQtimer4Timer2	XBARA1_OUT152 output assigned to QTIMER4_TIMER2
kXBARA1_OutputQtimer4Timer3	XBARA1_OUT153 output assigned to QTIMER4_TIMER3
kXBARA1_OutputEwmEwmIn	XBARA1_OUT154 output assigned to EWM_EWM_IN
kXBARA1_OutputAdcEtc0Coco0	XBARA1_OUT155 output assigned to ADC_ETC0_COCO0
kXBARA1_OutputAdcEtc0Coco1	XBARA1_OUT156 output assigned to ADC_ETC0_COCO1
kXBARA1_OutputAdcEtc0Coco2	XBARA1_OUT157 output assigned to ADC_ETC0_COCO2
kXBARA1_OutputAdcEtc0Coco3	XBARA1_OUT158 output assigned to ADC_ETC0_COCO3
kXBARA1_OutputAdcEtc1Coco0	XBARA1_OUT159 output assigned to ADC_ETC1_COCO0
kXBARA1_OutputAdcEtc1Coco1	XBARA1_OUT160 output assigned to ADC_ETC1_COCO1
kXBARA1_OutputAdcEtc1Coco2	XBARA1_OUT161 output assigned to ADC_ETC1_COCO2
kXBARA1_OutputAdcEtc1Coco3	XBARA1_OUT162 output assigned to ADC_ETC1_COCO3
kXBARA1_OutputRESERVED163	XBARA1_OUT163 output is reserved.
kXBARA1_OutputRESERVED164	XBARA1_OUT164 output is reserved.
kXBARA1_OutputRESERVED165	XBARA1_OUT165 output is reserved.
kXBARA1_OutputRESERVED166	XBARA1_OUT166 output is reserved.
kXBARA1_OutputRESERVED167	XBARA1_OUT167 output is reserved.
kXBARA1_OutputRESERVED168	XBARA1_OUT168 output is reserved.
kXBARA1_OutputRESERVED169	XBARA1_OUT169 output is reserved.
kXBARA1_OutputRESERVED170	XBARA1_OUT170 output is reserved.
kXBARA1_OutputFlexio1TrigIn0	XBARA1_OUT171 output assigned to FLEXIO1_TRIG_IN0
kXBARA1_OutputFlexio1TrigIn1	XBARA1_OUT172 output assigned to FLEXIO1_TRIG_IN1
kXBARA1_OutputFlexio2TrigIn0	XBARA1_OUT173 output assigned to FLEXIO2_TRIG_IN0
kXBARA1_OutputFlexio2TrigIn1	XBARA1_OUT174 output assigned to FLEXIO2_TRIG_IN1
kXBARB2_OutputAoi1In00	XBARB2_OUT0 output assigned to AOI1_IN00
kXBARB2_OutputAoi1In01	XBARB2_OUT1 output assigned to AOI1_IN01
kXBARB2_OutputAoi1In02	XBARB2_OUT2 output assigned to AOI1_IN02
kXBARB2_OutputAoi1In03	XBARB2_OUT3 output assigned to AOI1_IN03
kXBARB2_OutputAoi1In04	XBARB2_OUT4 output assigned to AOI1_IN04
kXBARB2_OutputAoi1In05	XBARB2_OUT5 output assigned to AOI1_IN05
kXBARB2_OutputAoi1In06	XBARB2_OUT6 output assigned to AOI1_IN06
kXBARB2_OutputAoi1In07	XBARB2_OUT7 output assigned to AOI1_IN07
kXBARB2_OutputAoi1In08	XBARB2_OUT8 output assigned to AOI1_IN08
kXBARB2_OutputAoi1In09	XBARB2_OUT9 output assigned to AOI1_IN09
kXBARB2_OutputAoi1In10	XBARB2_OUT10 output assigned to AOI1_IN10
kXBARB2_OutputAoi1In11	XBARB2_OUT11 output assigned to AOI1_IN11
kXBARB2_OutputAoi1In12	XBARB2_OUT12 output assigned to AOI1_IN12
kXBARB2_OutputAoi1In13	XBARB2_OUT13 output assigned to AOI1_IN13
kXBARB2_OutputAoi1In14	XBARB2_OUT14 output assigned to AOI1_IN14
kXBARB2_OutputAoi1In15	XBARB2_OUT15 output assigned to AOI1_IN15
kXBARB3_OutputAoi2In00	XBARB3_OUT0 output assigned to AOI2_IN00
kXBARB3_OutputAoi2In01	XBARB3_OUT1 output assigned to AOI2_IN01
kXBARB3_OutputAoi2In02	XBARB3_OUT2 output assigned to AOI2_IN02
kXBARB3_OutputAoi2In03	XBARB3_OUT3 output assigned to AOI2_IN03
kXBARB3_OutputAoi2In04	XBARB3_OUT4 output assigned to AOI2_IN04
kXBARB3_OutputAoi2In05	XBARB3_OUT5 output assigned to AOI2_IN05
kXBARB3_OutputAoi2In06	XBARB3_OUT6 output assigned to AOI2_IN06
kXBARB3_OutputAoi2In07	XBARB3_OUT7 output assigned to AOI2_IN07
kXBARB3_OutputAoi2In08	XBARB3_OUT8 output assigned to AOI2_IN08
kXBARB3_OutputAoi2In09	XBARB3_OUT9 output assigned to AOI2_IN09
kXBARB3_OutputAoi2In10	XBARB3_OUT10 output assigned to AOI2_IN10
kXBARB3_OutputAoi2In11	XBARB3_OUT11 output assigned to AOI2_IN11
kXBARB3_OutputAoi2In12	XBARB3_OUT12 output assigned to AOI2_IN12
kXBARB3_OutputAoi2In13	XBARB3_OUT13 output assigned to AOI2_IN13
kXBARB3_OutputAoi2In14	XBARB3_OUT14 output assigned to AOI2_IN14
kXBARB3_OutputAoi2In15	XBARB3_OUT15 output assigned to AOI2_IN15