Mu

Macros
#define	MU_CR_NMI_MASK   0U

Driver version
enum	_mu_status_flags {   kMU_Tx0EmptyFlag = (1U << (MU_SR_TEn_SHIFT + 3U)) , kMU_Tx1EmptyFlag = (1U << (MU_SR_TEn_SHIFT + 2U)) , kMU_Tx2EmptyFlag = (1U << (MU_SR_TEn_SHIFT + 1U)) , kMU_Tx3EmptyFlag = (1U << (MU_SR_TEn_SHIFT + 0U)) ,   kMU_Rx0FullFlag = (1U << (MU_SR_RFn_SHIFT + 3U)) , kMU_Rx1FullFlag = (1U << (MU_SR_RFn_SHIFT + 2U)) , kMU_Rx2FullFlag = (1U << (MU_SR_RFn_SHIFT + 1U)) , kMU_Rx3FullFlag = (1U << (MU_SR_RFn_SHIFT + 0U)) ,   kMU_GenInt0Flag = (1U << (MU_SR_GIPn_SHIFT + 3U)) , kMU_GenInt1Flag = (1U << (MU_SR_GIPn_SHIFT + 2U)) , kMU_GenInt2Flag = (1U << (MU_SR_GIPn_SHIFT + 1U)) , kMU_GenInt3Flag = (1U << (MU_SR_GIPn_SHIFT + 0U)) ,   kMU_EventPendingFlag = MU_SR_EP_MASK , kMU_FlagsUpdatingFlag = MU_SR_FUP_MASK }
	MU status flags. More...
enum	_mu_interrupt_enable {   kMU_Tx0EmptyInterruptEnable = (1U << (MU_CR_TIEn_SHIFT + 3U)) , kMU_Tx1EmptyInterruptEnable = (1U << (MU_CR_TIEn_SHIFT + 2U)) , kMU_Tx2EmptyInterruptEnable = (1U << (MU_CR_TIEn_SHIFT + 1U)) , kMU_Tx3EmptyInterruptEnable = (1U << (MU_CR_TIEn_SHIFT + 0U)) ,   kMU_Rx0FullInterruptEnable = (1U << (MU_CR_RIEn_SHIFT + 3U)) , kMU_Rx1FullInterruptEnable = (1U << (MU_CR_RIEn_SHIFT + 2U)) , kMU_Rx2FullInterruptEnable = (1U << (MU_CR_RIEn_SHIFT + 1U)) , kMU_Rx3FullInterruptEnable = (1U << (MU_CR_RIEn_SHIFT + 0U)) ,   kMU_GenInt0InterruptEnable = (int)(1U << (MU_CR_GIEn_SHIFT + 3U)) , kMU_GenInt1InterruptEnable = (1U << (MU_CR_GIEn_SHIFT + 2U)) , kMU_GenInt2InterruptEnable = (1U << (MU_CR_GIEn_SHIFT + 1U)) , kMU_GenInt3InterruptEnable = (1U << (MU_CR_GIEn_SHIFT + 0U)) }
	MU interrupt source to enable. More...
enum	_mu_interrupt_trigger {   kMU_NmiInterruptTrigger = MU_CR_NMI_MASK , kMU_GenInt0InterruptTrigger = (1U << (MU_CR_GIRn_SHIFT + 3U)) , kMU_GenInt1InterruptTrigger = (1U << (MU_CR_GIRn_SHIFT + 2U)) , kMU_GenInt2InterruptTrigger = (1U << (MU_CR_GIRn_SHIFT + 1U)) ,   kMU_GenInt3InterruptTrigger = (1U << (MU_CR_GIRn_SHIFT + 0U)) }
	MU interrupt that could be triggered to the other core. More...
enum	_mu_msg_reg_index { kMU_MsgReg0 = 0 , kMU_MsgReg1 , kMU_MsgReg2 , kMU_MsgReg3 }
	MU message register.
typedef enum _mu_msg_reg_index	mu_msg_reg_index_t
	MU message register.
#define	FSL_MU_DRIVER_VERSION   (MAKE_VERSION(2, 1, 1))
	MU driver version.

MU initialization.
void	MU_Init (MU_Type *base)
	Initializes the MU module.
void	MU_Deinit (MU_Type *base)
	De-initializes the MU module.

MU Message
void	MU_SendMsg (MU_Type *base, uint32_t regIndex, uint32_t msg)
	Blocks to send a message.
uint32_t	MU_ReceiveMsg (MU_Type *base, uint32_t regIndex)
	Blocks to receive a message.

MU Flags
void	MU_SetFlags (MU_Type *base, uint32_t flags)
	Blocks setting the 3-bit MU flags reflect on the other MU side.

Status and Interrupt.
status_t	MU_TriggerInterrupts (MU_Type *base, uint32_t mask)
	Triggers interrupts to the other core.

MU misc functions
void	MU_BootCoreB (MU_Type *base, mu_core_boot_mode_t mode)
	Boots the core at B side.
void	MU_BootOtherCore (MU_Type *base, mu_core_boot_mode_t mode)
	Boots the other core.
void	MU_HardwareResetOtherCore (MU_Type *base, bool waitReset, bool holdReset, mu_core_boot_mode_t bootMode)
	Hardware reset the other core.

Detailed Description

Enumeration Type Documentation

_mu_interrupt_enable

enum _mu_interrupt_enable

MU interrupt source to enable.

Enumerator
kMU_Tx0EmptyInterruptEnable	TX0 empty.
kMU_Tx1EmptyInterruptEnable	TX1 empty.
kMU_Tx2EmptyInterruptEnable	TX2 empty.
kMU_Tx3EmptyInterruptEnable	TX3 empty.
kMU_Rx0FullInterruptEnable	RX0 full.
kMU_Rx1FullInterruptEnable	RX1 full.
kMU_Rx2FullInterruptEnable	RX2 full.
kMU_Rx3FullInterruptEnable	RX3 full.
kMU_GenInt0InterruptEnable	General purpose interrupt 0.
kMU_GenInt1InterruptEnable	General purpose interrupt 1.
kMU_GenInt2InterruptEnable	General purpose interrupt 2.
kMU_GenInt3InterruptEnable	General purpose interrupt 3.

_mu_interrupt_trigger

enum _mu_interrupt_trigger

MU interrupt that could be triggered to the other core.

Enumerator
kMU_NmiInterruptTrigger	NMI interrupt.
kMU_GenInt0InterruptTrigger	General purpose interrupt 0.
kMU_GenInt1InterruptTrigger	General purpose interrupt 1.
kMU_GenInt2InterruptTrigger	General purpose interrupt 2.
kMU_GenInt3InterruptTrigger	General purpose interrupt 3.

_mu_status_flags

enum _mu_status_flags

MU status flags.

Enumerator
kMU_Tx0EmptyFlag	TX0 empty.
kMU_Tx1EmptyFlag	TX1 empty.
kMU_Tx2EmptyFlag	TX2 empty.
kMU_Tx3EmptyFlag	TX3 empty.
kMU_Rx0FullFlag	RX0 full.
kMU_Rx1FullFlag	RX1 full.
kMU_Rx2FullFlag	RX2 full.
kMU_Rx3FullFlag	RX3 full.
kMU_GenInt0Flag	General purpose interrupt 0 pending.
kMU_GenInt1Flag	General purpose interrupt 1 pending.
kMU_GenInt2Flag	General purpose interrupt 2 pending.
kMU_GenInt3Flag	General purpose interrupt 3 pending.
kMU_EventPendingFlag	MU event pending.
kMU_FlagsUpdatingFlag	MU flags update is on-going.

Function Documentation

MU_BootCoreB()

void MU_BootCoreB	(	MU_Type *	base,
		mu_core_boot_mode_t	mode
	)

Boots the core at B side.

This function sets the B side core's boot configuration and releases the core from reset.

Parameters

base	MU peripheral base address.
mode	Core B boot mode.

Note

Only MU side A can use this function.

brief Boots the core at B side.

This function sets the B side core's boot configuration and releases the core from reset.

param base MU peripheral base address. param mode Core B boot mode. note Only MU side A can use this function.

MU_BootOtherCore()

void MU_BootOtherCore	(	MU_Type *	base,
		mu_core_boot_mode_t	mode
	)

Boots the other core.

This function boots the other core with a boot configuration.

Parameters

base	MU peripheral base address.
mode	The other core boot mode.

brief Boots the other core.

This function boots the other core with a boot configuration.

param base MU peripheral base address. param mode The other core boot mode.

MU_Deinit()

void MU_Deinit

(

MU_Type *

base

)

De-initializes the MU module.

This function disables the MU clock only.

Parameters

base	MU peripheral base address.

brief De-initializes the MU module.

This function disables the MU clock only.

param base MU peripheral base address.

MU_HardwareResetOtherCore()

void MU_HardwareResetOtherCore	(	MU_Type *	base,
		bool	waitReset,
		bool	holdReset,
		mu_core_boot_mode_t	bootMode
	)

Hardware reset the other core.

This function resets the other core, the other core could mask the hardware reset by calling MU_MaskHardwareReset. The hardware reset mask feature is only available for some platforms. This function could be used together with MU_BootOtherCore to control the other core reset workflow.

Example 1: Reset the other core, and no hold reset

MU_HardwareResetOtherCore(MU_A, true, false, bootMode);

In this example, the core at MU side B will reset with the specified boot mode.

Example 2: Reset the other core and hold it, then boot the other core later.

 Here the other core enters reset, and the reset is hold
MU_HardwareResetOtherCore(MU_A, true, true, modeDontCare);
 Current core boot the other core when necessary.
MU_BootOtherCore(MU_A, bootMode);

Parameters

base	MU peripheral base address.
waitReset	Wait the other core enters reset. true: Wait until the other core enters reset, if the other core has masked the hardware reset, then this function will be blocked. false: Don't wait the reset.
holdReset	Hold the other core reset or not. true: Hold the other core in reset, this function returns directly when the other core enters reset. false: Don't hold the other core in reset, this function waits until the other core out of reset.
bootMode	Boot mode of the other core, if holdReset is true, this parameter is useless.

brief Hardware reset the other core.

This function resets the other core, the other core could mask the hardware reset by calling ref MU_MaskHardwareReset. The hardware reset mask feature is only available for some platforms. This function could be used together with MU_BootOtherCore to control the other core reset workflow.

Example 1: Reset the other core, and no hold reset code MU_HardwareResetOtherCore(MU_A, true, false, bootMode); endcode In this example, the core at MU side B will reset with the specified boot mode.

Example 2: Reset the other core and hold it, then boot the other core later. code Here the other core enters reset, and the reset is hold MU_HardwareResetOtherCore(MU_A, true, true, modeDontCare); Current core boot the other core when necessary. MU_BootOtherCore(MU_A, bootMode); endcode

param base MU peripheral base address. param waitReset Wait the other core enters reset.

• true: Wait until the other core enters reset, if the other core has masked the hardware reset, then this function will be blocked.
• false: Don't wait the reset. param holdReset Hold the other core reset or not.
• true: Hold the other core in reset, this function returns directly when the other core enters reset.
• false: Don't hold the other core in reset, this function waits until the other core out of reset. param bootMode Boot mode of the other core, if p holdReset is true, this parameter is useless.

MU_Init()

void MU_Init

(

MU_Type *

base

)

Initializes the MU module.

This function enables the MU clock only.

Parameters

base	MU peripheral base address.

brief Initializes the MU module.

This function enables the MU clock only.

param base MU peripheral base address.

MU_ReceiveMsg()

uint32_t MU_ReceiveMsg	(	MU_Type *	base,
		uint32_t	regIndex
	)

Blocks to receive a message.

This function waits until the RX register is full and receives the message.

Parameters

base	MU peripheral base address.
regIndex	MU message register, see mu_msg_reg_index_t

Returns

The received message.

brief Blocks to receive a message.

This function waits until the RX register is full and receives the message.

param base MU peripheral base address. param regIndex RX register index. return The received message.

MU_SendMsg()

void MU_SendMsg	(	MU_Type *	base,
		uint32_t	regIndex,
		uint32_t	msg
	)

Blocks to send a message.

This function waits until the TX register is empty and sends the message.

Parameters

base	MU peripheral base address.
regIndex	MU message register, see mu_msg_reg_index_t
msg	Message to send.

brief Blocks to send a message.

This function waits until the TX register is empty and sends the message.

param base MU peripheral base address. param regIndex TX register index. param msg Message to send.

MU_SetFlags()

void MU_SetFlags	(	MU_Type *	base,
		uint32_t	flags
	)

Blocks setting the 3-bit MU flags reflect on the other MU side.

This function blocks setting the 3-bit MU flags. Every time the 3-bit MU flags are changed, the status flag kMU_FlagsUpdatingFlag asserts indicating the 3-bit MU flags are updating to the other side. After the 3-bit MU flags are updated, the status flag kMU_FlagsUpdatingFlag is cleared by hardware. During the flags updating period, the flags cannot be changed. This function waits for the MU status flag kMU_FlagsUpdatingFlag cleared and sets the 3-bit MU flags.

Parameters

base	MU peripheral base address.
flags	The 3-bit MU flags to set.

brief Blocks setting the 3-bit MU flags reflect on the other MU side.

This function blocks setting the 3-bit MU flags. Every time the 3-bit MU flags are changed, the status flag kMU_FlagsUpdatingFlag asserts indicating the 3-bit MU flags are updating to the other side. After the 3-bit MU flags are updated, the status flag kMU_FlagsUpdatingFlag is cleared by hardware. During the flags updating period, the flags cannot be changed. This function waits for the MU status flag kMU_FlagsUpdatingFlag cleared and sets the 3-bit MU flags.

param base MU peripheral base address. param flags The 3-bit MU flags to set.

MU_TriggerInterrupts()

status_t MU_TriggerInterrupts	(	MU_Type *	base,
		uint32_t	mask
	)

Triggers interrupts to the other core.

This function triggers the specific interrupts to the other core. The interrupts to trigger are passed in as bit mask. See _mu_interrupt_trigger. The MU should not trigger an interrupt to the other core when the previous interrupt has not been processed by the other core. This function checks whether the previous interrupts have been processed. If not, it returns an error.

if (kStatus_Success != MU_TriggerInterrupts(base, kMU_GenInt0InterruptTrigger | kMU_GenInt2InterruptTrigger))
{
     Previous general purpose interrupt 0 or general purpose interrupt 2
     has not been processed by the other core.
}

Parameters

base	MU peripheral base address.
mask	Bit mask of the interrupts to trigger. See _mu_interrupt_trigger.

Return values

kStatus_Success	Interrupts have been triggered successfully.
kStatus_Fail	Previous interrupts have not been accepted.

brief Triggers interrupts to the other core.

This function triggers the specific interrupts to the other core. The interrupts to trigger are passed in as bit mask. See _mu_interrupt_trigger. The MU should not trigger an interrupt to the other core when the previous interrupt has not been processed by the other core. This function checks whether the previous interrupts have been processed. If not, it returns an error.

code if (kStatus_Success != MU_TriggerInterrupts(base, kMU_GenInt0InterruptTrigger | kMU_GenInt2InterruptTrigger)) { Previous general purpose interrupt 0 or general purpose interrupt 2 has not been processed by the other core. } endcode

param base MU peripheral base address. param mask Bit mask of the interrupts to trigger. See _mu_interrupt_trigger. retval kStatus_Success Interrupts have been triggered successfully. retval kStatus_Fail Previous interrupts have not been accepted.