RTEMS 6.1-rc6
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Modules | Data Structures | Macros

Modules

 XRDC2 Register Masks
 

Data Structures

struct  XRDC2_Type
 

Macros

#define XRDC2_D0_BASE   (0x40CE0000u)
 
#define XRDC2_D0   ((XRDC2_Type *)XRDC2_D0_BASE)
 
#define XRDC2_D1_BASE   (0x40CD0000u)
 
#define XRDC2_D1   ((XRDC2_Type *)XRDC2_D1_BASE)
 
#define XRDC2_BASE_ADDRS   { XRDC2_D0_BASE, XRDC2_D1_BASE }
 
#define XRDC2_BASE_PTRS   { XRDC2_D0, XRDC2_D1 }
 
#define XRDC2_D0_BASE   (0x40CE0000u)
 
#define XRDC2_D0   ((XRDC2_Type *)XRDC2_D0_BASE)
 
#define XRDC2_D1_BASE   (0x40CD0000u)
 
#define XRDC2_D1   ((XRDC2_Type *)XRDC2_D1_BASE)
 
#define XRDC2_BASE_ADDRS   { XRDC2_D0_BASE, XRDC2_D1_BASE }
 
#define XRDC2_BASE_PTRS   { XRDC2_D0, XRDC2_D1 }
 

Detailed Description

Macro Definition Documentation

◆ XRDC2_BASE_ADDRS [1/2]

#define XRDC2_BASE_ADDRS   { XRDC2_D0_BASE, XRDC2_D1_BASE }

Array initializer of XRDC2 peripheral base addresses

◆ XRDC2_BASE_ADDRS [2/2]

#define XRDC2_BASE_ADDRS   { XRDC2_D0_BASE, XRDC2_D1_BASE }

Array initializer of XRDC2 peripheral base addresses

◆ XRDC2_BASE_PTRS [1/2]

#define XRDC2_BASE_PTRS   { XRDC2_D0, XRDC2_D1 }

Array initializer of XRDC2 peripheral base pointers

◆ XRDC2_BASE_PTRS [2/2]

#define XRDC2_BASE_PTRS   { XRDC2_D0, XRDC2_D1 }

Array initializer of XRDC2 peripheral base pointers

◆ XRDC2_D0 [1/2]

#define XRDC2_D0   ((XRDC2_Type *)XRDC2_D0_BASE)

Peripheral XRDC2_D0 base pointer

◆ XRDC2_D0 [2/2]

#define XRDC2_D0   ((XRDC2_Type *)XRDC2_D0_BASE)

Peripheral XRDC2_D0 base pointer

◆ XRDC2_D0_BASE [1/2]

#define XRDC2_D0_BASE   (0x40CE0000u)

Peripheral XRDC2_D0 base address

◆ XRDC2_D0_BASE [2/2]

#define XRDC2_D0_BASE   (0x40CE0000u)

Peripheral XRDC2_D0 base address

◆ XRDC2_D1 [1/2]

#define XRDC2_D1   ((XRDC2_Type *)XRDC2_D1_BASE)

Peripheral XRDC2_D1 base pointer

◆ XRDC2_D1 [2/2]

#define XRDC2_D1   ((XRDC2_Type *)XRDC2_D1_BASE)

Peripheral XRDC2_D1 base pointer

◆ XRDC2_D1_BASE [1/2]

#define XRDC2_D1_BASE   (0x40CD0000u)

Peripheral XRDC2_D1 base address

◆ XRDC2_D1_BASE [2/2]

#define XRDC2_D1_BASE   (0x40CD0000u)

Peripheral XRDC2_D1 base address