RTEMS 6.1-rc6
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Macros | |
#define | TIM_CLOCKSOURCE_INTERNAL TIM_SMCR_ETPS_0 |
#define | TIM_CLOCKSOURCE_ETRMODE1 TIM_TS_ETRF |
#define | TIM_CLOCKSOURCE_ETRMODE2 TIM_SMCR_ETPS_1 |
#define | TIM_CLOCKSOURCE_TI1ED TIM_TS_TI1F_ED |
#define | TIM_CLOCKSOURCE_TI1 TIM_TS_TI1FP1 |
#define | TIM_CLOCKSOURCE_TI2 TIM_TS_TI2FP2 |
#define | TIM_CLOCKSOURCE_ITR0 TIM_TS_ITR0 |
#define | TIM_CLOCKSOURCE_ITR1 TIM_TS_ITR1 |
#define | TIM_CLOCKSOURCE_ITR2 TIM_TS_ITR2 |
#define | TIM_CLOCKSOURCE_ITR3 TIM_TS_ITR3 |
#define | TIM_CLOCKSOURCE_ITR4 TIM_TS_ITR4 |
#define | TIM_CLOCKSOURCE_ITR5 TIM_TS_ITR5 |
#define | TIM_CLOCKSOURCE_ITR6 TIM_TS_ITR6 |
#define | TIM_CLOCKSOURCE_ITR7 TIM_TS_ITR7 |
#define | TIM_CLOCKSOURCE_ITR8 TIM_TS_ITR8 |
#define TIM_CLOCKSOURCE_ETRMODE1 TIM_TS_ETRF |
External clock source mode 1 (ETRF)
#define TIM_CLOCKSOURCE_ETRMODE2 TIM_SMCR_ETPS_1 |
External clock source mode 2
#define TIM_CLOCKSOURCE_INTERNAL TIM_SMCR_ETPS_0 |
Internal clock source
#define TIM_CLOCKSOURCE_ITR0 TIM_TS_ITR0 |
External clock source mode 1 (ITR0)
#define TIM_CLOCKSOURCE_ITR1 TIM_TS_ITR1 |
External clock source mode 1 (ITR1)
#define TIM_CLOCKSOURCE_ITR2 TIM_TS_ITR2 |
External clock source mode 1 (ITR2)
#define TIM_CLOCKSOURCE_ITR3 TIM_TS_ITR3 |
External clock source mode 1 (ITR3)
#define TIM_CLOCKSOURCE_ITR4 TIM_TS_ITR4 |
External clock source mode 1 (ITR4)
#define TIM_CLOCKSOURCE_ITR5 TIM_TS_ITR5 |
External clock source mode 1 (ITR5)
#define TIM_CLOCKSOURCE_ITR6 TIM_TS_ITR6 |
External clock source mode 1 (ITR6)
#define TIM_CLOCKSOURCE_ITR7 TIM_TS_ITR7 |
External clock source mode 1 (ITR7)
#define TIM_CLOCKSOURCE_ITR8 TIM_TS_ITR8 |
External clock source mode 1 (ITR8)
#define TIM_CLOCKSOURCE_TI1 TIM_TS_TI1FP1 |
External clock source mode 1 (TTI1FP1)
#define TIM_CLOCKSOURCE_TI1ED TIM_TS_TI1F_ED |
External clock source mode 1 (TTI1FP1 + edge detect.)
#define TIM_CLOCKSOURCE_TI2 TIM_TS_TI2FP2 |
External clock source mode 1 (TTI2FP2)