RTEMS 6.1-rc6
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TEMPSENSE0 - Tempsensor Control Register 0 | |
#define | TEMPMON_TEMPSENSE0_POWER_DOWN_MASK (0x1U) |
#define | TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT (0U) |
#define | TEMPMON_TEMPSENSE0_POWER_DOWN(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK) |
#define | TEMPMON_TEMPSENSE0_MEASURE_TEMP_MASK (0x2U) |
#define | TEMPMON_TEMPSENSE0_MEASURE_TEMP_SHIFT (1U) |
#define | TEMPMON_TEMPSENSE0_MEASURE_TEMP(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_MEASURE_TEMP_MASK) |
#define | TEMPMON_TEMPSENSE0_FINISHED_MASK (0x4U) |
#define | TEMPMON_TEMPSENSE0_FINISHED_SHIFT (2U) |
#define | TEMPMON_TEMPSENSE0_FINISHED(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_FINISHED_MASK) |
#define | TEMPMON_TEMPSENSE0_TEMP_CNT_MASK (0xFFF00U) |
#define | TEMPMON_TEMPSENSE0_TEMP_CNT_SHIFT (8U) |
#define | TEMPMON_TEMPSENSE0_TEMP_CNT(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_TEMP_CNT_MASK) |
#define | TEMPMON_TEMPSENSE0_ALARM_VALUE_MASK (0xFFF00000U) |
#define | TEMPMON_TEMPSENSE0_ALARM_VALUE_SHIFT (20U) |
#define | TEMPMON_TEMPSENSE0_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE0_ALARM_VALUE_MASK) |
TEMPSENSE0_SET - Tempsensor Control Register 0 | |
#define | TEMPMON_TEMPSENSE0_SET_POWER_DOWN_MASK (0x1U) |
#define | TEMPMON_TEMPSENSE0_SET_POWER_DOWN_SHIFT (0U) |
#define | TEMPMON_TEMPSENSE0_SET_POWER_DOWN(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_SET_POWER_DOWN_MASK) |
#define | TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_MASK (0x2U) |
#define | TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_SHIFT (1U) |
#define | TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_MASK) |
#define | TEMPMON_TEMPSENSE0_SET_FINISHED_MASK (0x4U) |
#define | TEMPMON_TEMPSENSE0_SET_FINISHED_SHIFT (2U) |
#define | TEMPMON_TEMPSENSE0_SET_FINISHED(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_SET_FINISHED_MASK) |
#define | TEMPMON_TEMPSENSE0_SET_TEMP_CNT_MASK (0xFFF00U) |
#define | TEMPMON_TEMPSENSE0_SET_TEMP_CNT_SHIFT (8U) |
#define | TEMPMON_TEMPSENSE0_SET_TEMP_CNT(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_SET_TEMP_CNT_MASK) |
#define | TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_MASK (0xFFF00000U) |
#define | TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_SHIFT (20U) |
#define | TEMPMON_TEMPSENSE0_SET_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_MASK) |
TEMPSENSE0_CLR - Tempsensor Control Register 0 | |
#define | TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_MASK (0x1U) |
#define | TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_SHIFT (0U) |
#define | TEMPMON_TEMPSENSE0_CLR_POWER_DOWN(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_MASK) |
#define | TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_MASK (0x2U) |
#define | TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_SHIFT (1U) |
#define | TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_MASK) |
#define | TEMPMON_TEMPSENSE0_CLR_FINISHED_MASK (0x4U) |
#define | TEMPMON_TEMPSENSE0_CLR_FINISHED_SHIFT (2U) |
#define | TEMPMON_TEMPSENSE0_CLR_FINISHED(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_FINISHED_MASK) |
#define | TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_MASK (0xFFF00U) |
#define | TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_SHIFT (8U) |
#define | TEMPMON_TEMPSENSE0_CLR_TEMP_CNT(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_MASK) |
#define | TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_MASK (0xFFF00000U) |
#define | TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_SHIFT (20U) |
#define | TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_MASK) |
TEMPSENSE0_TOG - Tempsensor Control Register 0 | |
#define | TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_MASK (0x1U) |
#define | TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_SHIFT (0U) |
#define | TEMPMON_TEMPSENSE0_TOG_POWER_DOWN(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_MASK) |
#define | TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_MASK (0x2U) |
#define | TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_SHIFT (1U) |
#define | TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_MASK) |
#define | TEMPMON_TEMPSENSE0_TOG_FINISHED_MASK (0x4U) |
#define | TEMPMON_TEMPSENSE0_TOG_FINISHED_SHIFT (2U) |
#define | TEMPMON_TEMPSENSE0_TOG_FINISHED(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_FINISHED_MASK) |
#define | TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_MASK (0xFFF00U) |
#define | TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_SHIFT (8U) |
#define | TEMPMON_TEMPSENSE0_TOG_TEMP_CNT(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_MASK) |
#define | TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_MASK (0xFFF00000U) |
#define | TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_SHIFT (20U) |
#define | TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_MASK) |
TEMPSENSE1 - Tempsensor Control Register 1 | |
#define | TEMPMON_TEMPSENSE1_MEASURE_FREQ_MASK (0xFFFFU) |
#define | TEMPMON_TEMPSENSE1_MEASURE_FREQ_SHIFT (0U) |
#define | TEMPMON_TEMPSENSE1_MEASURE_FREQ(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_MEASURE_FREQ_MASK) |
TEMPSENSE1_SET - Tempsensor Control Register 1 | |
#define | TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_MASK (0xFFFFU) |
#define | TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_SHIFT (0U) |
#define | TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_MASK) |
TEMPSENSE1_CLR - Tempsensor Control Register 1 | |
#define | TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_MASK (0xFFFFU) |
#define | TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_SHIFT (0U) |
#define | TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_MASK) |
TEMPSENSE1_TOG - Tempsensor Control Register 1 | |
#define | TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_MASK (0xFFFFU) |
#define | TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_SHIFT (0U) |
#define | TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_MASK) |
#define TEMPMON_TEMPSENSE0_CLR_FINISHED | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_FINISHED_MASK) |
FINISHED 0b0..Last measurement is not ready yet. 0b1..Last measurement is valid.
#define TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_MASK) |
MEASURE_TEMP 0b0..Do not start the measurement process. 0b1..Start the measurement process.
#define TEMPMON_TEMPSENSE0_CLR_POWER_DOWN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_MASK) |
POWER_DOWN 0b0..Enable power to the temperature sensor. 0b1..Power down the temperature sensor.
#define TEMPMON_TEMPSENSE0_FINISHED | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_FINISHED_MASK) |
FINISHED 0b0..Last measurement is not ready yet. 0b1..Last measurement is valid.
#define TEMPMON_TEMPSENSE0_MEASURE_TEMP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_MEASURE_TEMP_MASK) |
MEASURE_TEMP 0b0..Do not start the measurement process. 0b1..Start the measurement process.
#define TEMPMON_TEMPSENSE0_POWER_DOWN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK) |
POWER_DOWN 0b0..Enable power to the temperature sensor. 0b1..Power down the temperature sensor.
#define TEMPMON_TEMPSENSE0_SET_FINISHED | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_SET_FINISHED_MASK) |
FINISHED 0b0..Last measurement is not ready yet. 0b1..Last measurement is valid.
#define TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_MASK) |
MEASURE_TEMP 0b0..Do not start the measurement process. 0b1..Start the measurement process.
#define TEMPMON_TEMPSENSE0_SET_POWER_DOWN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_SET_POWER_DOWN_MASK) |
POWER_DOWN 0b0..Enable power to the temperature sensor. 0b1..Power down the temperature sensor.
#define TEMPMON_TEMPSENSE0_TOG_FINISHED | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_FINISHED_MASK) |
FINISHED 0b0..Last measurement is not ready yet. 0b1..Last measurement is valid.
#define TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_MASK) |
MEASURE_TEMP 0b0..Do not start the measurement process. 0b1..Start the measurement process.
#define TEMPMON_TEMPSENSE0_TOG_POWER_DOWN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_MASK) |
POWER_DOWN 0b0..Enable power to the temperature sensor. 0b1..Power down the temperature sensor.
#define TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_MASK) |
MEASURE_FREQ 0b0000000000000000..Defines a single measurement with no repeat. 0b0000000000000001..Updates the temperature value at a RTC clock rate. 0b0000000000000010..Updates the temperature value at a RTC/2 clock rate. 0b1111111111111111..Determines a two second sample period with a 32.768KHz RTC clock. Exact timings depend on the accuracy of the RTC clock.
#define TEMPMON_TEMPSENSE1_MEASURE_FREQ | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_MEASURE_FREQ_MASK) |
MEASURE_FREQ 0b0000000000000000..Defines a single measurement with no repeat. 0b0000000000000001..Updates the temperature value at a RTC clock rate. 0b0000000000000010..Updates the temperature value at a RTC/2 clock rate. 0b1111111111111111..Determines a two second sample period with a 32.768KHz RTC clock. Exact timings depend on the accuracy of the RTC clock.
#define TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_MASK) |
MEASURE_FREQ 0b0000000000000000..Defines a single measurement with no repeat. 0b0000000000000001..Updates the temperature value at a RTC clock rate. 0b0000000000000010..Updates the temperature value at a RTC/2 clock rate. 0b1111111111111111..Determines a two second sample period with a 32.768KHz RTC clock. Exact timings depend on the accuracy of the RTC clock.
#define TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_MASK) |
MEASURE_FREQ 0b0000000000000000..Defines a single measurement with no repeat. 0b0000000000000001..Updates the temperature value at a RTC clock rate. 0b0000000000000010..Updates the temperature value at a RTC/2 clock rate. 0b1111111111111111..Determines a two second sample period with a 32.768KHz RTC clock. Exact timings depend on the accuracy of the RTC clock.