This group contains register bit definitions.
More...
This group contains register bit definitions.
◆ GRSPW2_INTCFG_INTNUM0
#define GRSPW2_INTCFG_INTNUM0 |
( |
|
_val | ) |
|
Value: ( ( ( _val ) << GRSPW2_INTCFG_INTNUM0_SHIFT ) & \
GRSPW2_INTCFG_INTNUM0_MASK )
◆ GRSPW2_INTCFG_INTNUM0_GET
#define GRSPW2_INTCFG_INTNUM0_GET |
( |
|
_reg | ) |
|
Value: ( ( ( _reg ) & GRSPW2_INTCFG_INTNUM0_MASK ) >> \
GRSPW2_INTCFG_INTNUM0_SHIFT )
◆ GRSPW2_INTCFG_INTNUM0_SET
#define GRSPW2_INTCFG_INTNUM0_SET |
( |
|
_reg, |
|
|
|
_val |
|
) |
| |
Value: ( ( ( _reg ) & ~GRSPW2_INTCFG_INTNUM0_MASK ) | \
( ( ( _val ) << GRSPW2_INTCFG_INTNUM0_SHIFT ) & \
GRSPW2_INTCFG_INTNUM0_MASK ) )
◆ GRSPW2_INTCFG_INTNUM1
#define GRSPW2_INTCFG_INTNUM1 |
( |
|
_val | ) |
|
Value: ( ( ( _val ) << GRSPW2_INTCFG_INTNUM1_SHIFT ) & \
GRSPW2_INTCFG_INTNUM1_MASK )
◆ GRSPW2_INTCFG_INTNUM1_GET
#define GRSPW2_INTCFG_INTNUM1_GET |
( |
|
_reg | ) |
|
Value: ( ( ( _reg ) & GRSPW2_INTCFG_INTNUM1_MASK ) >> \
GRSPW2_INTCFG_INTNUM1_SHIFT )
◆ GRSPW2_INTCFG_INTNUM1_SET
#define GRSPW2_INTCFG_INTNUM1_SET |
( |
|
_reg, |
|
|
|
_val |
|
) |
| |
Value: ( ( ( _reg ) & ~GRSPW2_INTCFG_INTNUM1_MASK ) | \
( ( ( _val ) << GRSPW2_INTCFG_INTNUM1_SHIFT ) & \
GRSPW2_INTCFG_INTNUM1_MASK ) )
◆ GRSPW2_INTCFG_INTNUM2
#define GRSPW2_INTCFG_INTNUM2 |
( |
|
_val | ) |
|
Value: ( ( ( _val ) << GRSPW2_INTCFG_INTNUM2_SHIFT ) & \
GRSPW2_INTCFG_INTNUM2_MASK )
◆ GRSPW2_INTCFG_INTNUM2_GET
#define GRSPW2_INTCFG_INTNUM2_GET |
( |
|
_reg | ) |
|
Value: ( ( ( _reg ) & GRSPW2_INTCFG_INTNUM2_MASK ) >> \
GRSPW2_INTCFG_INTNUM2_SHIFT )
◆ GRSPW2_INTCFG_INTNUM2_SET
#define GRSPW2_INTCFG_INTNUM2_SET |
( |
|
_reg, |
|
|
|
_val |
|
) |
| |
Value: ( ( ( _reg ) & ~GRSPW2_INTCFG_INTNUM2_MASK ) | \
( ( ( _val ) << GRSPW2_INTCFG_INTNUM2_SHIFT ) & \
GRSPW2_INTCFG_INTNUM2_MASK ) )
◆ GRSPW2_INTCFG_INTNUM3
#define GRSPW2_INTCFG_INTNUM3 |
( |
|
_val | ) |
|
Value: ( ( ( _val ) << GRSPW2_INTCFG_INTNUM3_SHIFT ) & \
GRSPW2_INTCFG_INTNUM3_MASK )
◆ GRSPW2_INTCFG_INTNUM3_GET
#define GRSPW2_INTCFG_INTNUM3_GET |
( |
|
_reg | ) |
|
Value: ( ( ( _reg ) & GRSPW2_INTCFG_INTNUM3_MASK ) >> \
GRSPW2_INTCFG_INTNUM3_SHIFT )
◆ GRSPW2_INTCFG_INTNUM3_SET
#define GRSPW2_INTCFG_INTNUM3_SET |
( |
|
_reg, |
|
|
|
_val |
|
) |
| |
Value: ( ( ( _reg ) & ~GRSPW2_INTCFG_INTNUM3_MASK ) | \
( ( ( _val ) << GRSPW2_INTCFG_INTNUM3_SHIFT ) & \
GRSPW2_INTCFG_INTNUM3_MASK ) )
◆ GRSPW2_INTCFG_NUMINT
#define GRSPW2_INTCFG_NUMINT |
( |
|
_val | ) |
|
Value: ( ( ( _val ) << GRSPW2_INTCFG_NUMINT_SHIFT ) & \
GRSPW2_INTCFG_NUMINT_MASK )
◆ GRSPW2_INTCFG_NUMINT_GET
#define GRSPW2_INTCFG_NUMINT_GET |
( |
|
_reg | ) |
|
Value: ( ( ( _reg ) & GRSPW2_INTCFG_NUMINT_MASK ) >> \
GRSPW2_INTCFG_NUMINT_SHIFT )
◆ GRSPW2_INTCFG_NUMINT_SET
#define GRSPW2_INTCFG_NUMINT_SET |
( |
|
_reg, |
|
|
|
_val |
|
) |
| |
Value: ( ( ( _reg ) & ~GRSPW2_INTCFG_NUMINT_MASK ) | \
( ( ( _val ) << GRSPW2_INTCFG_NUMINT_SHIFT ) & \
GRSPW2_INTCFG_NUMINT_MASK ) )