Type definitions for the System Control and ID Register not in the SCB. More...

Modules
	System Tick Timer (SysTick)
	Type definitions for the System Timer Registers.

Data Structures
struct	SCnSCB_Type
	Structure type to access the System Control and ID Register not in the SCB. More...

#define	SCnSCB_ICTR_INTLINESNUM_Pos 0U

#define	SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /<< SCnSCB_ICTR_INTLINESNUM_Pos/)

#define	SCnSCB_ACTLR_DISOOFP_Pos 9U

#define	SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos)

#define	SCnSCB_ACTLR_DISFPCA_Pos 8U

#define	SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos)

#define	SCnSCB_ACTLR_DISFOLD_Pos 2U

#define	SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos)

#define	SCnSCB_ACTLR_DISDEFWBUF_Pos 1U

#define	SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)

#define	SCnSCB_ACTLR_DISMCYCINT_Pos 0U

#define	SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /<< SCnSCB_ACTLR_DISMCYCINT_Pos/)

#define	SCnSCB_ICTR_INTLINESNUM_Pos 0U

#define	SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /<< SCnSCB_ICTR_INTLINESNUM_Pos/)

#define	SCnSCB_ACTLR_DISDYNADD_Pos 26U

#define	SCnSCB_ACTLR_DISDYNADD_Msk (1UL << SCnSCB_ACTLR_DISDYNADD_Pos)

#define	SCnSCB_ACTLR_DISISSCH1_Pos 21U

#define	SCnSCB_ACTLR_DISISSCH1_Msk (0x1FUL << SCnSCB_ACTLR_DISISSCH1_Pos)

#define	SCnSCB_ACTLR_DISDI_Pos 16U

#define	SCnSCB_ACTLR_DISDI_Msk (0x1FUL << SCnSCB_ACTLR_DISDI_Pos)

#define	SCnSCB_ACTLR_DISCRITAXIRUR_Pos 15U

#define	SCnSCB_ACTLR_DISCRITAXIRUR_Msk (1UL << SCnSCB_ACTLR_DISCRITAXIRUR_Pos)

#define	SCnSCB_ACTLR_DISBTACALLOC_Pos 14U

#define	SCnSCB_ACTLR_DISBTACALLOC_Msk (1UL << SCnSCB_ACTLR_DISBTACALLOC_Pos)

#define	SCnSCB_ACTLR_DISBTACREAD_Pos 13U

#define	SCnSCB_ACTLR_DISBTACREAD_Msk (1UL << SCnSCB_ACTLR_DISBTACREAD_Pos)

#define	SCnSCB_ACTLR_DISITMATBFLUSH_Pos 12U

#define	SCnSCB_ACTLR_DISITMATBFLUSH_Msk (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos)

#define	SCnSCB_ACTLR_DISRAMODE_Pos 11U

#define	SCnSCB_ACTLR_DISRAMODE_Msk (1UL << SCnSCB_ACTLR_DISRAMODE_Pos)

#define	SCnSCB_ACTLR_FPEXCODIS_Pos 10U

#define	SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos)

#define	SCnSCB_ACTLR_DISFOLD_Pos 2U

#define	SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos)

#define	SCnSCB_ACTLR_DISMCYCINT_Pos 0U

#define	SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /<< SCnSCB_ACTLR_DISMCYCINT_Pos/)

Detailed Description

Type definitions for the System Control and ID Register not in the SCB.

Macro Definition Documentation

◆ SCnSCB_ACTLR_DISBTACALLOC_Msk

#define SCnSCB_ACTLR_DISBTACALLOC_Msk (1UL << SCnSCB_ACTLR_DISBTACALLOC_Pos)

ACTLR: DISBTACALLOC Mask

◆ SCnSCB_ACTLR_DISBTACALLOC_Pos

#define SCnSCB_ACTLR_DISBTACALLOC_Pos 14U

ACTLR: DISBTACALLOC Position

◆ SCnSCB_ACTLR_DISBTACREAD_Msk

#define SCnSCB_ACTLR_DISBTACREAD_Msk (1UL << SCnSCB_ACTLR_DISBTACREAD_Pos)

ACTLR: DISBTACREAD Mask

◆ SCnSCB_ACTLR_DISBTACREAD_Pos

#define SCnSCB_ACTLR_DISBTACREAD_Pos 13U

ACTLR: DISBTACREAD Position

◆ SCnSCB_ACTLR_DISCRITAXIRUR_Msk

#define SCnSCB_ACTLR_DISCRITAXIRUR_Msk (1UL << SCnSCB_ACTLR_DISCRITAXIRUR_Pos)

ACTLR: DISCRITAXIRUR Mask

◆ SCnSCB_ACTLR_DISCRITAXIRUR_Pos

#define SCnSCB_ACTLR_DISCRITAXIRUR_Pos 15U

ACTLR: DISCRITAXIRUR Position

◆ SCnSCB_ACTLR_DISDEFWBUF_Msk

#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)

ACTLR: DISDEFWBUF Mask

◆ SCnSCB_ACTLR_DISDEFWBUF_Pos

#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U

ACTLR: DISDEFWBUF Position

◆ SCnSCB_ACTLR_DISDI_Msk

#define SCnSCB_ACTLR_DISDI_Msk (0x1FUL << SCnSCB_ACTLR_DISDI_Pos)

ACTLR: DISDI Mask

◆ SCnSCB_ACTLR_DISDI_Pos

#define SCnSCB_ACTLR_DISDI_Pos 16U

ACTLR: DISDI Position

◆ SCnSCB_ACTLR_DISDYNADD_Msk

#define SCnSCB_ACTLR_DISDYNADD_Msk (1UL << SCnSCB_ACTLR_DISDYNADD_Pos)

ACTLR: DISDYNADD Mask

◆ SCnSCB_ACTLR_DISDYNADD_Pos

#define SCnSCB_ACTLR_DISDYNADD_Pos 26U

ACTLR: DISDYNADD Position

◆ SCnSCB_ACTLR_DISFOLD_Msk [1/2]

#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos)

ACTLR: DISFOLD Mask

◆ SCnSCB_ACTLR_DISFOLD_Msk [2/2]

#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos)

ACTLR: DISFOLD Mask

◆ SCnSCB_ACTLR_DISFOLD_Pos [1/2]

#define SCnSCB_ACTLR_DISFOLD_Pos 2U

ACTLR: DISFOLD Position

◆ SCnSCB_ACTLR_DISFOLD_Pos [2/2]

#define SCnSCB_ACTLR_DISFOLD_Pos 2U

ACTLR: DISFOLD Position

◆ SCnSCB_ACTLR_DISFPCA_Msk

#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos)

ACTLR: DISFPCA Mask

◆ SCnSCB_ACTLR_DISFPCA_Pos

#define SCnSCB_ACTLR_DISFPCA_Pos 8U

ACTLR: DISFPCA Position

◆ SCnSCB_ACTLR_DISISSCH1_Msk

#define SCnSCB_ACTLR_DISISSCH1_Msk (0x1FUL << SCnSCB_ACTLR_DISISSCH1_Pos)

ACTLR: DISISSCH1 Mask

◆ SCnSCB_ACTLR_DISISSCH1_Pos

#define SCnSCB_ACTLR_DISISSCH1_Pos 21U

ACTLR: DISISSCH1 Position

◆ SCnSCB_ACTLR_DISITMATBFLUSH_Msk

#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos)

ACTLR: DISITMATBFLUSH Mask

◆ SCnSCB_ACTLR_DISITMATBFLUSH_Pos

#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos 12U

ACTLR: DISITMATBFLUSH Position

◆ SCnSCB_ACTLR_DISMCYCINT_Msk [1/2]

#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)

ACTLR: DISMCYCINT Mask

◆ SCnSCB_ACTLR_DISMCYCINT_Msk [2/2]

#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)

ACTLR: DISMCYCINT Mask

◆ SCnSCB_ACTLR_DISMCYCINT_Pos [1/2]

#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U

ACTLR: DISMCYCINT Position

◆ SCnSCB_ACTLR_DISMCYCINT_Pos [2/2]

#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U

ACTLR: DISMCYCINT Position

◆ SCnSCB_ACTLR_DISOOFP_Msk

#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos)

ACTLR: DISOOFP Mask

◆ SCnSCB_ACTLR_DISOOFP_Pos

#define SCnSCB_ACTLR_DISOOFP_Pos 9U

ACTLR: DISOOFP Position

◆ SCnSCB_ACTLR_DISRAMODE_Msk

#define SCnSCB_ACTLR_DISRAMODE_Msk (1UL << SCnSCB_ACTLR_DISRAMODE_Pos)

ACTLR: DISRAMODE Mask

◆ SCnSCB_ACTLR_DISRAMODE_Pos

#define SCnSCB_ACTLR_DISRAMODE_Pos 11U

ACTLR: DISRAMODE Position

◆ SCnSCB_ACTLR_FPEXCODIS_Msk

#define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos)

ACTLR: FPEXCODIS Mask

◆ SCnSCB_ACTLR_FPEXCODIS_Pos

#define SCnSCB_ACTLR_FPEXCODIS_Pos 10U

ACTLR: FPEXCODIS Position

◆ SCnSCB_ICTR_INTLINESNUM_Msk [1/2]

#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)

ICTR: INTLINESNUM Mask

◆ SCnSCB_ICTR_INTLINESNUM_Msk [2/2]