RTEMS 6.1-rc6
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CTRL0 - Fractional PLL Control Register | |
#define | AUDIO_PLL_CTRL0_DIV_SELECT_MASK (0x7FU) |
#define | AUDIO_PLL_CTRL0_DIV_SELECT_SHIFT (0U) |
#define | AUDIO_PLL_CTRL0_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DIV_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_DIV_SELECT_MASK) |
#define | AUDIO_PLL_CTRL0_ENABLE_ALT_MASK (0x100U) |
#define | AUDIO_PLL_CTRL0_ENABLE_ALT_SHIFT (8U) |
#define | AUDIO_PLL_CTRL0_ENABLE_ALT(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_ALT_MASK) |
#define | AUDIO_PLL_CTRL0_HOLD_RING_OFF_MASK (0x2000U) |
#define | AUDIO_PLL_CTRL0_HOLD_RING_OFF_SHIFT (13U) |
#define | AUDIO_PLL_CTRL0_HOLD_RING_OFF(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & AUDIO_PLL_CTRL0_HOLD_RING_OFF_MASK) |
#define | AUDIO_PLL_CTRL0_POWERUP_MASK (0x4000U) |
#define | AUDIO_PLL_CTRL0_POWERUP_SHIFT (14U) |
#define | AUDIO_PLL_CTRL0_POWERUP(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POWERUP_SHIFT)) & AUDIO_PLL_CTRL0_POWERUP_MASK) |
#define | AUDIO_PLL_CTRL0_ENABLE_MASK (0x8000U) |
#define | AUDIO_PLL_CTRL0_ENABLE_SHIFT (15U) |
#define | AUDIO_PLL_CTRL0_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_MASK) |
#define | AUDIO_PLL_CTRL0_BYPASS_MASK (0x10000U) |
#define | AUDIO_PLL_CTRL0_BYPASS_SHIFT (16U) |
#define | AUDIO_PLL_CTRL0_BYPASS(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BYPASS_SHIFT)) & AUDIO_PLL_CTRL0_BYPASS_MASK) |
#define | AUDIO_PLL_CTRL0_DITHER_EN_MASK (0x20000U) |
#define | AUDIO_PLL_CTRL0_DITHER_EN_SHIFT (17U) |
#define | AUDIO_PLL_CTRL0_DITHER_EN(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DITHER_EN_SHIFT)) & AUDIO_PLL_CTRL0_DITHER_EN_MASK) |
#define | AUDIO_PLL_CTRL0_BIAS_TRIM_MASK (0x380000U) |
#define | AUDIO_PLL_CTRL0_BIAS_TRIM_SHIFT (19U) |
#define | AUDIO_PLL_CTRL0_BIAS_TRIM(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_TRIM_MASK) |
#define | AUDIO_PLL_CTRL0_PLL_REG_EN_MASK (0x400000U) |
#define | AUDIO_PLL_CTRL0_PLL_REG_EN_SHIFT (22U) |
#define | AUDIO_PLL_CTRL0_PLL_REG_EN(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & AUDIO_PLL_CTRL0_PLL_REG_EN_MASK) |
#define | AUDIO_PLL_CTRL0_POST_DIV_SEL_MASK (0xE000000U) |
#define | AUDIO_PLL_CTRL0_POST_DIV_SEL_SHIFT (25U) |
#define | AUDIO_PLL_CTRL0_POST_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & AUDIO_PLL_CTRL0_POST_DIV_SEL_MASK) |
#define | AUDIO_PLL_CTRL0_BIAS_SELECT_MASK (0x20000000U) |
#define | AUDIO_PLL_CTRL0_BIAS_SELECT_SHIFT (29U) |
#define | AUDIO_PLL_CTRL0_BIAS_SELECT(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_SELECT_MASK) |
#define | ETHERNET_PLL_CTRL0_DIV_SELECT_MASK (0x7FU) |
#define | ETHERNET_PLL_CTRL0_DIV_SELECT_SHIFT (0U) |
#define | ETHERNET_PLL_CTRL0_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DIV_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_DIV_SELECT_MASK) |
#define | ETHERNET_PLL_CTRL0_ENABLE_ALT_MASK (0x100U) |
#define | ETHERNET_PLL_CTRL0_ENABLE_ALT_SHIFT (8U) |
#define | ETHERNET_PLL_CTRL0_ENABLE_ALT(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_ALT_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_ALT_MASK) |
#define | ETHERNET_PLL_CTRL0_HOLD_RING_OFF_MASK (0x2000U) |
#define | ETHERNET_PLL_CTRL0_HOLD_RING_OFF_SHIFT (13U) |
#define | ETHERNET_PLL_CTRL0_HOLD_RING_OFF(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & ETHERNET_PLL_CTRL0_HOLD_RING_OFF_MASK) |
#define | ETHERNET_PLL_CTRL0_POWERUP_MASK (0x4000U) |
#define | ETHERNET_PLL_CTRL0_POWERUP_SHIFT (14U) |
#define | ETHERNET_PLL_CTRL0_POWERUP(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POWERUP_SHIFT)) & ETHERNET_PLL_CTRL0_POWERUP_MASK) |
#define | ETHERNET_PLL_CTRL0_ENABLE_MASK (0x8000U) |
#define | ETHERNET_PLL_CTRL0_ENABLE_SHIFT (15U) |
#define | ETHERNET_PLL_CTRL0_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_MASK) |
#define | ETHERNET_PLL_CTRL0_BYPASS_MASK (0x10000U) |
#define | ETHERNET_PLL_CTRL0_BYPASS_SHIFT (16U) |
#define | ETHERNET_PLL_CTRL0_BYPASS(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BYPASS_SHIFT)) & ETHERNET_PLL_CTRL0_BYPASS_MASK) |
#define | ETHERNET_PLL_CTRL0_DITHER_EN_MASK (0x20000U) |
#define | ETHERNET_PLL_CTRL0_DITHER_EN_SHIFT (17U) |
#define | ETHERNET_PLL_CTRL0_DITHER_EN(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DITHER_EN_SHIFT)) & ETHERNET_PLL_CTRL0_DITHER_EN_MASK) |
#define | ETHERNET_PLL_CTRL0_BIAS_TRIM_MASK (0x380000U) |
#define | ETHERNET_PLL_CTRL0_BIAS_TRIM_SHIFT (19U) |
#define | ETHERNET_PLL_CTRL0_BIAS_TRIM(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_TRIM_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_TRIM_MASK) |
#define | ETHERNET_PLL_CTRL0_PLL_REG_EN_MASK (0x400000U) |
#define | ETHERNET_PLL_CTRL0_PLL_REG_EN_SHIFT (22U) |
#define | ETHERNET_PLL_CTRL0_PLL_REG_EN(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_PLL_REG_EN_SHIFT)) & ETHERNET_PLL_CTRL0_PLL_REG_EN_MASK) |
#define | ETHERNET_PLL_CTRL0_POST_DIV_SEL_MASK (0xE000000U) |
#define | ETHERNET_PLL_CTRL0_POST_DIV_SEL_SHIFT (25U) |
#define | ETHERNET_PLL_CTRL0_POST_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & ETHERNET_PLL_CTRL0_POST_DIV_SEL_MASK) |
#define | ETHERNET_PLL_CTRL0_BIAS_SELECT_MASK (0x20000000U) |
#define | ETHERNET_PLL_CTRL0_BIAS_SELECT_SHIFT (29U) |
#define | ETHERNET_PLL_CTRL0_BIAS_SELECT(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_SELECT_MASK) |
#define | VIDEO_PLL_CTRL0_DIV_SELECT_MASK (0x7FU) |
#define | VIDEO_PLL_CTRL0_DIV_SELECT_SHIFT (0U) |
#define | VIDEO_PLL_CTRL0_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DIV_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_DIV_SELECT_MASK) |
#define | VIDEO_PLL_CTRL0_ENABLE_ALT_MASK (0x100U) |
#define | VIDEO_PLL_CTRL0_ENABLE_ALT_SHIFT (8U) |
#define | VIDEO_PLL_CTRL0_ENABLE_ALT(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_ALT_MASK) |
#define | VIDEO_PLL_CTRL0_HOLD_RING_OFF_MASK (0x2000U) |
#define | VIDEO_PLL_CTRL0_HOLD_RING_OFF_SHIFT (13U) |
#define | VIDEO_PLL_CTRL0_HOLD_RING_OFF(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & VIDEO_PLL_CTRL0_HOLD_RING_OFF_MASK) |
#define | VIDEO_PLL_CTRL0_POWERUP_MASK (0x4000U) |
#define | VIDEO_PLL_CTRL0_POWERUP_SHIFT (14U) |
#define | VIDEO_PLL_CTRL0_POWERUP(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POWERUP_SHIFT)) & VIDEO_PLL_CTRL0_POWERUP_MASK) |
#define | VIDEO_PLL_CTRL0_ENABLE_MASK (0x8000U) |
#define | VIDEO_PLL_CTRL0_ENABLE_SHIFT (15U) |
#define | VIDEO_PLL_CTRL0_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_MASK) |
#define | VIDEO_PLL_CTRL0_BYPASS_MASK (0x10000U) |
#define | VIDEO_PLL_CTRL0_BYPASS_SHIFT (16U) |
#define | VIDEO_PLL_CTRL0_BYPASS(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BYPASS_SHIFT)) & VIDEO_PLL_CTRL0_BYPASS_MASK) |
#define | VIDEO_PLL_CTRL0_DITHER_EN_MASK (0x20000U) |
#define | VIDEO_PLL_CTRL0_DITHER_EN_SHIFT (17U) |
#define | VIDEO_PLL_CTRL0_DITHER_EN(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DITHER_EN_SHIFT)) & VIDEO_PLL_CTRL0_DITHER_EN_MASK) |
#define | VIDEO_PLL_CTRL0_BIAS_TRIM_MASK (0x380000U) |
#define | VIDEO_PLL_CTRL0_BIAS_TRIM_SHIFT (19U) |
#define | VIDEO_PLL_CTRL0_BIAS_TRIM(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_TRIM_MASK) |
#define | VIDEO_PLL_CTRL0_PLL_REG_EN_MASK (0x400000U) |
#define | VIDEO_PLL_CTRL0_PLL_REG_EN_SHIFT (22U) |
#define | VIDEO_PLL_CTRL0_PLL_REG_EN(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & VIDEO_PLL_CTRL0_PLL_REG_EN_MASK) |
#define | VIDEO_PLL_CTRL0_POST_DIV_SEL_MASK (0xE000000U) |
#define | VIDEO_PLL_CTRL0_POST_DIV_SEL_SHIFT (25U) |
#define | VIDEO_PLL_CTRL0_POST_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & VIDEO_PLL_CTRL0_POST_DIV_SEL_MASK) |
#define | VIDEO_PLL_CTRL0_BIAS_SELECT_MASK (0x20000000U) |
#define | VIDEO_PLL_CTRL0_BIAS_SELECT_SHIFT (29U) |
#define | VIDEO_PLL_CTRL0_BIAS_SELECT(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_SELECT_MASK) |
SPREAD_SPECTRUM - Fractional PLL Spread Spectrum Control Register | |
#define | AUDIO_PLL_SPREAD_SPECTRUM_STEP_MASK (0x7FFFU) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_STEP_SHIFT (0U) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_STEP(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STEP_MASK) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_MASK (0x8000U) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT (15U) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_MASK) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_STOP_MASK (0xFFFF0000U) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_STOP_SHIFT (16U) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_STOP(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STOP_MASK) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_STEP_MASK (0x7FFFU) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_STEP_SHIFT (0U) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_STEP(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STEP_MASK) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_MASK (0x8000U) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT (15U) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_MASK) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_STOP_MASK (0xFFFF0000U) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_STOP_SHIFT (16U) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_STOP(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STOP_MASK) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_STEP_MASK (0x7FFFU) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_STEP_SHIFT (0U) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_STEP(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STEP_MASK) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_MASK (0x8000U) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT (15U) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_MASK) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_STOP_MASK (0xFFFF0000U) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_STOP_SHIFT (16U) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_STOP(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STOP_MASK) |
NUMERATOR - Fractional PLL Numerator Control Register | |
#define | AUDIO_PLL_NUMERATOR_NUM_MASK (0x3FFFFFFFU) |
#define | AUDIO_PLL_NUMERATOR_NUM_SHIFT (0U) |
#define | AUDIO_PLL_NUMERATOR_NUM(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_NUMERATOR_NUM_SHIFT)) & AUDIO_PLL_NUMERATOR_NUM_MASK) |
#define | ETHERNET_PLL_NUMERATOR_NUM_MASK (0x3FFFFFFFU) |
#define | ETHERNET_PLL_NUMERATOR_NUM_SHIFT (0U) |
#define | ETHERNET_PLL_NUMERATOR_NUM(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_NUMERATOR_NUM_SHIFT)) & ETHERNET_PLL_NUMERATOR_NUM_MASK) |
#define | VIDEO_PLL_NUMERATOR_NUM_MASK (0x3FFFFFFFU) |
#define | VIDEO_PLL_NUMERATOR_NUM_SHIFT (0U) |
#define | VIDEO_PLL_NUMERATOR_NUM(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_NUMERATOR_NUM_SHIFT)) & VIDEO_PLL_NUMERATOR_NUM_MASK) |
DENOMINATOR - Fractional PLL Denominator Control Register | |
#define | AUDIO_PLL_DENOMINATOR_DENOM_MASK (0x3FFFFFFFU) |
#define | AUDIO_PLL_DENOMINATOR_DENOM_SHIFT (0U) |
#define | AUDIO_PLL_DENOMINATOR_DENOM(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_DENOMINATOR_DENOM_SHIFT)) & AUDIO_PLL_DENOMINATOR_DENOM_MASK) |
#define | ETHERNET_PLL_DENOMINATOR_DENOM_MASK (0x3FFFFFFFU) |
#define | ETHERNET_PLL_DENOMINATOR_DENOM_SHIFT (0U) |
#define | ETHERNET_PLL_DENOMINATOR_DENOM(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_DENOMINATOR_DENOM_SHIFT)) & ETHERNET_PLL_DENOMINATOR_DENOM_MASK) |
#define | VIDEO_PLL_DENOMINATOR_DENOM_MASK (0x3FFFFFFFU) |
#define | VIDEO_PLL_DENOMINATOR_DENOM_SHIFT (0U) |
#define | VIDEO_PLL_DENOMINATOR_DENOM(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_DENOMINATOR_DENOM_SHIFT)) & VIDEO_PLL_DENOMINATOR_DENOM_MASK) |
CTRL0 - Fractional PLL Control Register | |
#define | AUDIO_PLL_CTRL0_DIV_SELECT_MASK (0x7FU) |
#define | AUDIO_PLL_CTRL0_DIV_SELECT_SHIFT (0U) |
#define | AUDIO_PLL_CTRL0_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DIV_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_DIV_SELECT_MASK) |
#define | AUDIO_PLL_CTRL0_ENABLE_ALT_MASK (0x100U) |
#define | AUDIO_PLL_CTRL0_ENABLE_ALT_SHIFT (8U) |
#define | AUDIO_PLL_CTRL0_ENABLE_ALT(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_ALT_MASK) |
#define | AUDIO_PLL_CTRL0_HOLD_RING_OFF_MASK (0x2000U) |
#define | AUDIO_PLL_CTRL0_HOLD_RING_OFF_SHIFT (13U) |
#define | AUDIO_PLL_CTRL0_HOLD_RING_OFF(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & AUDIO_PLL_CTRL0_HOLD_RING_OFF_MASK) |
#define | AUDIO_PLL_CTRL0_POWERUP_MASK (0x4000U) |
#define | AUDIO_PLL_CTRL0_POWERUP_SHIFT (14U) |
#define | AUDIO_PLL_CTRL0_POWERUP(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POWERUP_SHIFT)) & AUDIO_PLL_CTRL0_POWERUP_MASK) |
#define | AUDIO_PLL_CTRL0_ENABLE_MASK (0x8000U) |
#define | AUDIO_PLL_CTRL0_ENABLE_SHIFT (15U) |
#define | AUDIO_PLL_CTRL0_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_MASK) |
#define | AUDIO_PLL_CTRL0_BYPASS_MASK (0x10000U) |
#define | AUDIO_PLL_CTRL0_BYPASS_SHIFT (16U) |
#define | AUDIO_PLL_CTRL0_BYPASS(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BYPASS_SHIFT)) & AUDIO_PLL_CTRL0_BYPASS_MASK) |
#define | AUDIO_PLL_CTRL0_DITHER_EN_MASK (0x20000U) |
#define | AUDIO_PLL_CTRL0_DITHER_EN_SHIFT (17U) |
#define | AUDIO_PLL_CTRL0_DITHER_EN(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DITHER_EN_SHIFT)) & AUDIO_PLL_CTRL0_DITHER_EN_MASK) |
#define | AUDIO_PLL_CTRL0_BIAS_TRIM_MASK (0x380000U) |
#define | AUDIO_PLL_CTRL0_BIAS_TRIM_SHIFT (19U) |
#define | AUDIO_PLL_CTRL0_BIAS_TRIM(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_TRIM_MASK) |
#define | AUDIO_PLL_CTRL0_PLL_REG_EN_MASK (0x400000U) |
#define | AUDIO_PLL_CTRL0_PLL_REG_EN_SHIFT (22U) |
#define | AUDIO_PLL_CTRL0_PLL_REG_EN(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & AUDIO_PLL_CTRL0_PLL_REG_EN_MASK) |
#define | AUDIO_PLL_CTRL0_POST_DIV_SEL_MASK (0xE000000U) |
#define | AUDIO_PLL_CTRL0_POST_DIV_SEL_SHIFT (25U) |
#define | AUDIO_PLL_CTRL0_POST_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & AUDIO_PLL_CTRL0_POST_DIV_SEL_MASK) |
#define | AUDIO_PLL_CTRL0_BIAS_SELECT_MASK (0x20000000U) |
#define | AUDIO_PLL_CTRL0_BIAS_SELECT_SHIFT (29U) |
#define | AUDIO_PLL_CTRL0_BIAS_SELECT(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_SELECT_MASK) |
#define | ETHERNET_PLL_CTRL0_DIV_SELECT_MASK (0x7FU) |
#define | ETHERNET_PLL_CTRL0_DIV_SELECT_SHIFT (0U) |
#define | ETHERNET_PLL_CTRL0_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DIV_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_DIV_SELECT_MASK) |
#define | ETHERNET_PLL_CTRL0_ENABLE_ALT_MASK (0x100U) |
#define | ETHERNET_PLL_CTRL0_ENABLE_ALT_SHIFT (8U) |
#define | ETHERNET_PLL_CTRL0_ENABLE_ALT(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_ALT_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_ALT_MASK) |
#define | ETHERNET_PLL_CTRL0_HOLD_RING_OFF_MASK (0x2000U) |
#define | ETHERNET_PLL_CTRL0_HOLD_RING_OFF_SHIFT (13U) |
#define | ETHERNET_PLL_CTRL0_HOLD_RING_OFF(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & ETHERNET_PLL_CTRL0_HOLD_RING_OFF_MASK) |
#define | ETHERNET_PLL_CTRL0_POWERUP_MASK (0x4000U) |
#define | ETHERNET_PLL_CTRL0_POWERUP_SHIFT (14U) |
#define | ETHERNET_PLL_CTRL0_POWERUP(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POWERUP_SHIFT)) & ETHERNET_PLL_CTRL0_POWERUP_MASK) |
#define | ETHERNET_PLL_CTRL0_ENABLE_MASK (0x8000U) |
#define | ETHERNET_PLL_CTRL0_ENABLE_SHIFT (15U) |
#define | ETHERNET_PLL_CTRL0_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_MASK) |
#define | ETHERNET_PLL_CTRL0_BYPASS_MASK (0x10000U) |
#define | ETHERNET_PLL_CTRL0_BYPASS_SHIFT (16U) |
#define | ETHERNET_PLL_CTRL0_BYPASS(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BYPASS_SHIFT)) & ETHERNET_PLL_CTRL0_BYPASS_MASK) |
#define | ETHERNET_PLL_CTRL0_DITHER_EN_MASK (0x20000U) |
#define | ETHERNET_PLL_CTRL0_DITHER_EN_SHIFT (17U) |
#define | ETHERNET_PLL_CTRL0_DITHER_EN(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DITHER_EN_SHIFT)) & ETHERNET_PLL_CTRL0_DITHER_EN_MASK) |
#define | ETHERNET_PLL_CTRL0_BIAS_TRIM_MASK (0x380000U) |
#define | ETHERNET_PLL_CTRL0_BIAS_TRIM_SHIFT (19U) |
#define | ETHERNET_PLL_CTRL0_BIAS_TRIM(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_TRIM_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_TRIM_MASK) |
#define | ETHERNET_PLL_CTRL0_PLL_REG_EN_MASK (0x400000U) |
#define | ETHERNET_PLL_CTRL0_PLL_REG_EN_SHIFT (22U) |
#define | ETHERNET_PLL_CTRL0_PLL_REG_EN(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_PLL_REG_EN_SHIFT)) & ETHERNET_PLL_CTRL0_PLL_REG_EN_MASK) |
#define | ETHERNET_PLL_CTRL0_POST_DIV_SEL_MASK (0xE000000U) |
#define | ETHERNET_PLL_CTRL0_POST_DIV_SEL_SHIFT (25U) |
#define | ETHERNET_PLL_CTRL0_POST_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & ETHERNET_PLL_CTRL0_POST_DIV_SEL_MASK) |
#define | ETHERNET_PLL_CTRL0_BIAS_SELECT_MASK (0x20000000U) |
#define | ETHERNET_PLL_CTRL0_BIAS_SELECT_SHIFT (29U) |
#define | ETHERNET_PLL_CTRL0_BIAS_SELECT(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_SELECT_MASK) |
#define | VIDEO_PLL_CTRL0_DIV_SELECT_MASK (0x7FU) |
#define | VIDEO_PLL_CTRL0_DIV_SELECT_SHIFT (0U) |
#define | VIDEO_PLL_CTRL0_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DIV_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_DIV_SELECT_MASK) |
#define | VIDEO_PLL_CTRL0_ENABLE_ALT_MASK (0x100U) |
#define | VIDEO_PLL_CTRL0_ENABLE_ALT_SHIFT (8U) |
#define | VIDEO_PLL_CTRL0_ENABLE_ALT(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_ALT_MASK) |
#define | VIDEO_PLL_CTRL0_HOLD_RING_OFF_MASK (0x2000U) |
#define | VIDEO_PLL_CTRL0_HOLD_RING_OFF_SHIFT (13U) |
#define | VIDEO_PLL_CTRL0_HOLD_RING_OFF(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & VIDEO_PLL_CTRL0_HOLD_RING_OFF_MASK) |
#define | VIDEO_PLL_CTRL0_POWERUP_MASK (0x4000U) |
#define | VIDEO_PLL_CTRL0_POWERUP_SHIFT (14U) |
#define | VIDEO_PLL_CTRL0_POWERUP(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POWERUP_SHIFT)) & VIDEO_PLL_CTRL0_POWERUP_MASK) |
#define | VIDEO_PLL_CTRL0_ENABLE_MASK (0x8000U) |
#define | VIDEO_PLL_CTRL0_ENABLE_SHIFT (15U) |
#define | VIDEO_PLL_CTRL0_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_MASK) |
#define | VIDEO_PLL_CTRL0_BYPASS_MASK (0x10000U) |
#define | VIDEO_PLL_CTRL0_BYPASS_SHIFT (16U) |
#define | VIDEO_PLL_CTRL0_BYPASS(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BYPASS_SHIFT)) & VIDEO_PLL_CTRL0_BYPASS_MASK) |
#define | VIDEO_PLL_CTRL0_DITHER_EN_MASK (0x20000U) |
#define | VIDEO_PLL_CTRL0_DITHER_EN_SHIFT (17U) |
#define | VIDEO_PLL_CTRL0_DITHER_EN(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DITHER_EN_SHIFT)) & VIDEO_PLL_CTRL0_DITHER_EN_MASK) |
#define | VIDEO_PLL_CTRL0_BIAS_TRIM_MASK (0x380000U) |
#define | VIDEO_PLL_CTRL0_BIAS_TRIM_SHIFT (19U) |
#define | VIDEO_PLL_CTRL0_BIAS_TRIM(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_TRIM_MASK) |
#define | VIDEO_PLL_CTRL0_PLL_REG_EN_MASK (0x400000U) |
#define | VIDEO_PLL_CTRL0_PLL_REG_EN_SHIFT (22U) |
#define | VIDEO_PLL_CTRL0_PLL_REG_EN(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & VIDEO_PLL_CTRL0_PLL_REG_EN_MASK) |
#define | VIDEO_PLL_CTRL0_POST_DIV_SEL_MASK (0xE000000U) |
#define | VIDEO_PLL_CTRL0_POST_DIV_SEL_SHIFT (25U) |
#define | VIDEO_PLL_CTRL0_POST_DIV_SEL(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & VIDEO_PLL_CTRL0_POST_DIV_SEL_MASK) |
#define | VIDEO_PLL_CTRL0_BIAS_SELECT_MASK (0x20000000U) |
#define | VIDEO_PLL_CTRL0_BIAS_SELECT_SHIFT (29U) |
#define | VIDEO_PLL_CTRL0_BIAS_SELECT(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_SELECT_MASK) |
SPREAD_SPECTRUM - Fractional PLL Spread Spectrum Control Register | |
#define | AUDIO_PLL_SPREAD_SPECTRUM_STEP_MASK (0x7FFFU) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_STEP_SHIFT (0U) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_STEP(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STEP_MASK) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_MASK (0x8000U) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT (15U) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_MASK) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_STOP_MASK (0xFFFF0000U) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_STOP_SHIFT (16U) |
#define | AUDIO_PLL_SPREAD_SPECTRUM_STOP(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STOP_MASK) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_STEP_MASK (0x7FFFU) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_STEP_SHIFT (0U) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_STEP(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STEP_MASK) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_MASK (0x8000U) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT (15U) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_MASK) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_STOP_MASK (0xFFFF0000U) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_STOP_SHIFT (16U) |
#define | ETHERNET_PLL_SPREAD_SPECTRUM_STOP(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STOP_MASK) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_STEP_MASK (0x7FFFU) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_STEP_SHIFT (0U) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_STEP(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STEP_MASK) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_MASK (0x8000U) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT (15U) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_MASK) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_STOP_MASK (0xFFFF0000U) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_STOP_SHIFT (16U) |
#define | VIDEO_PLL_SPREAD_SPECTRUM_STOP(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STOP_MASK) |
NUMERATOR - Fractional PLL Numerator Control Register | |
#define | AUDIO_PLL_NUMERATOR_NUM_MASK (0x3FFFFFFFU) |
#define | AUDIO_PLL_NUMERATOR_NUM_SHIFT (0U) |
#define | AUDIO_PLL_NUMERATOR_NUM(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_NUMERATOR_NUM_SHIFT)) & AUDIO_PLL_NUMERATOR_NUM_MASK) |
#define | ETHERNET_PLL_NUMERATOR_NUM_MASK (0x3FFFFFFFU) |
#define | ETHERNET_PLL_NUMERATOR_NUM_SHIFT (0U) |
#define | ETHERNET_PLL_NUMERATOR_NUM(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_NUMERATOR_NUM_SHIFT)) & ETHERNET_PLL_NUMERATOR_NUM_MASK) |
#define | VIDEO_PLL_NUMERATOR_NUM_MASK (0x3FFFFFFFU) |
#define | VIDEO_PLL_NUMERATOR_NUM_SHIFT (0U) |
#define | VIDEO_PLL_NUMERATOR_NUM(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_NUMERATOR_NUM_SHIFT)) & VIDEO_PLL_NUMERATOR_NUM_MASK) |
DENOMINATOR - Fractional PLL Denominator Control Register | |
#define | AUDIO_PLL_DENOMINATOR_DENOM_MASK (0x3FFFFFFFU) |
#define | AUDIO_PLL_DENOMINATOR_DENOM_SHIFT (0U) |
#define | AUDIO_PLL_DENOMINATOR_DENOM(x) (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_DENOMINATOR_DENOM_SHIFT)) & AUDIO_PLL_DENOMINATOR_DENOM_MASK) |
#define | ETHERNET_PLL_DENOMINATOR_DENOM_MASK (0x3FFFFFFFU) |
#define | ETHERNET_PLL_DENOMINATOR_DENOM_SHIFT (0U) |
#define | ETHERNET_PLL_DENOMINATOR_DENOM(x) (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_DENOMINATOR_DENOM_SHIFT)) & ETHERNET_PLL_DENOMINATOR_DENOM_MASK) |
#define | VIDEO_PLL_DENOMINATOR_DENOM_MASK (0x3FFFFFFFU) |
#define | VIDEO_PLL_DENOMINATOR_DENOM_SHIFT (0U) |
#define | VIDEO_PLL_DENOMINATOR_DENOM(x) (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_DENOMINATOR_DENOM_SHIFT)) & VIDEO_PLL_DENOMINATOR_DENOM_MASK) |
#define AUDIO_PLL_CTRL0_BIAS_SELECT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_SELECT_MASK) |
BIAS_SELECT - BIAS_SELECT 0b0..Used in SoCs with a bias current of 10uA 0b1..Used in SoCs with a bias current of 2uA
#define AUDIO_PLL_CTRL0_BIAS_SELECT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_SELECT_MASK) |
BIAS_SELECT - BIAS_SELECT 0b0..Used in SoCs with a bias current of 10uA 0b1..Used in SoCs with a bias current of 2uA
#define AUDIO_PLL_CTRL0_BIAS_TRIM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_TRIM_MASK) |
BIAS_TRIM - BIAS_TRIM
#define AUDIO_PLL_CTRL0_BIAS_TRIM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & AUDIO_PLL_CTRL0_BIAS_TRIM_MASK) |
BIAS_TRIM - BIAS_TRIM
#define AUDIO_PLL_CTRL0_BYPASS | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BYPASS_SHIFT)) & AUDIO_PLL_CTRL0_BYPASS_MASK) |
BYPASS - BYPASS 0b1..Bypass the PLL 0b0..No Bypass
#define AUDIO_PLL_CTRL0_BYPASS | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_BYPASS_SHIFT)) & AUDIO_PLL_CTRL0_BYPASS_MASK) |
BYPASS - BYPASS 0b1..Bypass the PLL 0b0..No Bypass
#define AUDIO_PLL_CTRL0_DITHER_EN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DITHER_EN_SHIFT)) & AUDIO_PLL_CTRL0_DITHER_EN_MASK) |
DITHER_EN - DITHER_EN 0b0..Disable Dither 0b1..Enable Dither
#define AUDIO_PLL_CTRL0_DITHER_EN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DITHER_EN_SHIFT)) & AUDIO_PLL_CTRL0_DITHER_EN_MASK) |
DITHER_EN - DITHER_EN 0b0..Disable Dither 0b1..Enable Dither
#define AUDIO_PLL_CTRL0_DIV_SELECT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DIV_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_DIV_SELECT_MASK) |
DIV_SELECT - DIV_SELECT
#define AUDIO_PLL_CTRL0_DIV_SELECT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_DIV_SELECT_SHIFT)) & AUDIO_PLL_CTRL0_DIV_SELECT_MASK) |
DIV_SELECT - DIV_SELECT
#define AUDIO_PLL_CTRL0_ENABLE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_MASK) |
ENABLE - ENABLE 0b1..Enable the clock output 0b0..Disable the clock output
#define AUDIO_PLL_CTRL0_ENABLE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_MASK) |
ENABLE - ENABLE 0b1..Enable the clock output 0b0..Disable the clock output
#define AUDIO_PLL_CTRL0_ENABLE_ALT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_ALT_MASK) |
ENABLE_ALT - ENABLE_ALT 0b0..Disable the alternate clock output 0b1..Enable the alternate clock output which is the output of the post_divider, and cannot be bypassed
#define AUDIO_PLL_CTRL0_ENABLE_ALT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & AUDIO_PLL_CTRL0_ENABLE_ALT_MASK) |
ENABLE_ALT - ENABLE_ALT 0b0..Disable the alternate clock output 0b1..Enable the alternate clock output which is the output of the post_divider, and cannot be bypassed
#define AUDIO_PLL_CTRL0_HOLD_RING_OFF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & AUDIO_PLL_CTRL0_HOLD_RING_OFF_MASK) |
HOLD_RING_OFF - PLL Start up initialization 0b0..Normal operation 0b1..Initialize PLL start up
#define AUDIO_PLL_CTRL0_HOLD_RING_OFF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & AUDIO_PLL_CTRL0_HOLD_RING_OFF_MASK) |
HOLD_RING_OFF - PLL Start up initialization 0b0..Normal operation 0b1..Initialize PLL start up
#define AUDIO_PLL_CTRL0_PLL_REG_EN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & AUDIO_PLL_CTRL0_PLL_REG_EN_MASK) |
PLL_REG_EN - PLL_REG_EN
#define AUDIO_PLL_CTRL0_PLL_REG_EN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & AUDIO_PLL_CTRL0_PLL_REG_EN_MASK) |
PLL_REG_EN - PLL_REG_EN
#define AUDIO_PLL_CTRL0_POST_DIV_SEL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & AUDIO_PLL_CTRL0_POST_DIV_SEL_MASK) |
POST_DIV_SEL - Post Divide Select 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 4 0b011..Divide by 8 0b100..Divide by 16 0b101..Divide by 32
#define AUDIO_PLL_CTRL0_POST_DIV_SEL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & AUDIO_PLL_CTRL0_POST_DIV_SEL_MASK) |
POST_DIV_SEL - Post Divide Select 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 4 0b011..Divide by 8 0b100..Divide by 16 0b101..Divide by 32
#define AUDIO_PLL_CTRL0_POWERUP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POWERUP_SHIFT)) & AUDIO_PLL_CTRL0_POWERUP_MASK) |
POWERUP - POWERUP 0b1..Power Up the PLL 0b0..Power down the PLL
#define AUDIO_PLL_CTRL0_POWERUP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_CTRL0_POWERUP_SHIFT)) & AUDIO_PLL_CTRL0_POWERUP_MASK) |
POWERUP - POWERUP 0b1..Power Up the PLL 0b0..Power down the PLL
#define AUDIO_PLL_DENOMINATOR_DENOM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_DENOMINATOR_DENOM_SHIFT)) & AUDIO_PLL_DENOMINATOR_DENOM_MASK) |
DENOM - Denominator
#define AUDIO_PLL_DENOMINATOR_DENOM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_DENOMINATOR_DENOM_SHIFT)) & AUDIO_PLL_DENOMINATOR_DENOM_MASK) |
DENOM - Denominator
#define AUDIO_PLL_NUMERATOR_NUM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_NUMERATOR_NUM_SHIFT)) & AUDIO_PLL_NUMERATOR_NUM_MASK) |
NUM - Numerator
#define AUDIO_PLL_NUMERATOR_NUM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_NUMERATOR_NUM_SHIFT)) & AUDIO_PLL_NUMERATOR_NUM_MASK) |
NUM - Numerator
#define AUDIO_PLL_SPREAD_SPECTRUM_ENABLE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_MASK) |
ENABLE - Enable
#define AUDIO_PLL_SPREAD_SPECTRUM_ENABLE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_ENABLE_MASK) |
ENABLE - Enable
#define AUDIO_PLL_SPREAD_SPECTRUM_STEP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STEP_MASK) |
STEP - Step
#define AUDIO_PLL_SPREAD_SPECTRUM_STEP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STEP_MASK) |
STEP - Step
#define AUDIO_PLL_SPREAD_SPECTRUM_STOP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STOP_MASK) |
STOP - Stop
#define AUDIO_PLL_SPREAD_SPECTRUM_STOP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << AUDIO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & AUDIO_PLL_SPREAD_SPECTRUM_STOP_MASK) |
STOP - Stop
#define ETHERNET_PLL_CTRL0_BIAS_SELECT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_SELECT_MASK) |
BIAS_SELECT - BIAS_SELECT 0b0..Used in SoCs with a bias current of 10uA 0b1..Used in SoCs with a bias current of 2uA
#define ETHERNET_PLL_CTRL0_BIAS_SELECT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_SELECT_MASK) |
BIAS_SELECT - BIAS_SELECT 0b0..Used in SoCs with a bias current of 10uA 0b1..Used in SoCs with a bias current of 2uA
#define ETHERNET_PLL_CTRL0_BIAS_TRIM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_TRIM_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_TRIM_MASK) |
BIAS_TRIM - BIAS_TRIM
#define ETHERNET_PLL_CTRL0_BIAS_TRIM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BIAS_TRIM_SHIFT)) & ETHERNET_PLL_CTRL0_BIAS_TRIM_MASK) |
BIAS_TRIM - BIAS_TRIM
#define ETHERNET_PLL_CTRL0_BYPASS | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BYPASS_SHIFT)) & ETHERNET_PLL_CTRL0_BYPASS_MASK) |
BYPASS - BYPASS 0b1..Bypass the PLL 0b0..No Bypass
#define ETHERNET_PLL_CTRL0_BYPASS | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_BYPASS_SHIFT)) & ETHERNET_PLL_CTRL0_BYPASS_MASK) |
BYPASS - BYPASS 0b1..Bypass the PLL 0b0..No Bypass
#define ETHERNET_PLL_CTRL0_DITHER_EN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DITHER_EN_SHIFT)) & ETHERNET_PLL_CTRL0_DITHER_EN_MASK) |
DITHER_EN - DITHER_EN 0b0..Disable Dither 0b1..Enable Dither
#define ETHERNET_PLL_CTRL0_DITHER_EN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DITHER_EN_SHIFT)) & ETHERNET_PLL_CTRL0_DITHER_EN_MASK) |
DITHER_EN - DITHER_EN 0b0..Disable Dither 0b1..Enable Dither
#define ETHERNET_PLL_CTRL0_DIV_SELECT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DIV_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_DIV_SELECT_MASK) |
DIV_SELECT - DIV_SELECT
#define ETHERNET_PLL_CTRL0_DIV_SELECT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_DIV_SELECT_SHIFT)) & ETHERNET_PLL_CTRL0_DIV_SELECT_MASK) |
DIV_SELECT - DIV_SELECT
#define ETHERNET_PLL_CTRL0_ENABLE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_MASK) |
ENABLE - ENABLE 0b1..Enable the clock output 0b0..Disable the clock output
#define ETHERNET_PLL_CTRL0_ENABLE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_MASK) |
ENABLE - ENABLE 0b1..Enable the clock output 0b0..Disable the clock output
#define ETHERNET_PLL_CTRL0_ENABLE_ALT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_ALT_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_ALT_MASK) |
ENABLE_ALT - ENABLE_ALT 0b0..Disable the alternate clock output 0b1..Enable the alternate clock output which is the output of the post_divider, and cannot be bypassed
#define ETHERNET_PLL_CTRL0_ENABLE_ALT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_ENABLE_ALT_SHIFT)) & ETHERNET_PLL_CTRL0_ENABLE_ALT_MASK) |
ENABLE_ALT - ENABLE_ALT 0b0..Disable the alternate clock output 0b1..Enable the alternate clock output which is the output of the post_divider, and cannot be bypassed
#define ETHERNET_PLL_CTRL0_HOLD_RING_OFF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & ETHERNET_PLL_CTRL0_HOLD_RING_OFF_MASK) |
HOLD_RING_OFF - PLL Start up initialization 0b0..Normal operation 0b1..Initialize PLL start up
#define ETHERNET_PLL_CTRL0_HOLD_RING_OFF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & ETHERNET_PLL_CTRL0_HOLD_RING_OFF_MASK) |
HOLD_RING_OFF - PLL Start up initialization 0b0..Normal operation 0b1..Initialize PLL start up
#define ETHERNET_PLL_CTRL0_PLL_REG_EN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_PLL_REG_EN_SHIFT)) & ETHERNET_PLL_CTRL0_PLL_REG_EN_MASK) |
PLL_REG_EN - PLL_REG_EN
#define ETHERNET_PLL_CTRL0_PLL_REG_EN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_PLL_REG_EN_SHIFT)) & ETHERNET_PLL_CTRL0_PLL_REG_EN_MASK) |
PLL_REG_EN - PLL_REG_EN
#define ETHERNET_PLL_CTRL0_POST_DIV_SEL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & ETHERNET_PLL_CTRL0_POST_DIV_SEL_MASK) |
POST_DIV_SEL - Post Divide Select 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 4 0b011..Divide by 8 0b100..Divide by 16 0b101..Divide by 32
#define ETHERNET_PLL_CTRL0_POST_DIV_SEL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & ETHERNET_PLL_CTRL0_POST_DIV_SEL_MASK) |
POST_DIV_SEL - Post Divide Select 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 4 0b011..Divide by 8 0b100..Divide by 16 0b101..Divide by 32
#define ETHERNET_PLL_CTRL0_POWERUP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POWERUP_SHIFT)) & ETHERNET_PLL_CTRL0_POWERUP_MASK) |
POWERUP - POWERUP 0b1..Power Up the PLL 0b0..Power down the PLL
#define ETHERNET_PLL_CTRL0_POWERUP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_CTRL0_POWERUP_SHIFT)) & ETHERNET_PLL_CTRL0_POWERUP_MASK) |
POWERUP - POWERUP 0b1..Power Up the PLL 0b0..Power down the PLL
#define ETHERNET_PLL_DENOMINATOR_DENOM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_DENOMINATOR_DENOM_SHIFT)) & ETHERNET_PLL_DENOMINATOR_DENOM_MASK) |
DENOM - Denominator
#define ETHERNET_PLL_DENOMINATOR_DENOM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_DENOMINATOR_DENOM_SHIFT)) & ETHERNET_PLL_DENOMINATOR_DENOM_MASK) |
DENOM - Denominator
#define ETHERNET_PLL_NUMERATOR_NUM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_NUMERATOR_NUM_SHIFT)) & ETHERNET_PLL_NUMERATOR_NUM_MASK) |
NUM - Numerator
#define ETHERNET_PLL_NUMERATOR_NUM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_NUMERATOR_NUM_SHIFT)) & ETHERNET_PLL_NUMERATOR_NUM_MASK) |
NUM - Numerator
#define ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_MASK) |
ENABLE - Enable
#define ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_ENABLE_MASK) |
ENABLE - Enable
#define ETHERNET_PLL_SPREAD_SPECTRUM_STEP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STEP_MASK) |
STEP - Step
#define ETHERNET_PLL_SPREAD_SPECTRUM_STEP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STEP_MASK) |
STEP - Step
#define ETHERNET_PLL_SPREAD_SPECTRUM_STOP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STOP_MASK) |
STOP - Stop
#define ETHERNET_PLL_SPREAD_SPECTRUM_STOP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << ETHERNET_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & ETHERNET_PLL_SPREAD_SPECTRUM_STOP_MASK) |
STOP - Stop
#define VIDEO_PLL_CTRL0_BIAS_SELECT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_SELECT_MASK) |
BIAS_SELECT - BIAS_SELECT 0b0..Used in SoCs with a bias current of 10uA 0b1..Used in SoCs with a bias current of 2uA
#define VIDEO_PLL_CTRL0_BIAS_SELECT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_SELECT_MASK) |
BIAS_SELECT - BIAS_SELECT 0b0..Used in SoCs with a bias current of 10uA 0b1..Used in SoCs with a bias current of 2uA
#define VIDEO_PLL_CTRL0_BIAS_TRIM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_TRIM_MASK) |
BIAS_TRIM - BIAS_TRIM
#define VIDEO_PLL_CTRL0_BIAS_TRIM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BIAS_TRIM_SHIFT)) & VIDEO_PLL_CTRL0_BIAS_TRIM_MASK) |
BIAS_TRIM - BIAS_TRIM
#define VIDEO_PLL_CTRL0_BYPASS | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BYPASS_SHIFT)) & VIDEO_PLL_CTRL0_BYPASS_MASK) |
BYPASS - BYPASS 0b1..Bypass the PLL 0b0..No Bypass
#define VIDEO_PLL_CTRL0_BYPASS | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_BYPASS_SHIFT)) & VIDEO_PLL_CTRL0_BYPASS_MASK) |
BYPASS - BYPASS 0b1..Bypass the PLL 0b0..No Bypass
#define VIDEO_PLL_CTRL0_DITHER_EN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DITHER_EN_SHIFT)) & VIDEO_PLL_CTRL0_DITHER_EN_MASK) |
DITHER_EN - DITHER_EN 0b0..Disable Dither 0b1..Enable Dither
#define VIDEO_PLL_CTRL0_DITHER_EN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DITHER_EN_SHIFT)) & VIDEO_PLL_CTRL0_DITHER_EN_MASK) |
DITHER_EN - DITHER_EN 0b0..Disable Dither 0b1..Enable Dither
#define VIDEO_PLL_CTRL0_DIV_SELECT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DIV_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_DIV_SELECT_MASK) |
DIV_SELECT - DIV_SELECT
#define VIDEO_PLL_CTRL0_DIV_SELECT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_DIV_SELECT_SHIFT)) & VIDEO_PLL_CTRL0_DIV_SELECT_MASK) |
DIV_SELECT - DIV_SELECT
#define VIDEO_PLL_CTRL0_ENABLE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_MASK) |
ENABLE - ENABLE 0b1..Enable the clock output 0b0..Disable the clock output
#define VIDEO_PLL_CTRL0_ENABLE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_MASK) |
ENABLE - ENABLE 0b1..Enable the clock output 0b0..Disable the clock output
#define VIDEO_PLL_CTRL0_ENABLE_ALT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_ALT_MASK) |
ENABLE_ALT - ENABLE_ALT 0b0..Disable the alternate clock output 0b1..Enable the alternate clock output which is the output of the post_divider, and cannot be bypassed
#define VIDEO_PLL_CTRL0_ENABLE_ALT | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_ENABLE_ALT_SHIFT)) & VIDEO_PLL_CTRL0_ENABLE_ALT_MASK) |
ENABLE_ALT - ENABLE_ALT 0b0..Disable the alternate clock output 0b1..Enable the alternate clock output which is the output of the post_divider, and cannot be bypassed
#define VIDEO_PLL_CTRL0_HOLD_RING_OFF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & VIDEO_PLL_CTRL0_HOLD_RING_OFF_MASK) |
HOLD_RING_OFF - PLL Start up initialization 0b0..Normal operation 0b1..Initialize PLL start up
#define VIDEO_PLL_CTRL0_HOLD_RING_OFF | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_HOLD_RING_OFF_SHIFT)) & VIDEO_PLL_CTRL0_HOLD_RING_OFF_MASK) |
HOLD_RING_OFF - PLL Start up initialization 0b0..Normal operation 0b1..Initialize PLL start up
#define VIDEO_PLL_CTRL0_PLL_REG_EN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & VIDEO_PLL_CTRL0_PLL_REG_EN_MASK) |
PLL_REG_EN - PLL_REG_EN
#define VIDEO_PLL_CTRL0_PLL_REG_EN | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_PLL_REG_EN_SHIFT)) & VIDEO_PLL_CTRL0_PLL_REG_EN_MASK) |
PLL_REG_EN - PLL_REG_EN
#define VIDEO_PLL_CTRL0_POST_DIV_SEL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & VIDEO_PLL_CTRL0_POST_DIV_SEL_MASK) |
POST_DIV_SEL - Post Divide Select 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 4 0b011..Divide by 8 0b100..Divide by 16 0b101..Divide by 32
#define VIDEO_PLL_CTRL0_POST_DIV_SEL | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POST_DIV_SEL_SHIFT)) & VIDEO_PLL_CTRL0_POST_DIV_SEL_MASK) |
POST_DIV_SEL - Post Divide Select 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 4 0b011..Divide by 8 0b100..Divide by 16 0b101..Divide by 32
#define VIDEO_PLL_CTRL0_POWERUP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POWERUP_SHIFT)) & VIDEO_PLL_CTRL0_POWERUP_MASK) |
POWERUP - POWERUP 0b1..Power Up the PLL 0b0..Power down the PLL
#define VIDEO_PLL_CTRL0_POWERUP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_CTRL0_POWERUP_SHIFT)) & VIDEO_PLL_CTRL0_POWERUP_MASK) |
POWERUP - POWERUP 0b1..Power Up the PLL 0b0..Power down the PLL
#define VIDEO_PLL_DENOMINATOR_DENOM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_DENOMINATOR_DENOM_SHIFT)) & VIDEO_PLL_DENOMINATOR_DENOM_MASK) |
DENOM - Denominator
#define VIDEO_PLL_DENOMINATOR_DENOM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_DENOMINATOR_DENOM_SHIFT)) & VIDEO_PLL_DENOMINATOR_DENOM_MASK) |
DENOM - Denominator
#define VIDEO_PLL_NUMERATOR_NUM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_NUMERATOR_NUM_SHIFT)) & VIDEO_PLL_NUMERATOR_NUM_MASK) |
NUM - Numerator
#define VIDEO_PLL_NUMERATOR_NUM | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_NUMERATOR_NUM_SHIFT)) & VIDEO_PLL_NUMERATOR_NUM_MASK) |
NUM - Numerator
#define VIDEO_PLL_SPREAD_SPECTRUM_ENABLE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_MASK) |
ENABLE - Enable
#define VIDEO_PLL_SPREAD_SPECTRUM_ENABLE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_ENABLE_MASK) |
ENABLE - Enable
#define VIDEO_PLL_SPREAD_SPECTRUM_STEP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STEP_MASK) |
STEP - Step
#define VIDEO_PLL_SPREAD_SPECTRUM_STEP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STEP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STEP_MASK) |
STEP - Step
#define VIDEO_PLL_SPREAD_SPECTRUM_STOP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STOP_MASK) |
STOP - Stop
#define VIDEO_PLL_SPREAD_SPECTRUM_STOP | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << VIDEO_PLL_SPREAD_SPECTRUM_STOP_SHIFT)) & VIDEO_PLL_SPREAD_SPECTRUM_STOP_MASK) |
STOP - Stop