Macros
#define	HAL_ADC_STATE_RESET (0x00000000UL)
	HAL ADC state machine: ADC states definition (bitfields)

#define	HAL_ADC_STATE_READY (0x00000001UL)

#define	HAL_ADC_STATE_BUSY_INTERNAL (0x00000002UL)

#define	HAL_ADC_STATE_TIMEOUT (0x00000004UL)

#define	HAL_ADC_STATE_ERROR_INTERNAL (0x00000010UL)

#define	HAL_ADC_STATE_ERROR_CONFIG (0x00000020UL)

#define	HAL_ADC_STATE_ERROR_DMA (0x00000040UL)

#define	HAL_ADC_STATE_REG_BUSY (0x00000100UL)

#define	HAL_ADC_STATE_REG_EOC (0x00000200UL)

#define	HAL_ADC_STATE_REG_OVR (0x00000400UL)

#define	HAL_ADC_STATE_REG_EOSMP (0x00000800UL)

#define	HAL_ADC_STATE_INJ_BUSY (0x00001000UL)

#define	HAL_ADC_STATE_INJ_EOC (0x00002000UL)

#define	HAL_ADC_STATE_INJ_JQOVF (0x00004000UL)

#define	HAL_ADC_STATE_AWD1 (0x00010000UL)

#define	HAL_ADC_STATE_AWD2 (0x00020000UL)

#define	HAL_ADC_STATE_AWD3 (0x00040000UL)

#define	HAL_ADC_STATE_MULTIMODE_SLAVE (0x00100000UL)

Detailed Description

Macro Definition Documentation

◆ HAL_ADC_STATE_AWD1

#define HAL_ADC_STATE_AWD1 (0x00010000UL)

Out-of-window occurrence of ADC analog watchdog 1

◆ HAL_ADC_STATE_AWD2

#define HAL_ADC_STATE_AWD2 (0x00020000UL)

Out-of-window occurrence of ADC analog watchdog 2

◆ HAL_ADC_STATE_AWD3

#define HAL_ADC_STATE_AWD3 (0x00040000UL)

Out-of-window occurrence of ADC analog watchdog 3

◆ HAL_ADC_STATE_BUSY_INTERNAL

#define HAL_ADC_STATE_BUSY_INTERNAL (0x00000002UL)

ADC is busy due to an internal process (initialization, calibration)

◆ HAL_ADC_STATE_ERROR_CONFIG

#define HAL_ADC_STATE_ERROR_CONFIG (0x00000020UL)

Configuration error occurrence

◆ HAL_ADC_STATE_ERROR_DMA

#define HAL_ADC_STATE_ERROR_DMA (0x00000040UL)

DMA error occurrence

◆ HAL_ADC_STATE_ERROR_INTERNAL

#define HAL_ADC_STATE_ERROR_INTERNAL (0x00000010UL)

Internal error occurrence

◆ HAL_ADC_STATE_INJ_BUSY

#define HAL_ADC_STATE_INJ_BUSY (0x00001000UL)

A conversion on ADC group injected is ongoing or can occur (either by auto-injection mode, external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available))

◆ HAL_ADC_STATE_INJ_EOC

#define HAL_ADC_STATE_INJ_EOC (0x00002000UL)

Conversion data available on group injected

◆ HAL_ADC_STATE_INJ_JQOVF

#define HAL_ADC_STATE_INJ_JQOVF (0x00004000UL)

Injected queue overflow occurrence

◆ HAL_ADC_STATE_MULTIMODE_SLAVE

#define HAL_ADC_STATE_MULTIMODE_SLAVE (0x00100000UL)

ADC in multimode slave state, controlled by another ADC master (when feature available)

◆ HAL_ADC_STATE_READY

#define HAL_ADC_STATE_READY (0x00000001UL)

ADC peripheral ready for use

◆ HAL_ADC_STATE_REG_BUSY

#define HAL_ADC_STATE_REG_BUSY (0x00000100UL)

A conversion on ADC group regular is ongoing or can occur (either by continuous mode, external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available))

◆ HAL_ADC_STATE_REG_EOC

#define HAL_ADC_STATE_REG_EOC (0x00000200UL)

Conversion data available on group regular

◆ HAL_ADC_STATE_REG_EOSMP

#define HAL_ADC_STATE_REG_EOSMP (0x00000800UL)

Not available on this STM32 series: End Of Sampling flag raised

◆ HAL_ADC_STATE_REG_OVR

#define HAL_ADC_STATE_REG_OVR (0x00000400UL)

Overrun occurrence

◆ HAL_ADC_STATE_RESET

#define HAL_ADC_STATE_RESET (0x00000000UL)

HAL ADC state machine: ADC states definition (bitfields)

Note: ADC state machine is managed by bitfields, state must be compared with bit by bit. For example: " if ((HAL_ADC_GetState(hadc1) & HAL_ADC_STATE_REG_BUSY) != 0UL) " " if ((HAL_ADC_GetState(hadc1) & HAL_ADC_STATE_AWD1) != 0UL) " ADC not yet initialized or disabled

◆ HAL_ADC_STATE_TIMEOUT

#define HAL_ADC_STATE_TIMEOUT (0x00000004UL)

TimeOut occurrence

Macros