RTEMS 6.1-rc6
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Modules | Data Structures | Macros

Modules

 ADC Register Masks
 

Data Structures

struct  ADC_Type
 

Macros

#define ADC1_BASE   (0x400C4000u)
 
#define ADC1   ((ADC_Type *)ADC1_BASE)
 
#define ADC2_BASE   (0x400C8000u)
 
#define ADC2   ((ADC_Type *)ADC2_BASE)
 
#define ADC_BASE_ADDRS   { 0u, ADC1_BASE, ADC2_BASE }
 
#define ADC_BASE_PTRS   { (ADC_Type *)0u, ADC1, ADC2 }
 
#define ADC_IRQS   { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
 
#define LPADC1_BASE   (0x40050000u)
 
#define LPADC1   ((ADC_Type *)LPADC1_BASE)
 
#define LPADC2_BASE   (0x40054000u)
 
#define LPADC2   ((ADC_Type *)LPADC2_BASE)
 
#define ADC_BASE_ADDRS   { 0u, LPADC1_BASE, LPADC2_BASE }
 
#define ADC_BASE_PTRS   { (ADC_Type *)0u, LPADC1, LPADC2 }
 
#define ADC_IRQS   { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
 
#define LPADC1_BASE   (0x40050000u)
 
#define LPADC1   ((ADC_Type *)LPADC1_BASE)
 
#define LPADC2_BASE   (0x40054000u)
 
#define LPADC2   ((ADC_Type *)LPADC2_BASE)
 
#define ADC_BASE_ADDRS   { 0u, LPADC1_BASE, LPADC2_BASE }
 
#define ADC_BASE_PTRS   { (ADC_Type *)0u, LPADC1, LPADC2 }
 
#define ADC_IRQS   { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
 

Detailed Description

Macro Definition Documentation

◆ ADC1

#define ADC1   ((ADC_Type *)ADC1_BASE)

Peripheral ADC1 base pointer

◆ ADC1_BASE

#define ADC1_BASE   (0x400C4000u)

Peripheral ADC1 base address

◆ ADC2

#define ADC2   ((ADC_Type *)ADC2_BASE)

Peripheral ADC2 base pointer

◆ ADC2_BASE

#define ADC2_BASE   (0x400C8000u)

Peripheral ADC2 base address

◆ ADC_BASE_ADDRS [1/3]

#define ADC_BASE_ADDRS   { 0u, ADC1_BASE, ADC2_BASE }

Array initializer of ADC peripheral base addresses

◆ ADC_BASE_ADDRS [2/3]

#define ADC_BASE_ADDRS   { 0u, LPADC1_BASE, LPADC2_BASE }

Array initializer of ADC peripheral base addresses

◆ ADC_BASE_ADDRS [3/3]

#define ADC_BASE_ADDRS   { 0u, LPADC1_BASE, LPADC2_BASE }

Array initializer of ADC peripheral base addresses

◆ ADC_BASE_PTRS [1/3]

#define ADC_BASE_PTRS   { (ADC_Type *)0u, ADC1, ADC2 }

Array initializer of ADC peripheral base pointers

◆ ADC_BASE_PTRS [2/3]

#define ADC_BASE_PTRS   { (ADC_Type *)0u, LPADC1, LPADC2 }

Array initializer of ADC peripheral base pointers

◆ ADC_BASE_PTRS [3/3]

#define ADC_BASE_PTRS   { (ADC_Type *)0u, LPADC1, LPADC2 }

Array initializer of ADC peripheral base pointers

◆ ADC_IRQS [1/3]

#define ADC_IRQS   { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }

Interrupt vectors for the ADC peripheral type

◆ ADC_IRQS [2/3]

#define ADC_IRQS   { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }

Interrupt vectors for the ADC peripheral type

◆ ADC_IRQS [3/3]

#define ADC_IRQS   { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }

Interrupt vectors for the ADC peripheral type

◆ LPADC1 [1/2]

#define LPADC1   ((ADC_Type *)LPADC1_BASE)

Peripheral LPADC1 base pointer

◆ LPADC1 [2/2]

#define LPADC1   ((ADC_Type *)LPADC1_BASE)

Peripheral LPADC1 base pointer

◆ LPADC1_BASE [1/2]

#define LPADC1_BASE   (0x40050000u)

Peripheral LPADC1 base address

◆ LPADC1_BASE [2/2]

#define LPADC1_BASE   (0x40050000u)

Peripheral LPADC1 base address

◆ LPADC2 [1/2]

#define LPADC2   ((ADC_Type *)LPADC2_BASE)

Peripheral LPADC2 base pointer

◆ LPADC2 [2/2]

#define LPADC2   ((ADC_Type *)LPADC2_BASE)

Peripheral LPADC2 base pointer

◆ LPADC2_BASE [1/2]

#define LPADC2_BASE   (0x40054000u)

Peripheral LPADC2 base address

◆ LPADC2_BASE [2/2]

#define LPADC2_BASE   (0x40054000u)

Peripheral LPADC2 base address